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Mon, 24 Oct 2022 05:22:08 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 09A0F4C04A; Mon, 24 Oct 2022 05:22:08 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A7A834C044; Mon, 24 Oct 2022 05:22:07 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 24 Oct 2022 05:22:07 +0000 (GMT) Received: from li-0d7fa1cc-2c9d-11b2-a85c-aed20764436d.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 734D6600BA; Mon, 24 Oct 2022 16:22:01 +1100 (AEDT) Message-ID: <36caf90fe6df4cea3b719913856e3d080c2ca31f.camel@linux.ibm.com> Subject: Re: [PATCH v8 4/6] powerpc/tlb: Add local flush for page given mm_struct and psize From: Benjamin Gray To: Russell Currey , linuxppc-dev@lists.ozlabs.org Date: Mon, 24 Oct 2022 16:22:01 +1100 In-Reply-To: <491120551489673b614d2f058ea580dc9a1534f0.camel@russell.cc> References: <20221021052238.580986-1-bgray@linux.ibm.com> <20221021052238.580986-5-bgray@linux.ibm.com> <491120551489673b614d2f058ea580dc9a1534f0.camel@russell.cc> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.44.4 (3.44.4-2.fc36) MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: IU7OsxDVGaa6jsHbByuPH-SGoInhRugX X-Proofpoint-ORIG-GUID: j-hRWsPp9bU7NtgHgodD2mGPIu7nHlAp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-23_02,2022-10-21_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 spamscore=0 adultscore=0 malwarescore=0 priorityscore=1501 mlxscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=962 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210240032 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jniethe5@gmail.com, npiggin@gmail.com, cmr@bluescreens.de, ajd@linux.ibm.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Mon, 2022-10-24 at 14:30 +1100, Russell Currey wrote: > On Fri, 2022-10-21 at 16:22 +1100, Benjamin Gray wrote: > > Adds a local TLB flush operation that works given an mm_struct, VA > > to > > flush, and page size representation. > >=20 > > This removes the need to create a vm_area_struct, which the > > temporary > > patching mm work does not need. > >=20 > > Signed-off-by: Benjamin Gray > > --- > > =C2=A0arch/powerpc/include/asm/book3s/32/tlbflush.h=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 | 9 +++++++++ > > =C2=A0arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 5 +++++ > > =C2=A0arch/powerpc/include/asm/book3s/64/tlbflush.h=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 | 8 ++++++++ > > =C2=A0arch/powerpc/include/asm/nohash/tlbflush.h=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0 | 1 + > > =C2=A04 files changed, 23 insertions(+) > >=20 > > diff --git a/arch/powerpc/include/asm/book3s/32/tlbflush.h > > b/arch/powerpc/include/asm/book3s/32/tlbflush.h > > index ba1743c52b56..e5a688cebf69 100644 > > --- a/arch/powerpc/include/asm/book3s/32/tlbflush.h > > +++ b/arch/powerpc/include/asm/book3s/32/tlbflush.h > > @@ -2,6 +2,8 @@ > > =C2=A0#ifndef _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H > > =C2=A0#define _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H > > =C2=A0 > > +#include > > + > > =C2=A0#define MMU_NO_CONTEXT=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (0) > > =C2=A0/* > > =C2=A0 * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xx= x > > @@ -74,6 +76,13 @@ static inline void local_flush_tlb_page(struct > > vm_area_struct *vma, > > =C2=A0{ > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0flush_tlb_page(vma, vma= ddr); > > =C2=A0} > > + > > +static inline void local_flush_tlb_page_psize(struct mm_struct > > *mm, > > unsigned long vmaddr, int psize) > > +{ > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0BUILD_BUG_ON(psize !=3D MMU_= PAGE_4K); >=20 > Is there any utility in adding this for 32bit if the following > patches > are only for Radix? It needs some kind of definition to avoid #ifdef's. I figured I may as well provide a correct implementation, given the functions around it are implemented. The BUILD_BUG_ON specifically is just defensive in case my assumptions are wrong. I don't know anything about these machines, just what the kernel defines. I can remove the check, or replace the whole implementation with a BUILD_BUG?