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Date: Sat, 19 Aug 2006 18:32:52 -0500 (CDT)
Subject: Re: [PATCH] powerpc: emulate power5 popcntb instruction
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>> > Is that the right check? The other similar traps check against a
>> mask of 0x7c0007fe.
>>
>> I hope you mean 0xfc0007fe?
>>
>
> No, the code in question is
>
> #define INST_MFSPR_PVR­·­·······0x7c1f42a6
> #define INST_MFSPR_PVR_MASK­····0xfc1fffff
>
> #define INST_DCBA­······­·······0x7c0005ec
> #define INST_DCBA_MASK­·­·······0x7c0007fe
>
> #define INST_MCRXR­·····­·······0x7c000400
> #define INST_MCRXR_MASK­­·······0x7c0007fe
>
> #define INST_STRING­····­·······0x7c00042a
> #define INST_STRING_MASK­·······0x7c0007fe
> #define INST_STRING_GEN_MASK­···0x7c00067e
> #define INST_LSWI­······­·······0x7c0004aa
> #define INST_LSWX­······­·······0x7c00042a
> #define INST_STSWI­·····­·······0x7c0005aa
> #define INST_STSWX­·····­·······0x7c00052a
>
> What does the MSB do in our instructions?

Bits 0..5 are the primary opcode, for all insns;
bits 21..30 are the secondary opcode, for insns that
have one (all in primary opcode 31 do).

So we have a bug here; could you take care of it please
Arnd?


Segher