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From: Magnus Damm <damm@kieraypc01.p.y.ki.era.ericsson.se>
To: "Shuangjun Zhu (r44089)" <r44089@email.sps.mot.com>
Cc: linuxppc-dev@lists.linuxppc.org
Subject: Re: How to enable data cache for MPC860
Date: Thu, 19 Aug 1999 08:57:09 +0200	[thread overview]
Message-ID: <37BBAAC5.E156BD06@switchboard.ericsson.se> (raw)
In-Reply-To: 035401bee95c$46cc26c0$68f102de@sjzhu



>   I have a MPC860 board, which there are some memory space like VRAM or ISA.
> I donot know how to enable data cache for DRAM, and will not effect
> the accessing VRAM and ISA.

You will need to use the mmu and use page tables that describes the IO
regions
as non-cacheable, and the dram tables as cacheable.
using the mmu will probably increase the performance because the cpu can
use
speculative instruction fetch.

have a look in head.S in the linux kernel source.
you will see how the cache is turned on and tables are reserved.
and finnaly is the mmu turned on.

please note that the cache should be invalidated, which not is done in
the
linux source code. it should be done in the bootcode that runs before
linux.
have a look in the manual.

i think motorola has some example code too if you look around at their
website.

cheers /

magnus

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  reply	other threads:[~1999-08-19  6:57 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
1999-08-18  9:30 How to enable data cache for MPC860 Shuangjun Zhu
1999-08-19  6:57 ` Magnus Damm [this message]
  -- strict thread matches above, loose matches on Subject: below --
1999-08-19  8:59 Shuangjun Zhu

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