From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3xhWlj0fflzDqk7 for ; Wed, 30 Aug 2017 00:50:40 +1000 (AEST) Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v7TEnLJA006783 for ; Tue, 29 Aug 2017 10:50:38 -0400 Received: from e06smtp14.uk.ibm.com (e06smtp14.uk.ibm.com [195.75.94.110]) by mx0a-001b2d01.pphosted.com with ESMTP id 2cna460w7s-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 29 Aug 2017 10:50:37 -0400 Received: from localhost by e06smtp14.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 29 Aug 2017 15:50:34 +0100 Subject: Re: [PATCH v2 19/20] x86/mm: Add speculative pagefault handling To: Anshuman Khandual , paulmck@linux.vnet.ibm.com, peterz@infradead.org, akpm@linux-foundation.org, kirill@shutemov.name, ak@linux.intel.com, mhocko@kernel.org, dave@stgolabs.net, jack@suse.cz, Matthew Wilcox , benh@kernel.crashing.org, mpe@ellerman.id.au, paulus@samba.org, Thomas Gleixner , Ingo Molnar , hpa@zytor.com, Will Deacon Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, haren@linux.vnet.ibm.com, npiggin@gmail.com, bsingharora@gmail.com, Tim Chen , linuxppc-dev@lists.ozlabs.org, x86@kernel.org References: <1503007519-26777-1-git-send-email-ldufour@linux.vnet.ibm.com> <1503007519-26777-20-git-send-email-ldufour@linux.vnet.ibm.com> From: Laurent Dufour Date: Tue, 29 Aug 2017 16:50:26 +0200 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252 Message-Id: <37b9b036-e951-0a74-3e5c-31049cda7dd2@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 21/08/2017 09:29, Anshuman Khandual wrote: > On 08/18/2017 03:35 AM, Laurent Dufour wrote: >> From: Peter Zijlstra >> >> Try a speculative fault before acquiring mmap_sem, if it returns with >> VM_FAULT_RETRY continue with the mmap_sem acquisition and do the >> traditional fault. >> >> Signed-off-by: Peter Zijlstra (Intel) >> >> [Clearing of FAULT_FLAG_ALLOW_RETRY is now done in >> handle_speculative_fault()] >> [Retry with usual fault path in the case VM_ERROR is returned by >> handle_speculative_fault(). This allows signal to be delivered] >> Signed-off-by: Laurent Dufour >> --- >> arch/x86/include/asm/pgtable_types.h | 7 +++++++ >> arch/x86/mm/fault.c | 19 +++++++++++++++++++ >> 2 files changed, 26 insertions(+) >> >> diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h >> index bf9638e1ee42..4fd2693a037e 100644 >> --- a/arch/x86/include/asm/pgtable_types.h >> +++ b/arch/x86/include/asm/pgtable_types.h >> @@ -234,6 +234,13 @@ enum page_cache_mode { >> #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ >> #endif >> >> +/* >> + * Advertise that we call the Speculative Page Fault handler. >> + */ >> +#ifdef CONFIG_X86_64 >> +#define __HAVE_ARCH_CALL_SPF >> +#endif >> + >> #ifdef CONFIG_X86_32 >> # include >> #else >> diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c >> index 2a1fa10c6a98..4c070b9a4362 100644 >> --- a/arch/x86/mm/fault.c >> +++ b/arch/x86/mm/fault.c >> @@ -1365,6 +1365,24 @@ __do_page_fault(struct pt_regs *regs, unsigned long error_code, >> if (error_code & PF_INSTR) >> flags |= FAULT_FLAG_INSTRUCTION; >> >> +#ifdef __HAVE_ARCH_CALL_SPF >> + if (error_code & PF_USER) { >> + fault = handle_speculative_fault(mm, address, flags); >> + >> + /* >> + * We also check against VM_FAULT_ERROR because we have to >> + * raise a signal by calling later mm_fault_error() which >> + * requires the vma pointer to be set. So in that case, >> + * we fall through the normal path. > > Cant mm_fault_error() be called inside handle_speculative_fault() ? > Falling through the normal page fault path again just to raise a > signal seems overkill. Looking into mm_fault_error(), it seems they > are different for x86 and powerpc. > > X86: > > mm_fault_error(struct pt_regs *regs, unsigned long error_code, > unsigned long address, struct vm_area_struct *vma, > unsigned int fault) > > powerpc: > > mm_fault_error(struct pt_regs *regs, unsigned long addr, int fault) > > Even in case of X86, I guess we would have reference to the faulting > VMA (after the SRCU search) which can be used to call this function > directly. Yes I think this is doable in the case of x86.