From: Dan Malek <dan@netx4.com>
To: Raphael Massin <massin@col.bsf.alcatel.fr>
Cc: jeff@wa1hco.mv.com, linuxppc-embedded@lists.linuxppc.org,
dmalek@jlc.net, massin@cu5s33
Subject: Re: /dev/watchdog for onchip MPC860 watchdog?
Date: Wed, 20 Oct 1999 13:56:17 -0400 [thread overview]
Message-ID: <380E0241.AB5C1317@netx4.com> (raw)
In-Reply-To: 199910200733.JAA28746@cu5s33.clb
Raphael Massin wrote:
> ... i prorammed it
> to generate a Non Maskable Interrupt instead of system reset. Those NMIs
> are handled by a special function in the Linux kernel. This function
> can reset the board, using a specific I/O, when too many NMIs occurred
> without any watchdog timer (SWSR) servicing.
That's not exactly the same thing. You still rely upon some,
although smaller, piece of software and proper operation of your
counter (a memory location that could be corrupted by errant
software) to perform the watchdog service.
> ..... configurations,
> Dan's idea seems perfect.
A far from perfect alternative.......
-- Dan
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~1999-10-20 17:56 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
1999-10-20 7:33 /dev/watchdog for onchip MPC860 watchdog? Raphael Massin
1999-10-20 17:56 ` Dan Malek [this message]
-- strict thread matches above, loose matches on Subject: below --
2000-07-13 7:24 Tania Boak
2000-07-13 7:47 ` Graham Stoney
[not found] <380B6A1B.E5D02094@netx4.com>
1999-10-19 8:56 ` Graham Stoney
1999-10-19 19:51 ` Dan Malek
1999-10-20 1:56 ` Jeff Millar
1999-10-20 17:47 ` Dan Malek
1999-10-21 3:49 ` Graham Stoney
1999-10-21 4:06 ` Cort Dougan
1999-10-15 3:30 Graham Stoney
1999-10-18 20:24 ` Dan Malek
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