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* IBM 40x and no L2 cache
@ 1999-12-13  9:43 Paul Austin
  1999-12-13 19:38 ` Dan Malek
  0 siblings, 1 reply; 2+ messages in thread
From: Paul Austin @ 1999-12-13  9:43 UTC (permalink / raw)
  To: 'linuxppc-embedded@lists.linuxppc.org'


Hi,

I'm part of an project that is going to use Linux on an embedded system.
We're currently debating whether to use x86 or PPC. There are lots of
reasons for wanting to use an IBM 40x for our board. Unfortunately, however,
the 40x can't support an L2 cache. I've read lots of comments about the
absence of an L2 cache being bad for Linux performance. Does anyone have any
figures that say how bad?

Lots of thanks
Paul
 

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: IBM 40x and no L2 cache
  1999-12-13  9:43 IBM 40x and no L2 cache Paul Austin
@ 1999-12-13 19:38 ` Dan Malek
  0 siblings, 0 replies; 2+ messages in thread
From: Dan Malek @ 1999-12-13 19:38 UTC (permalink / raw)
  To: Paul Austin; +Cc: 'linuxppc-embedded@lists.linuxppc.org'


Paul Austin wrote:


> We're currently debating whether to use x86 or PPC. There are lots of
> reasons for wanting to use an IBM 40x for our board. Unfortunately, however,
> the 40x can't support an L2 cache.


The comments about the L2 cache are usually directed to high
performance workstations using 7xx PowerPCs.

If you can't see the value in the features provided by the
embedded PowerPC over any x86, you are completely missing
the boat.  If you are doing any type of data communication
protocols, the 8xx or 8260 will perform tasks thought impossible
even on high end PCI workstations due to their specialized
communciation processor and external interfaces.  The 8260 has
local memory features much more important than any L2 cache in
an embedded environment.


	-- Dan

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 2+ messages in thread

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