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From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: Ram Pai <linuxram@us.ibm.com>
Cc: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au,
	linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 1/2] powerpc/mm/keys: Move pte bits to correct headers
Date: Thu, 8 Mar 2018 07:58:35 +0530	[thread overview]
Message-ID: <38fd173d-9109-d602-377d-760c4d0fb6b7@linux.vnet.ibm.com> (raw)
In-Reply-To: <20180307202831.GJ1060@ram.oc3035372033.ibm.com>

On 03/08/2018 01:58 AM, Ram Pai wrote:
> On Wed, Mar 07, 2018 at 07:06:44PM +0530, Aneesh Kumar K.V wrote:
>> Memory keys are supported only with hash translation mode. Instead of #ifdef in
>> generic code move the key related pte bits to respective headers
>>
>> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
>> ---
>>   arch/powerpc/include/asm/book3s/64/hash-4k.h  |  7 +++++++
>>   arch/powerpc/include/asm/book3s/64/hash-64k.h |  7 +++++++
>>   arch/powerpc/include/asm/book3s/64/pgtable.h  | 19 -------------------
>>   3 files changed, 14 insertions(+), 19 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h
>> index fc3dc6a93939..4103bfc7c223 100644
>> --- a/arch/powerpc/include/asm/book3s/64/hash-4k.h
>> +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h
>> @@ -33,6 +33,13 @@
>>   #define H_PAGE_THP_HUGE 0x0
>>   #define H_PAGE_COMBO	0x0
>>
>> +/* memory key bits, only 8 keys supported */
>> +#define H_PTE_PKEY_BIT0	0
>> +#define H_PTE_PKEY_BIT1	0
>> +#define H_PTE_PKEY_BIT2	_RPAGE_RSV3
>> +#define H_PTE_PKEY_BIT3	_RPAGE_RSV4
>> +#define H_PTE_PKEY_BIT4	_RPAGE_RSV5
>> +
> 
> 
> If CONFIG_PPC_MEM_KEYS is not defined, all of them have to be 0.  How is
> that handled here?

why? conditional defines of pte bits always results in error, like we 
check for an overloaded key bit in some code path and taking wrong action.

> 
>>   /* 8 bytes per each pte entry */
>>   #define H_PTE_FRAG_SIZE_SHIFT  (H_PTE_INDEX_SIZE + 3)
>>   #define H_PTE_FRAG_NR	(PAGE_SIZE >> H_PTE_FRAG_SIZE_SHIFT)
>> diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h
>> index e53728ff29a0..bb880c97b87d 100644
>> --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h
>> +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h
>> @@ -16,6 +16,13 @@
>>   #define H_PAGE_BUSY	_RPAGE_RPN44     /* software: PTE & hash are busy */
>>   #define H_PAGE_HASHPTE	_RPAGE_RPN43	/* PTE has associated HPTE */
>>
>> +/* memory key bits. */
>> +#define H_PTE_PKEY_BIT0	_RPAGE_RSV1
>> +#define H_PTE_PKEY_BIT1	_RPAGE_RSV2
>> +#define H_PTE_PKEY_BIT2	_RPAGE_RSV3
>> +#define H_PTE_PKEY_BIT3	_RPAGE_RSV4
>> +#define H_PTE_PKEY_BIT4	_RPAGE_RSV5
>> +
> 
> same comment as above.
> 

-aneesh

  reply	other threads:[~2018-03-08  2:28 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-07 13:36 [PATCH 1/2] powerpc/mm/keys: Move pte bits to correct headers Aneesh Kumar K.V
2018-03-07 13:36 ` [PATCH 2/2] powerpc/mm/keys: Update documentation in key fault handling Aneesh Kumar K.V
2018-04-04 14:39   ` [2/2] " Michael Ellerman
2018-03-07 20:28 ` [PATCH 1/2] powerpc/mm/keys: Move pte bits to correct headers Ram Pai
2018-03-08  2:28   ` Aneesh Kumar K.V [this message]
2018-03-31 14:03 ` [1/2] " Michael Ellerman

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