From: "Richard Hendricks" <richard.hendricks@motorola.com>
To: linuxppc-embedded@lists.linuxppc.org
Subject: Re: Porting LinuxPPC
Date: Tue, 23 May 2000 16:01:21 -0500 [thread overview]
Message-ID: <392AF1A1.892D5886@motorola.com> (raw)
In-Reply-To: 00May23.171838est.115222@border.alcanet.com.au
Are you using a custom UPM table? This can happen when your UPM burst
table is not proper. Since bursts are not used by the core until
caching is disabled, problems usually come from the UPM table.
Daniel Wu wrote:
>
> Hi,
>
> Thanks to all who responsed to my last qeustion. The problem was that the immr
> was not setup correctly. Also since it is a custom board (MPC860T based), I had
> to rewrite code to fill in the bd_t structure. The board is now sending
> characters to the console, which is good but I still have one of the original
> problems: I can only step through the code using the BDM debugger, but when I
> run the code, it generates a software emulation exception and stops.
>
> After some investigation, it seems that I can run the code up to the point
> where the instructure cache is enabled - actually only a few lines at the top
> of the startup code. My question is: are there any restrictions on when the
> cache can be enabled? Are there anything else I've missed.
>
> Thanks,
> Daniel
>
--
MPC823 Applications Engineering Development
Get help from other MPC823 customers on the
comp.sys.powerpc.tech newsgroup!
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2000-05-23 21:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2000-05-19 4:31 Porting LinuxPPC Daniel Wu
2000-05-19 5:10 ` Graham Stoney
2000-05-19 8:09 ` Daniel Wu
2000-05-19 8:19 ` Graham Stoney
2000-05-19 11:07 ` Dan A. Dickey
2000-05-19 12:57 ` Daris A Nevil
2000-05-19 13:09 ` Ralph Blach
2000-05-19 15:50 ` Dan Malek
2000-05-23 7:18 ` Daniel Wu
2000-05-23 21:01 ` Richard Hendricks [this message]
2000-05-23 22:00 ` Richard Hendricks
[not found] ` <392A3147.3A9AC5C2@alcatel.com.au>
2000-05-30 7:49 ` Daniel Wu
2000-05-30 18:54 ` Tom Roberts
2000-05-19 11:39 ` Ralph Blach
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