From: Tom Roberts <tjroberts@lucent.com>
To: Embedded Linux PPC List <linuxppc-embedded@lists.linuxppc.org>
Subject: Re: allocating non-cacheable regions
Date: Wed, 31 May 2000 17:39:21 -0500 [thread overview]
Message-ID: <39359499.7B652D91@lucent.com> (raw)
In-Reply-To: 39358E65.145F7EA3@embeddededge.com
Dan Malek wrote:
> You need to invalidate the data cache for this address and the TLB
> entry for this address when you set the flag.
That is probably his problem.
> You also need to ensure you are not
> multiple mapping the same physical address....
No, that is not necessary, as long as your program is aware of the
multiple mapping. In certain cases (com buffers shared by two non-
snooping CPUs) this is quite useful -- use the uncached addrs for the
queue pointers and the cached addrs for the data (being careful to
manually flush the cache before reading and after writing).
You do need to ensure you are not mapping the same _virtual_ address
(i.e. the effective address, in the language of Motorola's manuals),
but the kernel routines will probably take care of that for you....
Tom Roberts tjroberts@lucent.com
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2000-05-31 22:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2000-05-03 15:47 allocating non-cacheable regions Steve Rossi
2000-05-03 19:52 ` Dan Malek
2000-05-04 6:45 ` MPC860 enet driver dony
2000-05-31 20:53 ` allocating non-cacheable regions Steve Rossi
2000-05-31 22:12 ` Dan Malek
2000-05-31 22:39 ` Tom Roberts [this message]
2000-06-01 13:01 ` Steve Rossi
2000-06-01 20:10 ` Steve Rossi
2000-06-02 14:24 ` Steve Rossi
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