MBX IDE

MBX IDE

[Jamie Guinan]

There was a thread back in November about getting IDE going on
an MBX,

http://lists.linuxppc.org/listarcs/linuxppc-embedded/199911/msg00054.html

Did anyone make any progress on this?  Meaning, is there a recent
kernel with working IDE-on-MBX.  I know its an oddball combination,
but I just wanted to check.

With a few tweaks to MontaVista 2.2.13, I get as far as seeing,

W82C105: IDE controller on PCI bus 00 dev 19
W82C105: not 100% native mode: will probe irqs later
SL82C105 command word: 5
IDE timing: 00000909, resetting to PIO0 timing
SL82C105 command word: 5
IDE timing: 000003e4, resetting to PIO0 timing

but the drive never gets detected in ide_scan_devices(), indirectly
because all of ide_hwifs[x].present are set to 0 (I'm in the middle
of tracing this back: ide_hwifs[x].noprobe fields set to 1 seem to be
preventing ide_hwfs[x].present getting set).

If anyone has a console dump of a working IDE-on-MBX, I'd like
to see it just to know what to expect.

And should I continue tweaking 2.2.13 or try 2.4.0-pre? (opinions)

Thanks,
-Jamie

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Re: MBX IDE

[Zirong Wang]

Jamie Guinan wrote:
>
> There was a thread back in November about getting IDE going on
> an MBX,
>
> http://lists.linuxppc.org/listarcs/linuxppc-embedded/199911/msg00054.html
>
> Did anyone make any progress on this?  Meaning, is there a recent
> kernel with working IDE-on-MBX.  I know its an oddball combination,
> but I just wanted to check.
>
> With a few tweaks to MontaVista 2.2.13, I get as far as seeing,
>
> W82C105: IDE controller on PCI bus 00 dev 19
> W82C105: not 100% native mode: will probe irqs later
> SL82C105 command word: 5
> IDE timing: 00000909, resetting to PIO0 timing
> SL82C105 command word: 5
> IDE timing: 000003e4, resetting to PIO0 timing
>

I had a similar problem with a MTX board (not MBX), and the final
thing that deblocked the situation was by changing the file
/usr/src/linux/driver/block/sl82c105.c

I simply enabled the winbond by changing the line

  pci_write_pci_config_dword(dev,0x40,0x10ff08a1) to

  pci_write_pci_config_dword(dev,0x40,0x10ff0011)

I am not sure for your case since this line is enclosed between
"#ifndef CONFIG_MBX", maybe you can try put the line outside the
"ifdef" construct?

I had changed the 0x44 register's value to 0x0260:
  pci_write_pci_config_dword(dev,0x44,0x0260)

hope this helps

---------------------------------------------------------------------
Zirong Wang    Oce Industries  1, Rue J. Lemoine 94015 Creteil France

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Re: MBX IDE

[Jamie Guinan]

On Wed, 28 Jun 2000, Jamie Guinan wrote:
>
> There was a thread back in November about getting IDE going on
> an MBX,
>
> http://lists.linuxppc.org/listarcs/linuxppc-embedded/199911/msg00054.html
>
> Did anyone make any progress on this? ...
<snip>

Well, many hours and printk's later,

  hda: 251350AT Maxtor 2.5" Disk Drive (C) 199, 1287MB w/58kB Cache,
  CHS=2616/16/63

I haven't tried formatting it yet, but I managed to write some
raw data on /dev/hda from a Linux program, then read it back in
EPPCBug.  Looks funny, every other 2bytes are 00's, but perhaps
that's expected for doing a blind write() on /dev/hda.

m8xx_setup.c doesn't seem to want both IDE and PCMCIA ATA devices
to exist at the same time, though.  Not sure what to do about that,
but first I have to study interrupts and PCI/ISA busses some
more (I'm a bit rusty on that subject matter).  If I can hack
them to both work at the same time for my own purposes, I'll
be happy.

-Jamie


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Re: MBX IDE

[Dan Malek]

Jamie Guinan wrote:

> m8xx_setup.c doesn't seem to want both IDE and PCMCIA ATA devices
> to exist at the same time, though.  Not sure what to do about that,


It's an interrupt routing issue.  In fact, all of the support
for SouthBridge/8259 controller parts on an 8xx is an interrupt
routing issue.  Mapping the internal interrupts from something
like the PCMCIA into the same space as the PCI/ISA has never
worked in the 8xx port.  You basically get to configure an
"8xx PC" or an "8xx embedded".  Cort and I are constantly working
on some better interrupt mapping scheme, some of it "sticks" in
the kernel sources.  The entire Linux kernel is either "PC" or
not.

I don't know of any production boards that support PCI with ISA
on an 8xx.  You can program the UPM to provide ISA bus timing,
or for a few pennies put a programmable device on the 8xx bus
if you want an IDE device.

> .....  If I can hack
> them to both work at the same time for my own purposes, I'll
> be happy.

You can.....It just won't run on anything else when you are done.


	-- Dan

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