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* FEC question about setting SIEL register
@ 2000-08-08  5:51 Graham Stoney
  2000-08-08  8:33 ` Murray Jensen
  2000-08-08 20:11 ` Dan Malek
  0 siblings, 2 replies; 3+ messages in thread
From: Graham Stoney @ 2000-08-08  5:51 UTC (permalink / raw)
  To: LinuxPPC Embedded Mailing List


Hi all,

I'm running the MontaVista 2.2.13 kernel with a few local mods on our custom
855T board, and I've just diagnosed a problem where the system would hang when
the Ethernet was disconnected/reconnected.  The culprit was that I hadn't
configured the PHY MII link interrupt (which is on external IRQ5 on our board)
as edge triggerred in the SIU Interrupt Edge/Level (SIEL) register.

I was tipped off by this comment in fec.c:

/* We need to sequentially read registers 1 and INTERRUPT_STATUS_REG to clear
 * the interrupt.  We don't need to do that here because this
 * is an edge triggered interrupt that has already been acknowledged
 * by the top level handler.  We also read the extended status
 * register CHIP_STATUS_REG.  We just queue the commands and let them happen
 * as part of the "normal" processing.
 */

Unfortunately, this helpful comment has been deleted from fec.c in 2.4.0; I
don't know how long it would have taken me to stumble on the cause of my
problem without this hint that the FEC driver expected the interrupt to be
edge triggered.

Setting the SIEL is trivial enough, but where abouts is the right place to
do it: in the fec.c driver, or in the 8xxrom/boot loader?  The FADS code in
fec.c doesn't set the SIEL, and it doesn't seem to be set in the FADS code in
8xxrom/fadsrom either, so I would conclude that it probably suffers the same
problem.

Comments?
Graham
--
Graham Stoney
Principal Hardware/Software Engineer
Canon Information Systems Research Australia
Ph: +61 2 9805 2909  Fax: +61 2 9805 2929

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: FEC question about setting SIEL register
  2000-08-08  5:51 FEC question about setting SIEL register Graham Stoney
@ 2000-08-08  8:33 ` Murray Jensen
  2000-08-08 20:11 ` Dan Malek
  1 sibling, 0 replies; 3+ messages in thread
From: Murray Jensen @ 2000-08-08  8:33 UTC (permalink / raw)
  To: linuxppc-embedded


On Tue, 8 Aug 2000 15:51:21 +1000 (EST), greyham@research.canon.com.au (Graham Stoney) writes:
>Setting the SIEL is trivial enough,

Yes, but this might save you 5 minutes, if you choose to do it in
the kernel :-)

--- arch/ppc/kernel/ppc8xx_pic.c	2000/04/25 11:08:12	1.1.1.4
+++ arch/ppc/kernel/ppc8xx_pic.c	2000/08/08 08:29:59
@@ -156,3 +156,20 @@
 	panic("request_irq");
 #endif
 }
+
+void
+m8xx_set_irq_sense(unsigned int irq_nr, int isedge)
+{
+	volatile uint *psiel = &((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel;
+	unsigned int mask;
+
+	if (irq_nr >= NR_SIU_INTS || (irq_nr & 1) != 0)
+		panic("m8xx_set_irq_sense got bad irq number (%d)", irq_nr);
+
+	mask = 1 << (31 - irq_nr);
+
+	if (isedge != 0)
+		*psiel |= mask;
+	else
+		*psiel &= ~mask;
+}
--- arch/ppc/kernel/ppc8xx_pic.h	1999/12/20 06:33:23	1.1.1.2
+++ arch/ppc/kernel/ppc8xx_pic.h	2000/01/24 06:49:15	1.3
@@ -18,4 +18,6 @@
 void mbx_i8259_action(int cpl, void *dev_id, struct pt_regs *regs);
 #endif

+void m8xx_set_irq_sense(unsigned int irq_nr, int isedge);
+
 #endif /* _PPC_KERNEL_PPC8xx_H */


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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: FEC question about setting SIEL register
  2000-08-08  5:51 FEC question about setting SIEL register Graham Stoney
  2000-08-08  8:33 ` Murray Jensen
@ 2000-08-08 20:11 ` Dan Malek
  1 sibling, 0 replies; 3+ messages in thread
From: Dan Malek @ 2000-08-08 20:11 UTC (permalink / raw)
  To: Graham Stoney; +Cc: LinuxPPC Embedded Mailing List


Graham Stoney wrote:


> ....  The culprit was that I hadn't
> configured the PHY MII link interrupt (which is on external IRQ5 on our board)
> as edge triggerred in the SIU Interrupt Edge/Level (SIEL) register.

Yeah....There are about a bazillion different pin multiplexing
combinations on these parts.  You really should have a very methodical
procedure to verify all of them, usually as part of the design process
before hardware CAD.


> Setting the SIEL is trivial enough, but where abouts is the right place to
> do it: in the fec.c driver, or in the 8xxrom/boot loader?

Normally I do all of this in a boot rom.  The I/O pin configuration
necessary to make even minimal forward progress must be done very early,
so I just do all of it there in one place.

> ......  The FADS code in
> fec.c doesn't set the SIEL,

Nope.  It never did.

> .... and it doesn't seem to be set in the FADS code in
> 8xxrom/fadsrom either, so I would conclude that it probably suffers the same
> problem.

It should be, but I screwed that up the first time.  The next logical
place (and where it used to exist), was in m8xx_setup.c in the
function m8xx_init_IRQ().  Since I don't have a FADS board any longer
for testing, and everyone else was connecting this interrupt to a
port C pin, the code just disappeared as part of the new interrupt
management.


	-- Dan

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^ permalink raw reply	[flat|nested] 3+ messages in thread

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2000-08-08  8:33 ` Murray Jensen
2000-08-08 20:11 ` Dan Malek

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