Re: Hdlc driver for SCC port

Re: Hdlc driver for SCC port

[Daris A Nevil]

Gerard,

The QSLinux kernel contains a complete SCC based HDLC/PPP driver.
Download the kernel from ftp://qslinux.org/pub/qslinux, decompress, and
then look in the directory snmc/qslinux/drivers/net.

Regards,
Daris Nevil
--
Daris A Nevil
Simple Network Magic Corporation
401 Kentucky Lane
McKinney, TX 75069
214-793-7757
dnevil@snmc.com
www.snmc.com
quickstack.com
qslinux.org

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Hdlc driver for SCC port

[Gérard Guével]

Hi,

Now I have a linux2.2.14 kernel which runs on my MPC860P board.
I would want to customize an hdlc driver on scc.

I saw, few days ago, Julia Elbert discusses about same subject.

Some help about what exists (structure, driver, howto, ...) would be
welcome.

Thanks

Gérard


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Re: Hdlc driver for SCC port

[Tobias Otto-Adamczak]

> Now I have a linux2.2.14 kernel which runs on my MPC860P board.
> I would want to customize an hdlc driver on scc.
> Some help about what exists (structure, driver, howto, ...) would be
> welcome.

I need to handle HDLC for my ISDN project on an MBX board. Progress is
slowly, because I am no expert. At the moment I can give away this
addition to commproc.h:

--- snip --------------------------------------------------------------

/*********   SCC parameter RAM for HDLC mode   *********/
typedef struct scc_hdlc {
	sccp_t	scc_gen;	/* generic SCC parameters */
	uint	scc_res1;	/* reserved */
	uint	scc_cmask;	/* CRC mask */
	uint	scc_cpres;	/* CRC preset */
	ushort	scc_disfc;	/* discarded frame counter */
	ushort	scc_crcec;	/* CRC error counter */
	ushort	scc_abtsc;	/* abort sequence counter */
	ushort	scc_nmarc;	/* nonmatching address receive counter */
	ushort	scc_retrc;	/* frame retransmission counter */
	ushort	scc_mflr;	/* Max frame length register */
	ushort	scc_maxcnt;	/* internal */
	ushort	scc_rfthr;	/* received frames threshold */
	ushort	scc_rfcnt;	/* internal */
	ushort	scc_hmask;	/* HDLC address mask register */
	ushort	scc_haddr1;	/* HDLC address register 1 */
	ushort	scc_haddr2;	/* HDLC address register 2 */
	ushort	scc_haddr3;	/* HDLC address register 3 */
	ushort	scc_haddr4;	/* HDLC address register 4 */
	ushort	scc_tmp;	/* internal */
	ushort	scc_tmp_mb;	/* internal */
} scc_hdlc_t;

--- snip --------------------------------------------------------------

Ciao - Tobias


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