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* Local-PCI bridge mapping
@ 2000-11-15 11:43 ajay.kunnath
  2000-11-15 23:52 ` Dan Malek
  0 siblings, 1 reply; 3+ messages in thread
From: ajay.kunnath @ 2000-11-15 11:43 UTC (permalink / raw)
  To: linuxppc-embedded


Hi,

I have a proprietary MPC860 board which has a PLX 9054 Local-PCI
bridge. I am running the 2.4.0 version of the kernel from
montavista.

My problem is that I am not able to map the configuration registers
to any other address but 0x80000000. When I map it to 0x80000000, it
works great, any other address and it just crashes. Below is the log
of what happened when I mapped the PLX to 0xF0000000.

NIP: C0077C3C XER: 00000000 LR: C0077C00 REGS: c01fde30 TRAP: 0300
MSR: 00009032 EE: 1 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c01fc000[1] 'swapper' Last syscall: -1
last math 00000000 last altivec 00000000
GPR00: 00000000 C01FDEE0 C01FC000 F0000000 C01FDEE8 C01FDEEA 00010000
A0000000
GPR08: 40000000 C00F0000 00000024 C00E7B80 84000029 100A11AC 00000000
00000000
GPR16: 00000000 00000000 00000000 00000000 FA202D64 001801B8 00380000
000031B3
GPR24: 00000000 FA202D00 FA202D40 00200075 00200000 F0000000 00000000
00000000
Call backtrace:
001801B8 C0078E20 C00F280C C00022B0 C0007650
Kernel panic: kernel access of bad area pc c0077c3c lr c0077c00 address
F00000F0 tsk swapper/1
Rebooting in 180 seconds..


Could someone please give me some insight into what the problem could be ?

Thanks,
Ajay

_______________________________________________________

If you don't strike oil in twenty minutes, stop boring.
- Andrew Carnegie, on public speaking
________________________________________________________

Ajay Kunnath
E Mail: ajay.kunnath@tek.com
Voice : 2215535 +3313

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: Local-PCI bridge mapping
  2000-11-15 11:43 Local-PCI bridge mapping ajay.kunnath
@ 2000-11-15 23:52 ` Dan Malek
  0 siblings, 0 replies; 3+ messages in thread
From: Dan Malek @ 2000-11-15 23:52 UTC (permalink / raw)
  To: ajay.kunnath; +Cc: linuxppc-embedded


ajay.kunnath@exgate.tek.com wrote:

> I have a proprietary MPC860 board which has a PLX 9054 Local-PCI
> bridge. I am running the 2.4.0 version of the kernel from
> montavista.

The PLX isn't supported as a PCI bridge in the 8xx kernel......
The 2.4.0 version of the kernel isn't supported in the CDK for
the 8xx either....If anything works you are just lucky.

> My problem is that I am not able to map the configuration registers
> to any other address but 0x80000000.

What do you mean "map"?  You use ioremap()?  When?

> .... When I map it to 0x80000000, it
> works great, any other address and it just crashes.

Depending upon what you mean by "map", most PCI bridges rely on
well known physical (bus) address or/and chip selects to function
properly, just like other devices attached to the processor.

Tell us how the PLX decodes the configuration space access as a
target, how your system has attached the PLX to the processor,
and we can probably help.  You are going to have to minimally write
a set of functions like those found in qspan_pci.c to accomodate
the PLX.


	-- Dan

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 3+ messages in thread

* RE: Local-PCI bridge mapping
@ 2000-11-16  6:24 ajay.kunnath
  0 siblings, 0 replies; 3+ messages in thread
From: ajay.kunnath @ 2000-11-16  6:24 UTC (permalink / raw)
  To: dan; +Cc: linuxppc-embedded


Hi Dan,

I have written the config read/write functions similar to the ones in
qspan_pci.c for plx.

> Depending upon what you mean by "map", most PCI bridges rely on
> well known physical (bus) address or/and chip selects to function
> properly, just like other devices attached to the processor.

You are correct in that the PLX has a chip select which results in
the its configuration registers being available. "Map" was clearly
the wrong word to use. :-)

The PLX requires a chip select for its internal registers, but does
not require one for the PCI image . The PLX9054 decodes all address
lines on the local bus and generates its own chip select.

The PLX uses address of the memory region used for "I/O" mapped devices
for PCI configuration cycles.

Thanks for the help.

-Ajay


-----Original Message-----
From: Dan Malek [mailto:dan@mvista.com]
Sent: Thursday, November 16, 2000 5:23 AM
To: Kunnath, Ajay
Cc: linuxppc-embedded@lists.linuxppc.org
Subject: Re: Local-PCI bridge mapping


ajay.kunnath@exgate.tek.com wrote:

> I have a proprietary MPC860 board which has a PLX 9054 Local-PCI
> bridge. I am running the 2.4.0 version of the kernel from
> montavista.

The PLX isn't supported as a PCI bridge in the 8xx kernel......
The 2.4.0 version of the kernel isn't supported in the CDK for
the 8xx either....If anything works you are just lucky.

> My problem is that I am not able to map the configuration registers
> to any other address but 0x80000000.

What do you mean "map"?  You use ioremap()?  When?

> .... When I map it to 0x80000000, it
> works great, any other address and it just crashes.

Depending upon what you mean by "map", most PCI bridges rely on
well known physical (bus) address or/and chip selects to function
properly, just like other devices attached to the processor.

Tell us how the PLX decodes the configuration space access as a
target, how your system has attached the PLX to the processor,
and we can probably help.  You are going to have to minimally write
a set of functions like those found in qspan_pci.c to accomodate
the PLX.


	-- Dan

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 3+ messages in thread

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