Fast Altivec

Fast Altivec

[Dan Malek]

I don't think of things like this......

Matt Porter thought people would be interested to know we are
showing a 750 MHz 7450 running Linux (linuxppc_2_5) here at Linux
World this week.


	-- Dan

--

	No interrupts please....just poll me.

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Re: Fast Altivec

[Troy Benjegerdes]

On Fri, Feb 02, 2001 at 11:32:23AM -0500, Dan Malek wrote:
>
> I don't think of things like this......
>
> Matt Porter thought people would be interested to know we are
> showing a 750 MHz 7450 running Linux (linuxppc_2_5) here at Linux
> World this week.

Heheheh, I have to ask.. is it really running that fast, and do you have all
the neat features turned on?


--------------------------------------------------------------------------
Troy Benjegerdes                'da hozer'                hozer@drgw.net


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Re: Fast Altivec

[Dan Malek]

Troy Benjegerdes wrote:

> Heheheh, I have to ask.. is it really running that fast, and do you have all
> the neat features turned on?


It's really running that fast, in fact I may try to push it up to 800
MHz
just to see.  There are switches on the board to select up to 16
different
speeds in 50 MHz increments.  I have version 2.02 of the silicon now,
and you certainly don't want to use anything older than that (and in
fact you probably won't ever see any).

I have L1/L2 caches working.  I started on the L3 stuff but ran out of
time for the demo.  I discovered someone "fixed" my original Media-Q
graphics driver by removing all of the PowerPC big endian fixes (and did
other things like ioremap and then in/out).  I spent too long sorting
this out instead of working on processor specific things.

There are a few little details that have to be fixed up on the code,
lots of PVR things and a few new bits in some registers.

I also think the POWER3/POWER4 changes are not being done correctly.
There is too much overlap between the processor and the platform.  The
POWERx ifdefs should only be related to the processor, not how the
platform maps stuff to PCI or other things.  Since the 7450 has a 36-bit
addressing capability, I wanted to use some of the changes along the
POWERx
path to help out.  More on that later..........


	-- Dan

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Power3/4 Was: Re: Fast Altivec

[Tom Gall]

Dan Malek wrote:

> I also think the POWER3/POWER4 changes are not being done correctly.
> There is too much overlap between the processor and the platform.  The
> POWERx ifdefs should only be related to the processor, not how the
> platform maps stuff to PCI or other things.  Since the 7450 has a 36-bit
> addressing capability, I wanted to use some of the changes along the
> POWERx
> path to help out.  More on that later..........

Hi Dan,

  Point well taken. That does raise the question tho as to how to manage the set
of changes necessary for the Power3 family of machines. At the moment it is nice
that one define handles issues for the entire family of boxes. But you are right
it could be split and I can see the case for making the split.
  Which set of changes are you interested in using for the 7450? You say the chip
has 36 bit addressing, how does that work?

  6392 messages yet to read... ug!  Boy am I behind in mail since LinuxWorld...

--
Hakuna Matata,

Tom

-----------------------------------------------------------
PPC Linux Guy      "My heart is human, my blood is boiling,
                    my brain IBM" -- Mr Roboto, Styxx
tgall@rochcivictheatre.org


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Re: Power3/4 Was: Re: Fast Altivec

[Dan Malek]

Tom Gall wrote:

> .... At the moment it is nice
> that one define handles issues for the entire family of boxes.

I learned years ago when I did a processor port it was important to
separate the processor and platform specific configuration definitions.
When you do that second platform that uses the same processor you will
discover how badly it was integrated :-).

> .... But you are right
> it could be split and I can see the case for making the split.

It seems like these are CHRP machines with some kind of extended address
bus mapping?  We either need to devise a new configuration name or
integrate the changes with some "CHRP extension" that isn't based on
the POWERx configuration.

>   Which set of changes are you interested in using for the 7450? You say the chip
> has 36 bit addressing, how does that work?

It can use a 36-bit physical address bus, so any processor register that
holds a physical address (SDR, page tables, etc) has "extended" bits
that
can be used when the proper configuration bits are set in the HID0.

I was going to use some of the I/O mapping functions (often with
comments
like "big hack" in them :-), to support this as well.  Generally, I am
looking at some VM changes that allow us to support beyond 4G
virtual/physical
with 32-bit processors (other than using the HIGHMEM hack).  Some of the
things in BRIDGE64 and POWERx are appropriate to use but seem to have
knowledge of the underlying platform, so a slightly different
configuration
name and minor code changes would be useful.  I just started looking and
still have lots of work to do here.

>   6392 messages yet to read... ug!  Boy am I behind in mail since LinuxWorld...

Heh...


	-- Dan

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