diff -urN linuxppc_2_4.orig/arch/ppc/8xx_io/commproc.h linuxppc_2_4/arch/ppc/8xx_io/commproc.h
--- linuxppc_2_4.orig/arch/ppc/8xx_io/commproc.h	Thu Mar  8 05:00:16 2001
+++ linuxppc_2_4/arch/ppc/8xx_io/commproc.h	Fri Mar  9 15:16:17 2001
@@ -584,6 +584,45 @@
 #define SICR_ENET_CLKRT	((uint)0x00260000)
 #endif	/* CONFIG_SM850 */

+/***  FADS  **********************************************************/
+
+#ifdef CONFIG_FADS
+
+#ifdef CONFIG_SCC1_ENET
+/* Bits in parallel I/O port registers that have to be set/cleared
+ * to configure the pins for SCC1 use.
+ * TCLK - CLK1, RCLK - CLK2.
+ */
+#define PA_ENET_RXD	((ushort)0x0001)
+#define PA_ENET_TXD	((ushort)0x0002)
+#define PA_ENET_TCLK	((ushort)0x0100)
+#define PA_ENET_RCLK	((ushort)0x0200)
+#define PB_ENET_TENA	((uint)0x00001000)
+#define PC_ENET_CLSN	((ushort)0x0010)
+#define PC_ENET_RENA	((ushort)0x0020)
+
+/* Control bits in the SICR to route TCLK (CLK1) and RCLK (CLK2) to
+ * SCC1.  Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
+ */
+#define SICR_ENET_MASK	((uint)0x000000ff)
+#define SICR_ENET_CLKRT	((uint)0x0000002c)
+#endif /* CONFIG_SCC1_ENET */
+
+#ifdef CONFIG_SCC2_ENET
+#define PA_ENET_RXD	((ushort)0x0004)
+#define PA_ENET_TXD	((ushort)0x0008)
+#define PA_ENET_TCLK	((ushort)0x0400)
+#define PA_ENET_RCLK	((ushort)0x0200)
+#define PB_ENET_TENA	((uint)0x00002000)
+#define PC_ENET_CLSN	((ushort)0x0040)
+#define PC_ENET_RENA	((ushort)0x0080)
+
+#define SICR_ENET_MASK	((uint)0x0000ff00)
+#define SICR_ENET_CLKRT	((uint)0x00002e00)
+#endif /* CONFIG_SCC2_ENET */
+
+#endif /* CONFIG_FADS */
+
 /*********************************************************************/

 /* SCC Event register as used by Ethernet.
diff -urN linuxppc_2_4.orig/arch/ppc/config.in linuxppc_2_4/arch/ppc/config.in
--- linuxppc_2_4.orig/arch/ppc/config.in	Thu Mar  8 05:00:12 2001
+++ linuxppc_2_4/arch/ppc/config.in	Fri Mar  9 15:16:17 2001
@@ -67,7 +67,8 @@
  	 IVMS8		CONFIG_IVMS8		\
  	 SM850		CONFIG_SM850		\
 	 MBX		CONFIG_MBX		\
-	 WinCept	CONFIG_WINCEPT"		RPX-Lite
+	 WinCept	CONFIG_WINCEPT		\
+	 FADS		CONFIG_FADS"		RPX-Lite

   if [ "$CONFIG_TQM823L" = "y" -o \
        "$CONFIG_TQM850L" = "y" -o \
diff -urN linuxppc_2_4.orig/include/asm-ppc/fads.h linuxppc_2_4/include/asm-ppc/fads.h
--- linuxppc_2_4.orig/include/asm-ppc/fads.h	Thu Mar  8 05:00:15 2001
+++ linuxppc_2_4/include/asm-ppc/fads.h	Fri Mar  9 15:18:57 2001
@@ -16,6 +16,8 @@
 	unsigned int	bi_memsize;	/* Memory (end) size in bytes */
 	unsigned int	bi_intfreq;	/* Internal Freq, in Hz */
 	unsigned int	bi_busfreq;	/* Bus Freq, in Hz */
+	unsigned char	bi_enetaddr[6];
+	unsigned int	bi_baudrate;
 } bd_t;

 extern bd_t m8xx_board_info;
@@ -24,16 +26,38 @@
  * I tried to follow the FADS manual, although the startup PROM
  * dictates this.
  */
-#define BCSR_ADDR		((uint)0x02100000)
+#define BCSR_ADDR		((uint)0xff010000)
 #define BCSR_SIZE		((uint)(64 * 1024))
-#define	BCSR0			((uint)0x02100000)
-#define	BCSR1			((uint)0x02100004)
-#define	BCSR2			((uint)0x02100008)
-#define	BCSR3			((uint)0x0210000c)
-#define	BCSR4			((uint)0x02100010)
-#define IMAP_ADDR		((uint)0x02200000)
+#define	BCSR0			((uint)0xff010000)
+#define	BCSR1			((uint)0xff010004)
+#define	BCSR2			((uint)0xff010008)
+#define	BCSR3			((uint)0xff01000c)
+#define	BCSR4			((uint)0xff010010)
+#define IMAP_ADDR		((uint)0xff000000)
 #define IMAP_SIZE		((uint)(64 * 1024))
-#define PCMCIA_MEM_ADDR		((uint)0x04000000)
+#define PCMCIA_MEM_ADDR		((uint)0xe0000000)
 #define PCMCIA_MEM_SIZE		((uint)(64 * 1024))
+
+/* Bits of interest in the BCSRs.
+*/
+#define BCSR1_ETHEN		((uint)0x20000000)
+#define BCSR1_RS232EN_1		((uint)0x01000000)
+#define BCSR4_ETHLOOP		((uint)0x80000000)	/* EEST Loopback */
+#define BCSR4_EEFDX		((uint)0x40000000)	/* EEST FDX enable */
+#define BCSR4_FETH_EN		((uint)0x08000000)	/* PHY enable */
+#define BCSR4_FETHCFG0		((uint)0x04000000)	/* PHY autoneg mode */
+#define BCSR4_FETHFDE		((uint)0x02000000)	/* PHY FDX advertise */
+
+/* Interrupt level assignments.
+*/
+#define FEC_INTERRUPT	SIU_LEVEL1	/* FEC interrupt */
+
+/* We don't use the 8259.
+*/
+#define NR_8259_INTS	0
+
+/* Machine type
+*/
+#define _MACH_8xx (_MACH_fads)

 #endif