From: Dan Malek <dan@mvista.com>
To: John Francis <johnfrancsis@yahoo.com>
Cc: linuxppc-embedded@lists.linuxppc.org
Subject: Re: Using IDMA1 ( or IDMA2 ) on 860
Date: Sun, 19 Aug 2001 15:50:20 -0400 [thread overview]
Message-ID: <3B80187C.4743F780@mvista.com> (raw)
In-Reply-To: 20010819190624.51260.qmail@web20105.mail.yahoo.com
John Francis wrote:
> ..... on hardware
> side I do see the DREQ line going low and I have
> verified that RCCR register for CPM is set correctly
> to level trigger the interrupt.
>
> Any ideas on why IDMA1 interrupt handler is not
> getting invoked?
The DREQ has nothing to do with generating an interrupt, it
is a data transfer handshake signal. The configuration of
this pin is determined by the system design, connection to
the peripheral for data transfer and the configuration of
the memory controller.
The configuration of the IDMA channel, including the buffer
descriptors, will determine how and when the CPM interrupt
will occur.
-- Dan
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2001-08-19 19:50 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-08-19 19:06 Using IDMA1 ( or IDMA2 ) on 860 John Francis
2001-08-19 19:50 ` Dan Malek [this message]
2001-08-19 20:33 ` John Francis
2001-08-19 20:41 ` Dan Malek
2001-08-20 19:16 ` John Francis
2001-08-20 19:35 ` Dan Malek
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