From: "David Müller (ELSOFT AG)" <d.mueller@elsoft.ch>
To: andrew may <acmay@acmay.homeip.net>
Cc: Armin <akuster@pacbell.net>,
Stefan Roese <stefan.roese@esd-electronics.com>,
linuxppc-embedded@lists.linuxppc.org
Subject: Re: PPC405gp enet Soft Reset
Date: Mon, 11 Feb 2002 12:55:05 +0100 [thread overview]
Message-ID: <3C67B119.4080702@elsoft.ch> (raw)
In-Reply-To: 20020208120140.B27732@ecam.san.rr.com
Hi
andrew may wrote:
> On Fri, Feb 08, 2002 at 10:53:14AM +0000, Armin wrote:
>
>>Andrew & Stefan,
>>
>>The softrest could probably be removed from the _init. its dup'd in _open.
>>
>
> Here is another problem I have with find_phy, that it seems that mii reads to
> reg 2 of a non-existent address does not return an error but a read to reg 3
> does.
>
> Here is a log from ppcboot since it is easy to test this there without doing
> a kernel build. My phy is at address 0x1f.
>
> => mii read 0x1 2
> 07FF
> => mii read 0x1 3
> read err 3
> a2: read: EMAC_STACR=0xffffc023, i=2
> Error reading from the PHY
> 07FF
>
I'm seeing this error too on our boards. But i'm not certain, if it's a
problem of the MII controller in the 405 or a problem of the LXT971.
What revision of the 405 do you have? What clock frequency your 405 run at?
Dave
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2002-02-11 11:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-02-08 3:17 PPC405gp enet Soft Reset andrew may
2002-02-08 10:03 ` Stefan Roese
2002-02-08 18:35 ` andrew may
2002-02-08 10:53 ` Armin
2002-02-08 20:01 ` andrew may
2002-02-11 11:55 ` David Müller (ELSOFT AG) [this message]
2002-02-12 0:49 ` andrew may
2002-02-13 8:37 ` 405 MII-PHY communication problem (was: Re: PPC405gp enet Soft Reset) David Müller (ELSOFT AG)
2002-02-13 15:15 ` Stefan Roese
2002-02-19 12:05 ` David Müller (ELSOFT AG)
2002-02-19 12:21 ` Stefan Roese
2002-02-22 0:56 ` andrew may
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