From: Dan Malek <dan@embeddededge.com>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: linuxppc-embedded@lists.linuxppc.org, Paul Mackerras <paulus@samba.org>
Subject: Re: First cut at large page support on 40x
Date: Wed, 05 Jun 2002 13:25:53 -0400 [thread overview]
Message-ID: <3CFE49A1.7080105@embeddededge.com> (raw)
In-Reply-To: 20020605001034.GB17752@zax
David Gibson wrote:
> Hang on, I'm not clear about this. Does your PMD contain an entry to
> be loaded into the TLB or not?
Yes (well, it's supposed to :-). The PMD is loaded into the xx_TWC
register and the PTE into the xx_RPN register. The bits in the PMD/TWC
contain the page size information, those in the PTE/RPN contain the
remainder of the control/status and real page number. I don't have it
working quite right yet, but the bits are all aligned very nicely in
the hardware to make this happen regardless of the page size.
The basic logic on the 8xx is trivial. Load the PMD into the TWC, the PTE
into the RPN, and you are done. The PMD still has the pointer to the PTE
page, and the 8xx provides a hardware assist using that to give you the
pointer to the PTE. The only thing we have to do in software is update
the accessed bit in the PTE. The least significant bits of the PMD contain
the page size and cache control for the page, the PTE is identical to what
we have always used.
> ..... In my implemention the PMD entry
> itself contains the data to load into TLB_DATA (except that we borrow
> the top three bits of ZSEL for the page size). Since we're doing that
> there's no room in the entry for a pointer to a page of PTEs.
You may want to consider just emulating something like I have done. Just
leave the page table structure alone, and use the LS bits of the PMD to
store the page size information (or anything else useful). This way, the
Linux page tables remain intact, and the only change I needed was to
actually test for a PMD_VALID flag and ignore the least significant bits when
constructing a pointer to the PTE table. The background debuggers that know
how to peruse the page tables will continue to work properly, the memory
management functions will work properly, and chances are the 4xx tlb miss handler
won't require any special case branches when loading the TLB either.
All of the framework for this is already done for the 8xx, I just have
not committed the function that scans the page tables and modifies the PMD
for the larger page.
-- Dan
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2002-06-05 17:25 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-05-31 4:21 First cut at large page support on 40x David Gibson
2002-05-31 4:31 ` David Gibson
2002-06-04 0:43 ` Dan Malek
2002-06-04 3:59 ` David Gibson
2002-06-04 17:42 ` Dan Malek
2002-06-05 0:10 ` David Gibson
2002-06-05 17:25 ` Dan Malek [this message]
2002-06-06 1:35 ` David Gibson
2002-06-06 4:57 ` Dan Malek
2002-06-05 22:29 ` Paul Mackerras
2002-06-06 4:48 ` Dan Malek
2002-06-06 5:44 ` Paul Mackerras
2002-06-06 7:58 ` Dan Malek
2002-06-06 8:17 ` David Gibson
2002-06-12 3:52 ` David Gibson
2002-06-12 6:15 ` Dan Malek
2002-06-12 6:43 ` David Gibson
2002-06-12 15:19 ` Tom Rini
2002-06-12 23:23 ` Dan Malek
2002-06-12 23:42 ` Paul Mackerras
2002-06-13 0:28 ` Dan Malek
2002-06-13 1:01 ` Paul Mackerras
2002-06-13 4:16 ` Dan Malek
2002-06-13 5:12 ` David Gibson
2002-06-13 7:26 ` Dan Malek
2002-06-13 1:38 ` Paul Mackerras
2002-06-13 4:47 ` Dan Malek
2002-06-13 18:13 ` Armin
2002-06-14 0:33 ` David Gibson
2002-06-12 23:49 ` Paul Mackerras
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