Re: First cut at large page support on 40x

[Dan Malek <dan@embeddededge.com>]

David Gibson wrote:

> Because any driver that relies on it working....

Just a joke, lighten up :-)  That's what thse things :-) :-) are all about.


> Huh?  First you say it isn't the drivers, then you say it is the
> drivers.

Arrgh.......actually it was a kernel problem............
IIRC, the first place I saw the problem was someone trying to build
an S/G list and we didn't look up the addresses correctly.

The bottom line is iopa() did the right thing when used on proper
lowmem addresses, and in case someone stumbled across something
we had remapped it also did the right thing.  I'm not out to be
pointing blame at drivers and I quite dislike the "don't do it
that way" response when the solution is so trivial.  We implemented
a solution (many different ways over time) to provide uncached
memory, and sometimes it didn't work right for some drivers.  This
solved the problem without me having to spend time debugging or
modifying drivers I didn't care to know anything about.  If we don't
need it anymore, then throw it away, but just make sure we don't
need it anymore.


> Err.. not me.  I ain't on any MIPS lists.  Nor do I recall writing
> anything about the eepre100 driver recently.

I didn't believe I indicated you did.  It was a comment to Paul's
statement that there is still discussion about cache line alignment
and sharing.  You can learn things from reading what some of the
other people are doing, though :-)


	-- Dan

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