From: Dan Malek <dan@embeddededge.com>
To: joakim.tjernlund@lumentis.se
Cc: linuxppc-embedded@lists.linuxppc.org
Subject: Re: MPC860 reorder and invalidate dcache
Date: Fri, 16 Aug 2002 19:20:37 -0400 [thread overview]
Message-ID: <3D5D88C5.9030402@embeddededge.com> (raw)
In-Reply-To: IGEFJKJNHJDCBKALBJLLEELOFFAA.joakim.tjernlund@lumentis.se
Joakim Tjernlund wrote:
> I wonder if the MPC860 really can reorder I/O memory accesses?
I don't believe so. I have sloppily written code that would have
shown problems if it did, and have never seen it occur.
> .... affects performance somewhat.
> Is the wmb() required or can I skip it?
Can you actually quantify the performance difference and is it important?
I would strongly recommend using all of the proper memory/IO barriers since
you never know what will happen with a new version of processor. It is
also nice to do this for someone that may wish to use the code in a more
general manner. :-)
> Is there a faster way to invalidate the dcache for a big(256KB) area than using invalidate_dcache_range().
> The area is PAGE aligned.
There are cache operations using SPRs unique to the 8xx that can do this, however,
I'm not sure it saves much over using the standard PowerPC functions. They are mostly
useful during initialization and for special static MMU applications.
-- Dan
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2002-08-16 23:20 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-08-12 21:33 linuxppc_2_4_dev tree Cameron, Steve
2002-08-16 15:50 ` MPC860 reorder and invalidate dcache Joakim Tjernlund
2002-08-16 23:20 ` Dan Malek [this message]
2002-08-17 11:40 ` Joakim Tjernlund
2002-08-17 13:33 ` Dan Malek
2002-08-17 14:21 ` Joakim Tjernlund
2002-08-17 16:19 ` Dan Malek
2002-08-18 22:04 ` Joakim Tjernlund
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