* Configure 8xx_io in 2.4.21-pre3
@ 2003-01-14 5:07 Xiaogeng (Shawn) Jin
0 siblings, 0 replies; 4+ messages in thread
From: Xiaogeng (Shawn) Jin @ 2003-01-14 5:07 UTC (permalink / raw)
To: linuxppc-embedded
The 8xx CPM configuration in 2.4.4 release from DENX has more options
than any other release, including 2.4.21-pre3. For example,
CONFIG_SMC1_UART is in 2.4.4 (DENX). My board uses SMC1 as UART. I
almost needn't to change anything in 2.4.4-denx to make my 8xx CPM
working. I'm trying to migrate the kernel to 2.4.21 and the kernel is
stuck in my_console_write() and no any message is shown on the console.
So I think the problem is in CPM settings. I enabled the following
configuations for MPC8xx CPM.
CONFIG_FEC_ENET=y
CONFIG_USE_MDIO=y
CONFIG_FEC_LXT971=y
CONFIG_8xx_COPYBACK=y
CONFIG_UCODE_PATCH=y
How can I set CPM correctly in 2.4.21? Any hints are greatly appreciated.
- Shawn.
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: Configure 8xx_io in 2.4.21-pre3
@ 2003-01-14 16:06 James Don
2003-01-14 17:59 ` Xiaogeng (Shawn) Jin
0 siblings, 1 reply; 4+ messages in thread
From: James Don @ 2003-01-14 16:06 UTC (permalink / raw)
To: 'linuxppc-embedded@lists.linuxppc.org'
Hi Xiaogeng...
Here are some things I would check :
1.) I recommend start with UART only build of the kernel first
2.) Did you check that your PA,PB,PC, and PD pins are set up properly ...
I my custom board had pins moved for things like enet on SCC ? However
normally I believe SMC1 only can be on one pair of pins for a UART ...
another
3.) Another thing to look at is your BRG clock for your board ... in my
kernel I found mvista didn't look at the some parts of the hardware reset
word that divide down my 80 Mhz reference intenerally before it goes to the
brg ... I was really surprised this code wasn't there ...
Good luck,
Jim
-----Original Message-----
From: Xiaogeng (Shawn) Jin [mailto:xjin@redswitch.com]
Sent: Tuesday, January 14, 2003 12:08 AM
To: linuxppc-embedded@lists.linuxppc.org
Subject: Configure 8xx_io in 2.4.21-pre3
The 8xx CPM configuration in 2.4.4 release from DENX has more options
than any other release, including 2.4.21-pre3. For example,
CONFIG_SMC1_UART is in 2.4.4 (DENX). My board uses SMC1 as UART. I
almost needn't to change anything in 2.4.4-denx to make my 8xx CPM
working. I'm trying to migrate the kernel to 2.4.21 and the kernel is
stuck in my_console_write() and no any message is shown on the console.
So I think the problem is in CPM settings. I enabled the following
configuations for MPC8xx CPM.
CONFIG_FEC_ENET=y
CONFIG_USE_MDIO=y
CONFIG_FEC_LXT971=y
CONFIG_8xx_COPYBACK=y
CONFIG_UCODE_PATCH=y
How can I set CPM correctly in 2.4.21? Any hints are greatly appreciated.
- Shawn.
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Configure 8xx_io in 2.4.21-pre3
2003-01-14 16:06 James Don
@ 2003-01-14 17:59 ` Xiaogeng (Shawn) Jin
0 siblings, 0 replies; 4+ messages in thread
From: Xiaogeng (Shawn) Jin @ 2003-01-14 17:59 UTC (permalink / raw)
To: James Don; +Cc: 'linuxppc-embedded@lists.linuxppc.org'
Hi Jim,
Thank you for your suggestions. I had a working 2.4.4 (released by DENX)
kernel on my board, which has more stuff related to 8xx_io than
2.4.21-pre3. I don't know if those DENX-added stuff are necessary to
enable 8xx CPM or if the 8xx_io code in 2.4.21 is sufficient to make 8xx
CPM working. Probably I need to compare the code in these two versions
line by line.
- Shawn.
> 1.) I recommend start with UART only build of the kernel first
>
> 2.) Did you check that your PA,PB,PC, and PD pins are set up properly ...
>
> I my custom board had pins moved for things like enet on SCC ? However
> normally I believe SMC1 only can be on one pair of pins for a UART ...
> another
>
> 3.) Another thing to look at is your BRG clock for your board ... in my
> kernel I found mvista didn't look at the some parts of the hardware reset
> word that divide down my 80 Mhz reference intenerally before it goes to the
> brg ... I was really surprised this code wasn't there ...
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: Configure 8xx_io in 2.4.21-pre3
@ 2003-01-14 18:02 James Don
0 siblings, 0 replies; 4+ messages in thread
From: James Don @ 2003-01-14 18:02 UTC (permalink / raw)
To: 'Xiaogeng (Shawn) Jin', James Don
Cc: 'linuxppc-embedded@lists.linuxppc.org'
Wish I could help ... I have been mostly using a mvista source tree
though...
And I have never tried to switch kernel versions yet ;-)
Jim
-----Original Message-----
From: Xiaogeng (Shawn) Jin [mailto:xjin@redswitch.com]
Sent: Tuesday, January 14, 2003 12:59 PM
To: James Don
Cc: 'linuxppc-embedded@lists.linuxppc.org'
Subject: Re: Configure 8xx_io in 2.4.21-pre3
Hi Jim,
Thank you for your suggestions. I had a working 2.4.4 (released by DENX)
kernel on my board, which has more stuff related to 8xx_io than
2.4.21-pre3. I don't know if those DENX-added stuff are necessary to
enable 8xx CPM or if the 8xx_io code in 2.4.21 is sufficient to make 8xx
CPM working. Probably I need to compare the code in these two versions
line by line.
- Shawn.
> 1.) I recommend start with UART only build of the kernel first
>
> 2.) Did you check that your PA,PB,PC, and PD pins are set up properly ...
>
> I my custom board had pins moved for things like enet on SCC ? However
> normally I believe SMC1 only can be on one pair of pins for a UART ...
> another
>
> 3.) Another thing to look at is your BRG clock for your board ... in my
> kernel I found mvista didn't look at the some parts of the hardware reset
> word that divide down my 80 Mhz reference intenerally before it goes to
the
> brg ... I was really surprised this code wasn't there ...
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 4+ messages in thread
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