From: Jan Damborsky <Jan.Damborsky@devcom.cz>
To: "Wells, Charles" <Charles.Wells@nielsenmedia.com>
Cc: linuxppc-embedded@lists.linuxppc.org
Subject: Re: Problem with data cache on MPC823E - now solved
Date: Mon, 27 Jan 2003 13:18:19 +0100 [thread overview]
Message-ID: <3E35238B.6010205@devcom.cz> (raw)
In-Reply-To: DF2B720CF774D21189EE00805FA7FA220517835A@nmrusdunsx3.nielsenmedia.com
Wells, Charles wrote:
>Jan,
>
>While reviewing your original email, I noticed the following statement.
>
>
>
>>May be it is because we have floating BI (burst inhibit) CPU singnal.
>>
>>
>
>My MPC823UM manual (Rev 1, p. 13-36, section 13.4.9.2 BURST INHIBIT SIGNAL)
>states the following:
>
> "This signal must be pulled up to Vdd with a pullup resistor."
>
>This is shown in figure 13-24. Have you tried adding a pullup resistor?
>
OK, I have had to persuade development stuff for connecting pullup to BI
signal directly to
the printed circuit board (PCB) carying MPC823 chip (not so big problem,
it seems that all CPU
pins are accesible from the top side of this little PCB). And for now
all is working OK !!! Data cache
in copyback mode, instruction cache, LCD controller drives our TFT
without problems as well.
Thank you very much for your help
Jan Damborsky
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
prev parent reply other threads:[~2003-01-27 12:18 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <DF2B720CF774D21189EE00805FA7FA220517835A@nmrusdunsx3.nielsenmedia.com>
2003-01-27 7:42 ` Problem with data cache on MPC823E Jan Damborsky
2003-01-27 12:18 ` Jan Damborsky [this message]
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