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([2600:1700:2000:b002:f8a3:26ec:ac85:392e]) by smtp.gmail.com with ESMTPSA id d17-20020a0cf6d1000000b0067a18167533sm3380983qvo.83.2023.12.11.08.16.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Dec 2023 08:16:15 -0800 (PST) Message-ID: <3f28c1f7-f29c-461f-a90e-58d8e0996cc0@sifive.com> Date: Mon, 11 Dec 2023 10:16:14 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 09/12] riscv: Add support for kernel-mode FPU Content-Language: en-US To: Christoph Hellwig References: <20231208055501.2916202-1-samuel.holland@sifive.com> <20231208055501.2916202-10-samuel.holland@sifive.com> From: Samuel Holland In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, loongarch@lists.linux.dev, linux-riscv@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 2023-12-11 10:11 AM, Christoph Hellwig wrote: >> +#ifdef __riscv_f >> + >> +#define kernel_fpu_begin() \ >> + static_assert(false, "floating-point code must use a separate translation unit") >> +#define kernel_fpu_end() kernel_fpu_begin() >> + >> +#else >> + >> +void kernel_fpu_begin(void); >> +void kernel_fpu_end(void); >> + >> +#endif > > I'll assume this is related to trick that places code in a separate > translation unit, but I fail to understand it. Can you add a comment > explaining it? Yes, I can add a comment. Here, __riscv_f refers to RISC-V's F extension for single-precision floating point, which is enabled by CC_FLAGS_FPU.