From: Michael Ellerman <mpe@ellerman.id.au>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
benh@kernel.crashing.org, paulus@samba.org
Cc: linuxppc-dev@lists.ozlabs.org,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: Re: [V2, 02/10] powerpc/mm/radix: Update to tlb functions ric argument
Date: Wed, 15 Jun 2016 22:37:03 +1000 (AEST) [thread overview]
Message-ID: <3rV5cb1MMwz9t1T@ozlabs.org> (raw)
In-Reply-To: <1465395958-21349-3-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On Wed, 2016-08-06 at 14:25:50 UTC, "Aneesh Kumar K.V" wrote:
> Radix invalidate control (RIC) is used to control which cache to flush
> using tlb instructions. When doing a PID flush, we currently flush
> everything including page walk cache. For address range flush, we flush
> only the TLB. In the later patch, we add support for flushing only
> page walk cache.
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Applied to powerpc fixes, thanks.
https://git.kernel.org/powerpc/c/36194812a4063dd2a72070aec3
cheers
next prev parent reply other threads:[~2016-06-15 12:37 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-08 14:25 [PATCH V2 00/10] Fixes for Radix support Aneesh Kumar K.V
2016-06-08 14:25 ` [PATCH V2 01/10] Fix .long's in mm/tlb-radix.c to more meaningful Aneesh Kumar K.V
2016-06-08 14:25 ` [PATCH V2 02/10] powerpc/mm/radix: Update to tlb functions ric argument Aneesh Kumar K.V
2016-06-15 12:37 ` Michael Ellerman [this message]
2016-06-08 14:25 ` [PATCH V2 03/10] powerpc/mm/radix: Flush page walk cache when freeing page table Aneesh Kumar K.V
2016-06-15 12:37 ` [V2, " Michael Ellerman
2016-06-08 14:25 ` [PATCH V2 04/10] powerpc/mm/radix: Update LPCR HR bit as per ISA Aneesh Kumar K.V
2016-06-08 14:25 ` [PATCH V2 05/10] powerpc/mm: use _raw variant of page table accessors Aneesh Kumar K.V
2016-06-08 14:25 ` [PATCH V2 06/10] powerpc/mm: Compile out radix related functions if RADIX_MMU is disabled Aneesh Kumar K.V
2016-06-08 14:25 ` [PATCH V2 07/10] powerpc/hash: Use the correct ppp mask when updating hpte Aneesh Kumar K.V
2016-06-15 12:37 ` [V2, " Michael Ellerman
2016-06-08 14:25 ` [PATCH V2 08/10] powerpc/mm: Clear top 16 bits of va only on older cpus Aneesh Kumar K.V
2016-06-09 6:19 ` Aneesh Kumar K.V
2016-06-14 4:57 ` [V2, " Michael Ellerman
2016-06-14 7:13 ` Aneesh Kumar K.V
2016-06-08 14:25 ` [PATCH V2 09/10] powerpc/mm: Print formation regarding the the MMU mode Aneesh Kumar K.V
2016-06-08 14:25 ` [PATCH V2 10/10] powerpc/mm/hash: Update SDR1 size encoding as documented in ISA 3.0 Aneesh Kumar K.V
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