From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ozlabs.org (ozlabs.org [103.22.144.67]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3rrTvB3kVvzDqyr for ; Fri, 15 Jul 2016 20:53:26 +1000 (AEST) In-Reply-To: <1468444634-1866-13-git-send-email-imunsie@au.ibm.com> To: Ian Munsie , Michael Neuling , Frederic Barrat , Andrew Donnellan , linuxppc-dev@lists.ozlabs.org, Huy Nguyen From: Michael Ellerman Cc: Ian Munsie Subject: Re: [12/15] cxl: Workaround PE=0 hardware limitation in Mellanox CX4 Message-Id: <3rrTvB2hz8z9sDG@ozlabs.org> Date: Fri, 15 Jul 2016 20:53:26 +1000 (AEST) List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Wed, 2016-13-07 at 21:17:11 UTC, Ian Munsie wrote: > From: Ian Munsie > > The CX4 card cannot cope with a context with PE=0 due to a hardware > limitation, resulting in: > > [ 34.166577] command failed, status limits exceeded(0x8), syndrome 0x5a7939 > [ 34.166580] mlx5_core 0000:01:00.1: Failed allocating uar, aborting > > Since the kernel API allocates a default context very early during > device init that will almost certainly get Process Element ID 0 there is > no easy way for us to extend the API to allow the Mellanox to inform us > of this limitation ahead of time. > > Instead, work around the issue by extending the XSL structure to include > a minimum PE to allocate. Although the bug is not in the XSL, it is the > easiest place to work around this limitation given that the CX4 is > currently the only card that uses an XSL. > > Signed-off-by: Ian Munsie > Reviewed-by: Andrew Donnellan > Reviewed-by: Frederic Barrat Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/f67a6722d650b864b020b19b39 cheers