[PATCH v2] powerpc/perf: use MSR to report privilege level on P9 DD1

[PATCH v2] powerpc/perf: use MSR to report privilege level on P9 DD1

[Madhavan Srinivasan]

Since SIER and SIAR updates are not valid for some
samples, patch forces the use of MSR and regs->nip instead
for misc_flag updates. This is done by adding a new ppmu
flag and updating user_siar value in perf_read_regs() accordingly.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
---
Changelog:
1)Added a new ppmu flag
2)Added the new flag to the check in perf_read_regs()
3)Made changes to commit message

 arch/powerpc/include/asm/perf_event_server.h | 1 +
 arch/powerpc/perf/core-book3s.c              | 2 ++
 arch/powerpc/perf/power9-pmu.c               | 2 +-
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index e157489ee7a1..acab0ff4e7a3 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -65,6 +65,7 @@ struct power_pmu {
 #define PPMU_HAS_SSLOT		0x00000020 /* Has sampled slot in MMCRA */
 #define PPMU_HAS_SIER		0x00000040 /* Has SIER */
 #define PPMU_ARCH_207S		0x00000080 /* PMC is architecture v2.07S */
+#define PPMU_DISABLE_USE_SIAR	0x00000100 /* Do not use SIER and SIAR */
 
 /*
  * Values for flags to get_alternatives()
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index fd3e4034c04d..8827bea50b91 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -295,6 +295,8 @@ static inline void perf_read_regs(struct pt_regs *regs)
 	 */
 	if (TRAP(regs) != 0xf00)
 		use_siar = 0;
+	else if ((ppmu->flags & PPMU_DISABLE_USE_SIAR))
+		use_siar = 0;
 	else if (marked)
 		use_siar = 1;
 	else if ((ppmu->flags & PPMU_NO_CONT_SAMPLING))
diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c
index 346010e8d463..4eec7ad9f187 100644
--- a/arch/powerpc/perf/power9-pmu.c
+++ b/arch/powerpc/perf/power9-pmu.c
@@ -384,7 +384,7 @@ static struct power_pmu power9_isa207_pmu = {
 	.bhrb_filter_map	= power9_bhrb_filter_map,
 	.get_constraint		= isa207_get_constraint,
 	.disable_pmc		= isa207_disable_pmc,
-	.flags			= PPMU_HAS_SIER | PPMU_ARCH_207S,
+	.flags			= PPMU_DISABLE_USE_SIAR | PPMU_HAS_SIER | PPMU_ARCH_207S,
 	.n_generic		= ARRAY_SIZE(power9_generic_events),
 	.generic_events		= power9_generic_events,
 	.cache_events		= &power9_cache_events,
-- 
2.7.4

Re: [v2] powerpc/perf: use MSR to report privilege level on P9 DD1

[Michael Ellerman]

On Wed, 2017-01-18 at 03:42:56 UTC, Madhavan Srinivasan wrote:
> Since SIER and SIAR updates are not valid for some
> samples, patch forces the use of MSR and regs->nip instead
> for misc_flag updates. This is done by adding a new ppmu
> flag and updating user_siar value in perf_read_regs() accordingly.
> 
> Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/27593d72c4ad451ed13af35354b941

cheers