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From: Michael Ellerman <patch-notifications@ellerman.id.au>
To: Anton Blanchard <anton@ozlabs.org>,
	benh@kernel.crashing.org, paulus@samba.org, mikey@neuling.org,
	maddy@linux.vnet.ibm.com, grimm@linux.vnet.ibm.com
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: powerpc: Ignore reserved field in DCSR and PVR reads and writes
Date: Fri, 27 Jan 2017 11:33:01 +1100 (AEDT)	[thread overview]
Message-ID: <3v8frs23GNz9t1Q@ozlabs.org> (raw)
In-Reply-To: <20170119031910.2335-1-anton@ozlabs.org>

On Thu, 2017-01-19 at 03:19:10 UTC, Anton Blanchard wrote:
> From: Anton Blanchard <anton@samba.org>
> 
> IBM bit 31 (for the rest of us - bit 0) is a reserved field in the
> instruction definition of mtspr and mfspr. Hardware is encouraged to
> (and does) ignore it.
> 
> As a result, if userspace executes an mtspr DSCR with the reserved bit
> set, we get a DSCR facility unavailable exception. The kernel fails to
> match against the expected value/mask, and we silently return to
> userspace to try and re-execute the same mtspr DSCR instruction. We
> loop forever until the process is killed.
> 
> We should do something here, and it seems mirroring what hardware does
> is the better option vs killing the process. While here, relax the
> matching of mfspr PVR too.
> 
> Signed-off-by: Anton Blanchard <anton@samba.org>

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/178f358208ceb8b38e5cff3f815e0d

cheers

      reply	other threads:[~2017-01-27  0:33 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-19  3:19 [PATCH] powerpc: Ignore reserved field in DCSR and PVR reads and writes Anton Blanchard
2017-01-27  0:33 ` Michael Ellerman [this message]

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