head_8xx.S

head_8xx.S

[Luca Risso]

Hi,
I'm trying to port Linux2.6.0 from to a MPC860 based board.
I'm currently in trouble with the head_8xx.S file during early MMU
operations.
I get an exception because of the following instructions:


InstructionTLBMiss:
#ifdef CONFIG_8xx_CPU6
        stw     r3, 8(r0)
        li      r3, 0x3f80
.
.
.
.

3:
        lwz     r21, 0(r20)     /* Get the level 1 entry */
        rlwinm. r20, r21,0,0,19 /* Extract page descriptor page address */
        beq     2f              /* If zero, don't try to find a pte */

        /* We have a pte table, so load the MI_TWC with the attributes
         * for this "segment."
         */
        tophys(r21,r21)
        ori     r21,r21,1               /* Set valid bit */
#ifdef CONFIG_8xx_CPU6
        li      r3, 0x2b80
        stw     r3, 12(r0)
        lwz     r3, 12(r0)
#endif
        mtspr   MI_TWC, r21     /* Set segment attributes */
#ifdef CONFIG_8xx_CPU6
        li      r3, 0x3b80
        stw     r3, 12(r0)
        lwz     r3, 12(r0)
#endif
        mtspr   MD_TWC, r21     /* Load pte table base address */
        mfspr   r21, MD_TWC     /* ....and get the pte address */
        lwz     r20, 0(r21)     /* Get the pte */

<HERE I GOT THE FAULT>


        ori     r20, r20, _PAGE_ACCESSED
        stw     r20, 0(r21)


 MD_TWC (and so R21) contains a  wrong address (out of my physical memory) while it
should already be a real one.
I read several mails about a problem like this but probably I missed the solution,
please can give me a pointer to it.

Thanks

      Luca


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Re: head_8xx.S

[Dan Malek]

Luca Risso wrote:

> I'm trying to port Linux2.6.0 from to a MPC860 based board.
> I'm currently in trouble with the head_8xx.S file during early MMU
> operations.

I _promise_ to do some more work on it this weekend.  Hopefully I
can get it limping along.


	-- Dan


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Re: head_8xx.S

[Luca Risso]

Thanks a lot for your help Dan.

With some further investigation I bypassed the problem removing the "tophys" instructions as shown below.
I'm not sure that's the right thing to do, but at least it took me a step forward so to be able to crash as soon as the
transfer_to_handler is called by the decrementer interrupt.

Unfortunately my BDM doesn't support MMU relocation and I can't debug easily.

If you feel that my "patch" is the wrong way to solve the problem or if you have any suggestion about my new fault please let me know.

Regards

      Luca


.
.
.
3:
        lwz     r21, 0(r20)     /* Get the level 1 entry */
        rlwinm. r20, r21,0,0,19 /* Extract page descriptor page address */
        beq     2f              /* If zero, don't try to find a pte */

        /* We have a pte table, so load the MI_TWC with the attributes
         * for this "segment."
         */

//      tophys(r21,r21)               <--------------------- COMMENT

        ori     r21,r21,1               /* Set valid bit */
#ifdef CONFIG_8xx_CPU6
        li      r3, 0x2b80
        stw     r3, 12(r0)
        lwz     r3, 12(r0)
#endif
        mtspr   MI_TWC, r21     /* Set segment attributes */
#ifdef CONFIG_8xx_CPU6
        li      r3, 0x3b80
.
.
.


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Re: head_8xx.S

[Dan Malek]

Luca Risso wrote:

> With some further investigation I bypassed the problem removing the "tophys"...


There are some subtle VM changes in 2.6 that require code changes to the
TLB exception handlers and a few other places.  I know what they are, I just
don't have any active 8xx projects right now so I have to find time and boards
to get this done and tested.


Thanks.


	-- Dan


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