From: Michael Ellerman <patch-notifications@ellerman.id.au>
To: Christophe Lombard <clombard@linux.vnet.ibm.com>,
linuxppc-dev@lists.ozlabs.org, fbarrat@linux.vnet.ibm.com,
vaibhav@linux.vnet.ibm.com, andrew.donnellan@au1.ibm.com
Subject: Re: [V6] cxl: Fix timebase synchronization status on P9
Date: Tue, 20 Mar 2018 09:22:54 +1100 (AEDT) [thread overview]
Message-ID: <404rDH2vtbz9sVr@ozlabs.org> (raw)
In-Reply-To: <1519134536-16485-1-git-send-email-clombard@linux.vnet.ibm.com>
On Tue, 2018-02-20 at 13:48:56 UTC, Christophe Lombard wrote:
> The PSL Timebase register is updated by the PSL to maintain the
> timebase.
> On P9, the Timebase value is only provided by the CAPP as received
> the last time a timebase request was performed.
> The timebase requests are initiated through the adapter configuration or
> application registers.
> The specific sysfs entry "/sys/class/cxl/cardxx/psl_timebase_synced" is
> now dynamically updated according the content of the PSL Timebase
> register.
>
> Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
> Reviewed-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/c2be663d5307fb9751a562ac664fa7
cheers
prev parent reply other threads:[~2018-03-19 22:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-20 13:48 [PATCH V6] cxl: Fix timebase synchronization status on P9 Christophe Lombard
2018-02-21 2:43 ` Michael Ellerman
2018-02-21 10:28 ` christophe lombard
2018-02-21 8:45 ` Frederic Barrat
2018-03-19 22:22 ` Michael Ellerman [this message]
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