Re: Xilinx PLB UART

Re: Xilinx PLB UART

[Roberto Farina]

Hi,
I'm working on a Memec XC2VP7 board with a V2Pro device.
I'm considering different Linux solutions and I was successful to boot
uclinux for MicroBlaze.
Now I'm taking into account PPC-based solutions.
Can u pls post a little howto on how u success in this?

Thanks in advance

- --------------------------------------------------------
Roberto Farina
CEFRIEL - Computer Architectures and Operating Systems
Via Fucini, 2 - 20133 MILANO (ITALY)
- --------------------------------------------------------

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re: V2Pro/Linux (was PLB UART)

[Mike Wellington]

Roberto-

    To get Linux running on the V2Pro, see the following
page.  Most of what it says there applies to the Memec board.

http://www.klingauf.de/v2p/index.phtml

In general -

  Download the latest 2.4 or 2.6 kernel.
  Run the configure program of your choice (make menuconfig, etc)
  Configure for XILINX_OCP ,  PPC40x, ML300
  Edit  xparameters.h and xparameters_ml300.h  to match the
  xparameters.h (and therefore the memory map) for your Memec board.
  Remake the kernel
  Using the Xilinx Parallel IV Cable, load the kernel onto your V2P.
  Boot It.

  If you want, you can get the latest U-Boot source ,
  Configure it for the ML300 if there is no config for the Memec
  Replace the xparameters.h file (or whatever its called in the U-Boot tree.
  Build U-Boot.

  Using whatever debugger you have, load U-Boot into flash if you have any.
  Configure a TFTP server on the machine where you built the kernel.
  Configure U-Boot to download the kernel and run it.

-mike wellington

  mike@lo-ex.com,  wellington@lucent.com
  Consultant
  Global Communications Lab
  Bell Labs Division
  Lucent Technologies



Roberto Farina wrote:

>
>
> Hi,
> I'm working on a Memec XC2VP7 board with a V2Pro device.
> I'm considering different Linux solutions and I was successful to boot
> uclinux for MicroBlaze.
> Now I'm taking into account PPC-based solutions.
> Can u pls post a little howto on how u success in this?
>
> Thanks in advance
>
> - --------------------------------------------------------
> Roberto Farina
> CEFRIEL - Computer Architectures and Operating Systems
> Via Fucini, 2 - 20133 MILANO (ITALY)
> - --------------------------------------------------------
>



--

=mike wellington
wellington@lucent.com
303.920.6412  Desk
720.434.7559  Cell


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Xilinx PLB UART

[Shamile Khan]

Hi,

This question concerns Xilinx Virtex II Pro platform. We
have been using OPB UART for Linux. We just tried to switch
from OPB UART to PLB UART. We have interrupts enabled. So
the kernel boots till

Freeing unused kernel memory: 40k init

At this point, I dont see anything on the screen. I dont
even see the slow display of characters on the screen
implying that the kernel has switched to polling mode. I
didnt change anything for the kernel as I expected the OPB
UART functionality to be identical to PLB UART from
processor's perspective. Are you aware of any issues
concerning PLB UART for Linux?

Thanks,
Shamile


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Re: Xilinx PLB UART

[Peter Ryser]

We are not aware of any issues with the PLB Uart. As a matter of fact,
since your posting I tried the PLB Uart both in 16450 as well as in
16550A mode on the ML300 and both ways the Linux kernel booted fine and
showed normal behavior when accessed through the serial console. For
this test I've used the kernel shipping with MontaVista Linux 3.0
(2.4.18) and used the MLD technology of EDK to generate the proper BSP
for Linux.

Send me private mail if you want to have a copy of the EDK project with
the PLB Uart.

Some things to look for in your project:
- make sure the address map of the PLB Uart does not overlap with the
address region of the PLB2OPB bridge.
- use recent tools and the most recent cores available (e.g. EDK 6.1.2
and PLB Uart v1_00_c).
- use the MLD technology in EDK to generate a BSP for your Linux kernel.
With that you will automatically avoid problems with interrupt mapping
and similar things.
- for all new designs use EDK (vs V2PDK).
- start with the EDK reference design for ML300 available from
http://www.xilinx.com/ise/embedded/edk_examples.htm (design # 6). You
can modify this design to match your board.

Cheers,
- Peter


Shamile Khan wrote:

>Hi,
>
>This question concerns Xilinx Virtex II Pro platform. We
>have been using OPB UART for Linux. We just tried to switch
>from OPB UART to PLB UART. We have interrupts enabled. So
>the kernel boots till
>
>Freeing unused kernel memory: 40k init
>
>At this point, I dont see anything on the screen. I dont
>even see the slow display of characters on the screen
>implying that the kernel has switched to polling mode. I
>didnt change anything for the kernel as I expected the OPB
>UART functionality to be identical to PLB UART from
>processor's perspective. Are you aware of any issues
>concerning PLB UART for Linux?
>
>Thanks,
>Shamile
>
>
>
>


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Re: Xilinx PLB UART

[Shamile Khan]

Hi,

Just a followup on the problem we were having. For now, we
removed IS-BRAM and DS-BRAM from our design. That seems to
solve the problem and we can boot Linux all the way. We had
them in the design originally for potential future use. We
werent really using them which makes it odd why having them
in the design or not having them would make any difference.
We will investigate the issue soon. If you have any
information, we will be really interested.

Thanks,
Shamile


--- Peter Ryser <Peter.Ryser@xilinx.com> wrote:
> We are not aware of any issues with the PLB Uart. As a
> matter of fact,
> since your posting I tried the PLB Uart both in 16450 as
> well as in
> 16550A mode on the ML300 and both ways the Linux kernel
> booted fine and
> showed normal behavior when accessed through the serial
> console. For
> this test I've used the kernel shipping with MontaVista
> Linux 3.0
> (2.4.18) and used the MLD technology of EDK to generate
> the proper BSP
> for Linux.
>
> Send me private mail if you want to have a copy of the
> EDK project with
> the PLB Uart.
>
> Some things to look for in your project:
> - make sure the address map of the PLB Uart does not
> overlap with the
> address region of the PLB2OPB bridge.
> - use recent tools and the most recent cores available
> (e.g. EDK 6.1.2
> and PLB Uart v1_00_c).
> - use the MLD technology in EDK to generate a BSP for
> your Linux kernel.
> With that you will automatically avoid problems with
> interrupt mapping
> and similar things.
> - for all new designs use EDK (vs V2PDK).
> - start with the EDK reference design for ML300 available
> from
> http://www.xilinx.com/ise/embedded/edk_examples.htm
> (design # 6). You
> can modify this design to match your board.
>
> Cheers,
> - Peter
>
>
> Shamile Khan wrote:
>
> >Hi,
> >
> >This question concerns Xilinx Virtex II Pro platform. We
> >have been using OPB UART for Linux. We just tried to
> switch
> >from OPB UART to PLB UART. We have interrupts enabled.
> So
> >the kernel boots till
> >
> >Freeing unused kernel memory: 40k init
> >
> >At this point, I dont see anything on the screen. I dont
> >even see the slow display of characters on the screen
> >implying that the kernel has switched to polling mode. I
> >didnt change anything for the kernel as I expected the
> OPB
> >UART functionality to be identical to PLB UART from
> >processor's perspective. Are you aware of any issues
> >concerning PLB UART for Linux?
> >
> >Thanks,
> >Shamile
> >
> >
> >
> >
>


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