* [OT?] Unimplemented instructions on a G5?
@ 2004-04-01 13:51 Pantelis Antoniou
2004-04-02 15:32 ` Segher Boessenkool
0 siblings, 1 reply; 5+ messages in thread
From: Pantelis Antoniou @ 2004-04-01 13:51 UTC (permalink / raw)
To: linuxppc-dev
Hello
I've recently came across a very strange problem.
I have some PPC code with some inline assembly for implementing
saturated arithmetic.
The code runs fine on a 8xx target and on the G4 development host.
When I upgraded to a G5 running Gentoo the same code terminates
with an illegal instruction trap.
The offending instruction is the seemingly harmless:
mcrxr crX
(Move to condition register from XER).
Does anyone have any idea if IBM left this instruction
unimplemented. Searching the docs I've found nothing.
It's not a deal-breaker but it is inconvinient to not be
able to run the target binaries on the host.
If it is unimplemented any idea of how hard it will be to
trap and emulate it?
Regards
Pantelis
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [OT?] Unimplemented instructions on a G5?
2004-04-01 13:51 [OT?] Unimplemented instructions on a G5? Pantelis Antoniou
@ 2004-04-02 15:32 ` Segher Boessenkool
2004-04-02 15:49 ` David Edelsohn
2004-04-05 6:14 ` Pantelis Antoniou
0 siblings, 2 replies; 5+ messages in thread
From: Segher Boessenkool @ 2004-04-02 15:32 UTC (permalink / raw)
To: Pantelis Antoniou; +Cc: linuxppc-dev
> The offending instruction is the seemingly harmless:
>
> mcrxr crX
>
> (Move to condition register from XER).
>
> Does anyone have any idea if IBM left this instruction
> unimplemented. Searching the docs I've found nothing.
Well, the newest PowerPC architecture docs say that it is
an optional insn, i.e., not all cpus might implement it.
I can't say whether the 970 implements it or not.
http://www-106.ibm.com/developerworks/eserver/pdfs/archpub1.pdf
Chapter 6.
> If it is unimplemented any idea of how hard it will be to
> trap and emulate it?
In Linux?
Last time I did this, it was easy. Can't seem to find the
patch right now, though.
Emulating will be slow, of course (but I think you know that).
Segher
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [OT?] Unimplemented instructions on a G5?
2004-04-02 15:32 ` Segher Boessenkool
@ 2004-04-02 15:49 ` David Edelsohn
2004-04-05 6:05 ` Pantelis Antoniou
2004-04-05 6:14 ` Pantelis Antoniou
1 sibling, 1 reply; 5+ messages in thread
From: David Edelsohn @ 2004-04-02 15:49 UTC (permalink / raw)
To: Segher Boessenkool, Pantelis Antoniou; +Cc: linuxppc-dev
>> The offending instruction is the seemingly harmless:
>>
>> mcrxr crX
>>
>> (Move to condition register from XER).
>>
>> Does anyone have any idea if IBM left this instruction
>> unimplemented. Searching the docs I've found nothing.
>>>>> Segher Boessenkool writes:
Segher> Well, the newest PowerPC architecture docs say that it is
Segher> an optional insn, i.e., not all cpus might implement it.
Segher> I can't say whether the 970 implements it or not.
mcrxr is obsolete and not implemented in PPC970. Executing the
instruction will result in an illegal instruction trap.
David
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [OT?] Unimplemented instructions on a G5?
2004-04-02 15:49 ` David Edelsohn
@ 2004-04-05 6:05 ` Pantelis Antoniou
0 siblings, 0 replies; 5+ messages in thread
From: Pantelis Antoniou @ 2004-04-05 6:05 UTC (permalink / raw)
To: David Edelsohn; +Cc: Segher Boessenkool, linuxppc-dev
David Edelsohn wrote:
>>>The offending instruction is the seemingly harmless:
>>>
>>>mcrxr crX
>>>
>>>(Move to condition register from XER).
>>>
>>>Does anyone have any idea if IBM left this instruction
>>>unimplemented. Searching the docs I've found nothing.
>>>
>>>
>
>
>
>>>>>>Segher Boessenkool writes:
>>>>>>
>>>>>>
>Segher> Well, the newest PowerPC architecture docs say that it is
>Segher> an optional insn, i.e., not all cpus might implement it.
>
>Segher> I can't say whether the 970 implements it or not.
>
> mcrxr is obsolete and not implemented in PPC970. Executing the
>instruction will result in an illegal instruction trap.
>
>David
>
>
>
Well this much is obvious. Where can I find a list
of these obsolete instructions so that I can
implement them in the illegal instruction handler?
The IBM documentation for the 970 declares these instructions
as the previous architecture papers, i.e. as nothing special.
Regards
Pantelis
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [OT?] Unimplemented instructions on a G5?
2004-04-02 15:32 ` Segher Boessenkool
2004-04-02 15:49 ` David Edelsohn
@ 2004-04-05 6:14 ` Pantelis Antoniou
1 sibling, 0 replies; 5+ messages in thread
From: Pantelis Antoniou @ 2004-04-05 6:14 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev
Segher Boessenkool wrote:
>
>> The offending instruction is the seemingly harmless:
>>
>> mcrxr crX
>>
>> (Move to condition register from XER).
>>
>> Does anyone have any idea if IBM left this instruction
>> unimplemented. Searching the docs I've found nothing.
>
>
> Well, the newest PowerPC architecture docs say that it is
> an optional insn, i.e., not all cpus might implement it.
>
> I can't say whether the 970 implements it or not.
>
> http://www-106.ibm.com/developerworks/eserver/pdfs/archpub1.pdf
> Chapter 6.
>
Thanks this was the information I needed. Actually it's only
the mcrxr instruction that's unimplemented. Just my luck :-)
>> If it is unimplemented any idea of how hard it will be to
>> trap and emulate it?
>
>
> In Linux?
>
> Last time I did this, it was easy. Can't seem to find the
> patch right now, though.
>
> Emulating will be slow, of course (but I think you know that).
>
>
> Segher
>
>
>
>
>
Regards
Pantelis
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2004-04-05 6:14 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2004-04-01 13:51 [OT?] Unimplemented instructions on a G5? Pantelis Antoniou
2004-04-02 15:32 ` Segher Boessenkool
2004-04-02 15:49 ` David Edelsohn
2004-04-05 6:05 ` Pantelis Antoniou
2004-04-05 6:14 ` Pantelis Antoniou
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).