From: Michael Ellerman <patch-notifications@ellerman.id.au>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman <michaele@au1.ibm.com>
Subject: Re: [v2] powerpc/powernv/pci: Work around races in PCI bridge enabling
Date: Tue, 21 Aug 2018 20:35:23 +1000 (AEST) [thread overview]
Message-ID: <41vnBM15nLz9s8F@ozlabs.org> (raw)
In-Reply-To: <3a742dd7a457874516daaf615ac0b883f87c2139.camel@kernel.crashing.org>
On Fri, 2018-08-17 at 07:30:39 UTC, Benjamin Herrenschmidt wrote:
> The generic code is race when multiple children of a PCI bridge try to
> enable it simultaneously.
>
> This leads to drivers trying to access a device through a not-yet-enabled
> bridge, and this EEH errors under various circumstances when using parallel
> driver probing.
>
> There is work going on to fix that properly in the PCI core but it will
> take some time.
>
> x86 gets away with it because (outside of hotplug), the BIOS enables all
> the bridges at boot time.
>
> This patch does the same thing on powernv by enabling all bridges that
> have child devices at boot time, thus avoiding subsequent races. It's suitable
> for backporting to stable and distros, while the proper PCI fix will probably
> be significantly more invasive.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> CC: stable@vger.kernel.org
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/db2173198b9513f7add8009f225afa
cheers
prev parent reply other threads:[~2018-08-21 10:35 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-17 7:30 [PATCH v2] powerpc/powernv/pci: Work around races in PCI bridge enabling Benjamin Herrenschmidt
2018-08-21 10:35 ` Michael Ellerman [this message]
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