From: Michael Ellerman <patch-notifications@ellerman.id.au>
To: Mahesh J Salgaonkar <mahesh@linux.vnet.ibm.com>,
linuxppc-dev <linuxppc-dev@ozlabs.org>
Cc: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>,
Nicholas Piggin <npiggin@gmail.com>
Subject: Re: [v2] poewrpc/mce: Fix SLB rebolting during MCE recovery path.
Date: Fri, 24 Aug 2018 00:18:44 +1000 (AEST) [thread overview]
Message-ID: <41x6384j4Vz9sBZ@ozlabs.org> (raw)
In-Reply-To: <153500011126.9482.8367068862900987587.stgit@jupiter.in.ibm.com>
On Thu, 2018-08-23 at 04:56:08 UTC, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
>
> With the powrpc next commit e7e81847478 (poewrpc/mce: Fix SLB rebolting
> during MCE recovery path.), the SLB error recovery is broken. The new
> change now does not add index value to RB[52-63] that selects the SLB
> entry while rebolting, instead it assumes that the shadow save area
> already have index embeded correctly in esid field. While all valid bolted
> save areas do contain index value set correctly, there is a case where
> 3rd (KSTACK_INDEX) entry for kernel stack does not embed index for NULL
> esid entry. This patch fixes that.
>
> Without this patch the SLB rebolt code overwirtes the 1st entry of kernel
> linear mapping and causes SLB recovery to fail.
>
> Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/0f52b3a00c789569d7ed822b5a6b30
cheers
prev parent reply other threads:[~2018-08-23 14:18 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-23 4:56 [PATCH v2] poewrpc/mce: Fix SLB rebolting during MCE recovery path Mahesh J Salgaonkar
2018-08-23 6:32 ` Mahesh Jagannath Salgaonkar
2018-08-23 14:18 ` Michael Ellerman [this message]
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