8xx SMC question

[Robin Gilks <robin.gilks@tait.co.nz>]

Greetings

Using the uart driver from a snapshot of the Denx kernel of about 18 
months ago (2.4.22 or thereabouts), I'm trying to sort out the reception 
of break. The only information I can find that may help identify the 
code is:
BK Id: SCCS/s.uart.c 1.30 11/19/02 11:58:41 trini

The problem I have is that a break doesn't seem to be reported until 
another character comes along - this means for example that if I get 2 
breaks, only one is reported up to the tty layer (I think - maybe a 
queuing problem at tty level?). The new character is received AFTER the 
break (so ordering is not a problem).

Knowing that there is no really 'standard' SMC driver for 2.4 series 
kernels I'm not sure if this scenario will ring any bells. If there is a 
bit I've missed in the interrupt mask (or whatever) that prevents the 
break being seen, any ideas on what it might be? ie. should I be looking 
at arch/ppc/8xx_io/uart.c or at drivers/char/n_tty.c !!

-- 
Robin Gilks
Senior Design Engineer          Phone: (+64)(3) 357 1569
Tait Electronics                Fax  :  (+64)(3) 359 4632
PO Box 1645 Christchurch        Email : robin.gilks@tait.co.nz
New Zealand

=======================================================================
This email, including any attachments, is only for the intended
addressee.  It is subject to copyright, is confidential and may be
the subject of legal or other privilege, none of which is waived or
lost by reason of this transmission.
If the receiver is not the intended addressee, please accept our
apologies, notify us by return, delete all copies and perform no
other act on the email.
Unfortunately, we cannot warrant that the email has not been
 altered or corrupted during transmission.
=======================================================================