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From: Clemens Koller <clemens.koller@anagramm.de>
To: Fillod Stephane <stephane.fillod@thomson.net>
Cc: linuxppc-embedded <linuxppc-embedded@ozlabs.org>
Subject: Re: MPC8540 DMA routines (channel 0 broken?)
Date: Mon, 18 Jul 2005 17:44:32 +0200	[thread overview]
Message-ID: <42DBCE60.8090300@anagramm.de> (raw)
In-Reply-To: <1CFEB358338412458B21FAA0D78FE86D02CABBE4@rennsmail02.eu.thmulti.com>

Hello, Stephane!

>>In the meanwhile, I got channel 0 working. It seems
>>that the DMA#0 machine got stuck in some configuration from any
>>previous (u-boot?) operation which didn't clean up things
>>properly. I had to explicitly abort a (continously running?)
>>transfer to be able to re-program it in the way I need.
> 
> Are you using a BDI2000? 

Nope.

> Some init mode uses the DMA#0 for memory zeroing (see your .cfg file).
> Also the DDR ECC U-boot code may use the DMA#0.
> Isn't it possible to reset the DMA#0 from Linux?

Thank you! Yes, that's true! <ACK>

I've checked the U-Boot code, today. The problem comes up when
U-Boot is built with CONFIG_DDR_ECC.
The DMA #0 is used to initialize the DDR prior enabling ECC.
Maybe the DMA doesn't get cleaned up properly.
(I'll have to re-check the registers).

But I can get my mpc85xx_dma "driver" working now.
However I cannot disable ECC when I am in Linux for testing
yet. :-]
I'll need to customize U-Boot without ECC because I don't want
to use it due to performance issues anyway.
But that's getting OT here.

Greets,

Clemens Koller
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  reply	other threads:[~2005-07-18 15:44 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-07-18 12:42 MPC8540 DMA routines (channel 0 broken?) Fillod Stephane
2005-07-18 15:44 ` Clemens Koller [this message]
2005-07-18 16:17   ` Kumar Gala
2005-07-19 13:27     ` Clemens Koller
  -- strict thread matches above, loose matches on Subject: below --
2005-07-15 15:01 Clemens Koller
2005-07-18 12:37 ` Clemens Koller

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