From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4552C5AD55 for ; Mon, 10 Aug 2026 13:57:34 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [127.0.0.1]) by lists.ozlabs.org (Postfix) with ESMTP id 4hJbt52sqGz2yxN; Mon, 10 Aug 2026 23:57:33 +1000 (AEST) Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip=148.163.156.1 ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1786370253; cv=none; b=XkQGrvzMhGIkSG1p2rYYr2ZIIKXenhMc2W2KSCSaYpQfhBSAyQqLtVAtXnjtoHWCpOzruCPQswhySRyCZ5gYDejriyiEI1svUHWbrAGHmiJjmX0lTjxqNKiVC7qSL+rPq9L5HDBLb5U92U4/fmtQEvUQ9lrkvIAwcJWWDmkrWbRrZd65gOo5HodzHZRRfu4nGzh7KycvzLb/hwHX5sxgdhLmbRqLxHOX/Gispm/tEUO+3CwFy7hEkmbvqFGD/qD5735of7nz33XDPZUQ6xNX72scc9Xkzx6p7co+OwieLnrgZAuaPSDB6oe/YVCHgNRvqlTz4xpgjXd912inucKtFw== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1786370253; c=relaxed/relaxed; bh=dIj0XF9DbHBclorS0yX7axYwYECOKdE2JieJ75mEKHI=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=PoEPmOVOBMafYD5sHbsLoVwVmsFzTc1Woc7/9wT2AccCIwaxW22IOkhdDbdCOJlW6wKkvXUgCWRqeaExK9dWQstbM8++p9ZK3l+FHVN/y2Fly2KaIJZtmtk1x0KUvCb1/7IM2IYh6d439Gp2CqgZARWwYSmIU6kS8zEyQYw/3HO85HKoOv+DNZuw4Z2wiDKK3zEz12Qxuf/jThn401hgGCliPYDsJ2A05sfYjh8GL54lMn/oC2aSB9/gERLsVDYXjk5zkiS/NuZ7pmcGDU2ThGqJnjHgFhF8CKm20wA26EQUMr7wppknzU9t9vpD7dy14cTqAu5Ank9WhObLIdv6uw== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=mkSsobP2; dkim-atps=neutral; spf=pass (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=hbathini@linux.ibm.com; receiver=lists.ozlabs.org) smtp.mailfrom=linux.ibm.com Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=mkSsobP2; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=hbathini@linux.ibm.com; receiver=lists.ozlabs.org) Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4hJbt43xcqz2yxG for ; Mon, 10 Aug 2026 23:57:31 +1000 (AEST) Received: from pps.filterd (m0360083.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 67AD1U4u1651670; Mon, 10 Aug 2026 13:57:14 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pp1; bh=dIj0XF 9DbHBclorS0yX7axYwYECOKdE2JieJ75mEKHI=; b=mkSsobP2rH07gcUhUtz7ZG EllAMQ1eYaCp1fTaHvvsVRL7Ljyy7/Bh5fr2MuBYQKRdMNDDDQfuydP71wjbuPZ1 xhpFbHBVp62UDkdtsMIPXJly1nMG/a85iz7JUWLydE7KEYQkEkigLRq9Qw5aaSsF l88Yaz9DriFHBAKHsIO5TkRv8Gv7byvP2YKFQ2u0c8q8BRck39IBiTVjfuZDDqI5 mCnZb+lSd/oYl/vdcr3njQVEcBVm95tyK25uePv2ARtG/Uj5zmcZV+MQrgZjFl1D ExfRUPIZ3cYf2kjd39W0Djt+PE1B3L9zqxhqOBoRj4ggSGoq8iTNuJc5fE3+Z72A == Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4fwvq988c1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Aug 2026 13:57:13 +0000 (GMT) Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 67ADuFXQ029492; Mon, 10 Aug 2026 13:57:12 GMT Received: from smtprelay01.fra02v.mail.ibm.com ([9.218.2.227]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 4fxh0g4v0n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Aug 2026 13:57:12 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (smtpav04.fra02v.mail.ibm.com [10.20.54.103]) by smtprelay01.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 67ADv9pr28705036 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 10 Aug 2026 13:57:09 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 019A120043; Mon, 10 Aug 2026 13:57:09 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D361820040; Mon, 10 Aug 2026 13:57:05 +0000 (GMT) Received: from [9.39.25.70] (unknown [9.39.25.70]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 10 Aug 2026 13:57:05 +0000 (GMT) Message-ID: <42d3fd6f-4a21-4137-b7ac-c7b24304371b@linux.ibm.com> Date: Mon, 10 Aug 2026 19:27:04 +0530 X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 1/8] powerpc/bpf: fix alignment of long branch trampoline address To: Saket Kumar Bhaskar , bpf@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: maddy@linux.ibm.com, ast@kernel.org, andrii@kernel.org, daniel@iogearbox.net, shuah@kernel.org, linux-kselftest@vger.kernel.org, stable@vger.kernel.org, venkat88@linux.ibm.com, yeswanth@linux.ibm.com References: <27ec08c30f6c37b3f25ba735f9cd7f81ff9e98d5.1786099877.git.skb99@linux.ibm.com> Content-Language: en-US From: Hari Bathini In-Reply-To: <27ec08c30f6c37b3f25ba735f9cd7f81ff9e98d5.1786099877.git.skb99@linux.ibm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: C1dIl-iBQLOAMkOjBZERTbL00OA7KweJ X-Authority-Analysis: v=2.4 cv=PbDPQChd c=1 sm=1 tr=0 ts=6a79d8b9 cx=c_pps a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=iQ6ETzBq9ecOQQE5vZCe:22 a=VnNF1IyMAAAA:8 a=VwQbUJbxAAAA:8 a=mgj-vd60Pnv80Cf2rOwA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODEwMDExNiBTYWx0ZWRfX+qFN67LU17Z6 RBV0vEJjAlCCMN77YHYxX2hURgRHIhBUH12qUmXndfC8aCjNPuWgDLxf5DV9WCfdWSxmXJw/VJT OEDMsq7H8a8nkn1oVCqEvoDCniuiX4mJ5dVh75bTdnkzCBbeENzyVlm0Vb8AfhvVTwsheD33j5k qR6NrgSHtWjGsTYviZakQb+xJCn5fZL+cQWoQmkQ7GWjrRmM605p1rOmRFch1WUUqwkb1LupIPO 8Z/SU5dNBpqlBhBVmq2roL3bgL+sRAyvkE18feG37hbIUXKQpdxieknd9JCA7EYNiy70QYF8+bL pf8LvTZ8WnI+mrsLOH1HVCXsjx2FIpiVB5K2UX84JUVQYqF8VY2nVeTDkHm48K6lzhh+M+vnAv6 kd0Sej8hUvzVu+DI8mikR1X146yB7a9zjQa4QPQRIxhSPB83w2HluZ+1AQC9YrweW8lWajVfUcG s/ob/jy1nP4ANtTbOqQ== X-Proofpoint-ORIG-GUID: C1dIl-iBQLOAMkOjBZERTbL00OA7KweJ X-Proofpoint-Spam-Info: AW1haW4tMjYwODEwMDExNiBTYWx0ZWRfX4ziWSBnEsduQ H67OjCfP7bCwjiGNRr6o07zmZ6iMYqhOIn4Z4338uwllULoWUcnX5YyvE2bS7ovVDsF/5O3/Aq7 RhMmP1FkzWIJxARrofy8cZOkzndygek= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-10_03,2026-08-07_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 impostorscore=0 malwarescore=0 adultscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 phishscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608100116 On 07/08/26 5:12 pm, Saket Kumar Bhaskar wrote: > From: Abhishek Dubey > > Ensure the dummy trampoline address field present between the OOL stub > and the long branch stub is 8-byte aligned, for memory compatibility > when content loaded to a register. > > Reported-by: Hari Bathini > Fixes: d243b62b7bd3 ("powerpc64/bpf: Add support for bpf trampolines") > Cc: stable@vger.kernel.org > Signed-off-by: Abhishek Dubey > Signed-off-by: Saket Kumar Bhaskar > Tested-by: Yeswanth Krishna Tellakula > --- > arch/powerpc/net/bpf_jit.h | 7 +++--- > arch/powerpc/net/bpf_jit_comp.c | 42 ++++++++++++++++++++++++++----- > arch/powerpc/net/bpf_jit_comp32.c | 6 +++-- > arch/powerpc/net/bpf_jit_comp64.c | 7 +++--- > 4 files changed, 48 insertions(+), 14 deletions(-) > > diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h > index f32de8704d4d..6632de9871dd 100644 > --- a/arch/powerpc/net/bpf_jit.h > +++ b/arch/powerpc/net/bpf_jit.h > @@ -214,10 +214,11 @@ int bpf_jit_emit_func_call_rel(u32 *image, u32 *fimage, struct codegen_context * > int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct codegen_context *ctx, > u32 *addrs, int pass, bool extra_pass); > void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx); > -void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx); > -void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx); > +void bpf_jit_build_epilogue(u32 *image, u32 *fimage, struct codegen_context *ctx); > +void bpf_jit_build_fentry_stubs(u32 *image, u32 *fimage, struct codegen_context *ctx); > void bpf_jit_realloc_regs(struct codegen_context *ctx); > -int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg, long exit_addr); > +int bpf_jit_emit_exit_insn(u32 *image, u32 *fimage, struct codegen_context *ctx, int tmp_reg, > + long exit_addr); > void prepare_for_fsession_fentry(u32 *image, struct codegen_context *ctx, int cookie_cnt, > int cookie_off, int retval_off); > void store_func_meta(u32 *image, struct codegen_context *ctx, u64 func_meta, int func_meta_off); > diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c > index 7b07b43575f1..f2e0f9755e65 100644 > --- a/arch/powerpc/net/bpf_jit_comp.c > +++ b/arch/powerpc/net/bpf_jit_comp.c > @@ -49,11 +49,39 @@ asm ( > " .popsection ;" > ); > > -void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx) > +void bpf_jit_build_fentry_stubs(u32 *image, u32 *fimage, struct codegen_context *ctx) > { > int ool_stub_idx, long_branch_stub_idx; > + int ool_stub_sz; > > /* > + * In the final pass, align the mis-aligned dummy_tramp_addr field > + * in the fimage. The alignment NOP must appear before OOL stub, > + * to make ool_stub_idx & long_branch_stub_idx constant from end. > + * > + * dummy_tramp_addr must be 8-byte aligned for load-register > + * compatibility. The fimage can be non 8-byte aligned, so final > + * alignment depends on start of fimage and the stub's instruction > + * count offset. The OOL stub size is 4 instructions (with > + * CONFIG_PPC_FTRACE_OUT_OF_LINE) or 3 instructions (without) > + * before dummy_tramp_addr. > + * > + * Emit a NOP here if (ctx->idx + ool_stub_sz) is odd, so that > + * dummy_tramp_addr lands at an even instruction offset (== 8-byte > + * aligned from an 8-byte aligned base). > + * > + * In pass=0 when image==NULL, conservatively account for space > + * required to accommodate alignment NOP. In case final pass skips > + * emitting alignment NOP, the image buffer have 4 spare bytes and > + * jited_len signifies correct program size. > + */ > + > + ool_stub_sz = IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE) ? 16 : 12; > + if (!image || !IS_ALIGNED((unsigned long)fimage + ctx->idx*4 + ool_stub_sz, SZL)) > + EMIT(PPC_RAW_NOP()); > + > + /* > + * nop // optional, for alignment of dummy_tramp_addr > * Out-of-line stub: > * mflr r0 > * [b|bl] tramp > @@ -70,7 +98,7 @@ void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx) > > /* > * Long branch stub: > - * .long > + * .long // 8-byte aligned > * mflr r11 > * bcl 20,31,$+4 > * mflr r12 > @@ -81,6 +109,7 @@ void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx) > */ > if (image) > *((unsigned long *)&image[ctx->idx]) = (unsigned long)dummy_tramp; > + > ctx->idx += SZL / 4; > long_branch_stub_idx = ctx->idx; > EMIT(PPC_RAW_MFLR(_R11)); > @@ -97,7 +126,8 @@ void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx) > } > } > > -int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg, long exit_addr) > +int bpf_jit_emit_exit_insn(u32 *image, u32 *fimage, struct codegen_context *ctx, > + int tmp_reg, long exit_addr) > { > if (!exit_addr || is_offset_in_branch_range(exit_addr - (ctx->idx * 4))) { > PPC_JMP(exit_addr); > @@ -107,7 +137,7 @@ int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg, > PPC_JMP(ctx->alt_exit_addr); > } else { > ctx->alt_exit_addr = ctx->idx * 4; > - bpf_jit_build_epilogue(image, ctx); > + bpf_jit_build_epilogue(image, fimage, ctx); > } > > return 0; > @@ -286,7 +316,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_verifier_env *env, struct bpf_pr > */ > bpf_jit_build_prologue(NULL, &cgctx); > addrs[fp->len] = cgctx.idx * 4; > - bpf_jit_build_epilogue(NULL, &cgctx); > + bpf_jit_build_epilogue(NULL, NULL, &cgctx); > > fixup_len = fp->aux->num_exentries * BPF_FIXUP_LEN * 4; > extable_len = fp->aux->num_exentries * sizeof(struct exception_table_entry); > @@ -318,7 +348,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_verifier_env *env, struct bpf_pr > bpf_jit_binary_pack_free(fhdr, hdr); > goto out_err; > } > - bpf_jit_build_epilogue(code_base, &cgctx); > + bpf_jit_build_epilogue(code_base, fcode_base, &cgctx); > > if (bpf_jit_enable > 1) > pr_info("Pass %d: shrink = %d, seen = 0x%x\n", pass, > diff --git a/arch/powerpc/net/bpf_jit_comp32.c b/arch/powerpc/net/bpf_jit_comp32.c > index bfdc50740da8..1cf12edf0343 100644 > --- a/arch/powerpc/net/bpf_jit_comp32.c > +++ b/arch/powerpc/net/bpf_jit_comp32.c > @@ -229,7 +229,7 @@ static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx > > } > > -void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx) > +void bpf_jit_build_epilogue(u32 *image, u32 *fimage, struct codegen_context *ctx) > { > EMIT(PPC_RAW_MR(_R3, bpf_to_ppc(BPF_REG_0))); > > @@ -237,7 +237,7 @@ void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx) > > EMIT(PPC_RAW_BLR()); > > - bpf_jit_build_fentry_stubs(image, ctx); > + bpf_jit_build_fentry_stubs(image, fimage, ctx); > } > > /* Relative offset needs to be calculated based on final image location */ > @@ -1150,6 +1150,8 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code > */ > if (i != flen - 1) { > ret = bpf_jit_emit_exit_insn(image, ctx, _R0, exit_addr); This breaks build on ppc32. > + ret = bpf_jit_emit_exit_insn(image, fimage, > + ctx, _R0, exit_addr); > if (ret) > return ret; > } > diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c > index dab106cae22b..951eb10ca1f6 100644 > --- a/arch/powerpc/net/bpf_jit_comp64.c > +++ b/arch/powerpc/net/bpf_jit_comp64.c > @@ -398,7 +398,7 @@ static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx > } > } > > -void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx) > +void bpf_jit_build_epilogue(u32 *image, u32 *fimage, struct codegen_context *ctx) > { > bpf_jit_emit_common_epilogue(image, ctx); > > @@ -407,7 +407,7 @@ void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx) > > EMIT(PPC_RAW_BLR()); > > - bpf_jit_build_fentry_stubs(image, ctx); > + bpf_jit_build_fentry_stubs(image, fimage, ctx); > } > > /* > @@ -1737,7 +1737,8 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code > * we'll just fall through to the epilogue. > */ > if (i != flen - 1) { > - ret = bpf_jit_emit_exit_insn(image, ctx, tmp1_reg, exit_addr); > + ret = bpf_jit_emit_exit_insn(image, fimage, ctx, > + tmp1_reg, exit_addr); > if (ret) > return ret; > } Have a general comment on the order of the patches. Can we have all powerpc specific patches first and the selftest changes at the end. The patch order should be patch #7 followed by patches #1 & #2, then patch #5 & patch #8 while patches #3, #4 & #6 are kept at the end. Makes for cleaner backporting given the many fixes tags.. - Hari