Re: mmap nocache on PPC, 2.4

[Stephen Williams <steve@icarus.com>]

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Dan Malek wrote:
|
| On Aug 22, 2005, at 10:35 AM, Stephen Williams wrote:
|
|> In an embedded system, I want a big chunk of virtual memory in the
|> user process to be uncached.
|
|
| Why?  What processor it this?  Who else touches this memory?

PPC405GPr. The only things touching the memory are a PCI compressor
chip that is writing the buffer, a user mode thread that is putting
some image headers around it, and another device that reads it out.
I believe that if the memory is mapped uncached in the user mode
process then I'm safe.


|> .... I've created a virtual device driver that
|> has this mmap method:
|
|
| Even if this did what you thought it should, I'm not sure you
| would be happy with the results.  The challenge is ensuring
| anyone that touches these physical pages also does so
| uncached.  Depending upon the processor, this isn't something
| that is trivial to change in the kernel, since we always map
| all of memory as efficiently as possible with a cached mapping.
| The caching of memory has many desirable performance
| side effects, making the trade off the manage coherency in
| software if needed an overall system gain.

The processor is touching this memory only very briefly to put
image headers around the data, and even at that it would need
to be immediately flushed again so that it can be DMAed off the
system.

My problem is that I need a lot of memory that is mostly accessed
by high performance devices that make lots of data, and only
very occasionally accessed by the processor for minor fixups.
Caching is very much getting in my way here in this specialized
case, I think.

- --
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."
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