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[177.131.90.207]) by smtp.gmail.com with ESMTPSA id u20sm1914972qtb.63.2021.02.17.11.32.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Feb 2021 11:32:50 -0800 (PST) Message-ID: <433396d9ef216aa090e32bb344d42f60de1fb9aa.camel@gmail.com> Subject: Re: [PATCH kernel 2/2] powerpc/iommu: Do not immediately panic when failed IOMMU table allocation From: Leonardo Bras To: Alexey Kardashevskiy , linuxppc-dev@lists.ozlabs.org Date: Wed, 17 Feb 2021 16:32:45 -0300 In-Reply-To: <20210216033307.69863-3-aik@ozlabs.ru> References: <20210216033307.69863-1-aik@ozlabs.ru> <20210216033307.69863-3-aik@ozlabs.ru> Organization: IBM Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.38.3 (3.38.3-1.fc33) MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kvm-ppc@vger.kernel.org, David Gibson Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, 2021-02-16 at 14:33 +1100, Alexey Kardashevskiy wrote: > Most platforms allocate IOMMU table structures (specifically it_map) > at the boot time and when this fails - it is a valid reason for panic(). > > However the powernv platform allocates it_map after a device is returned > to the host OS after being passed through and this happens long after > the host OS booted. It is quite possible to trigger the it_map allocation > panic() and kill the host even though it is not necessary - the host OS > can still use the DMA bypass mode (requires a tiny fraction of it_map's > memory) and even if that fails, the host OS is runnnable as it was without > the device for which allocating it_map causes the panic. > > Instead of immediately crashing in a powernv/ioda2 system, this prints > an error and continues. All other platforms still call panic(). > > Signed-off-by: Alexey Kardashevskiy Hello Alexey, This looks like a good change, that passes panic() decision to platform code. Everything looks pretty straightforward, but I have a question regarding this: > @@ -1930,16 +1931,16 @@ static long pnv_pci_ioda2_setup_default_config(struct pnv_ioda_pe *pe) >   res_start = pe->phb->ioda.m32_pci_base >> tbl->it_page_shift; >   res_end = min(window_size, SZ_4G) >> tbl->it_page_shift; >   } > - iommu_init_table(tbl, pe->phb->hose->node, res_start, res_end); > - rc = pnv_pci_ioda2_set_window(&pe->table_group, 0, tbl); > > + if (iommu_init_table(tbl, pe->phb->hose->node, res_start, res_end)) > + rc = pnv_pci_ioda2_set_window(&pe->table_group, 0, tbl); > + else > + rc = -ENOMEM; >   if (rc) { > - pe_err(pe, "Failed to configure 32-bit TCE table, err %ld\n", > - rc); > + pe_err(pe, "Failed to configure 32-bit TCE table, err %ld\n", rc); >   iommu_tce_table_put(tbl); > - return rc; > + tbl = NULL; /* This clears iommu_table_base below */ >   } > - >   if (!pnv_iommu_bypass_disabled) >   pnv_pci_ioda2_set_bypass(pe, true); >   > If I could understand correctly, previously if iommu_init_table() did not panic(), and pnv_pci_ioda2_set_window() returned something other than 0, it would return rc in the if (rc) clause, but now it does not happen anymore, going through if (!pnv_iommu_bypass_disabled) onwards. Is that desired? As far as I could see, returning rc there seems a good procedure after iommu_init_table returning -ENOMEM. Best regards,  Leonardo Bras