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From: David Hawkins <dwh@ovro.caltech.edu>
To: linuxppc-embedded@ozlabs.org
Subject: Re: PPC440EP/Yosemite PCI misbehavior
Date: Fri, 13 Jan 2006 20:37:39 -0800	[thread overview]
Message-ID: <43C88013.40800@ovro.caltech.edu> (raw)
In-Reply-To: <43C7292B.2060003@ovro.caltech.edu>


Hi all,

Travis Sawyer sent me a snipped of his mmap code, and there
was an important difference relative to mine:

pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE | _PAGE_GUARDED;

With the addition of these two flags, the caching of the
PCI memory space has gone! Yeah!! (The flags aren't defined for
x86 pages, hence I'd never seen them).

Thanks Travis!

Now CPU reads and writes use PCI memory-read and PCI memory-write
commands. The CPU does not appear to use burst-transactions to
the pre-fetchable memory region. This is results in lower
performance, but its consistent with what an x86 does.

I'll go and play with the 440EP DMA controller and see if I can get
that to burst to the PCI bus.

> access to PCI I/O space causes a machine check exception.

I still get this in 2.6.15, but Wolfgang Denx indicated that
they'd tested PCI I/O pretty thoroughly, so I'm inclined to
believe that its my driver that is at fault. I'll do a little
more digging on that one.

Cheers
Dave

  reply	other threads:[~2006-01-14  4:37 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-01-13  4:14 PPC440EP/Yosemite PCI misbehavior David Hawkins
2006-01-14  4:37 ` David Hawkins [this message]
2006-01-15  9:21   ` Stefan Roese
2006-01-16 16:56     ` David Hawkins

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