* [PATCH 4/9] Migrate ML300 reference design to the platform bus
@ 2006-01-19 8:13 Grant C. Likely
2006-01-23 17:31 ` Andrei Konovalov
0 siblings, 1 reply; 3+ messages in thread
From: Grant C. Likely @ 2006-01-19 8:13 UTC (permalink / raw)
To: linuxppc-embedded, akonovalov, peter.ryser
Signed-off-by: Grant C. Likely <grant.likely@secretlab.ca>
---
arch/ppc/Kconfig.debug | 2 -
arch/ppc/platforms/4xx/xilinx_ml300.c | 74 +++++++++++++++++++++++----------
arch/ppc/platforms/4xx/xilinx_ml300.h | 2 -
arch/ppc/syslib/Makefile | 2 -
4 files changed, 55 insertions(+), 25 deletions(-)
8fd96565cd93fa8d3d6165e463353efdc4f9a5c5
diff --git a/arch/ppc/Kconfig.debug b/arch/ppc/Kconfig.debug
index 61653cb..8cc75ab 100644
--- a/arch/ppc/Kconfig.debug
+++ b/arch/ppc/Kconfig.debug
@@ -67,7 +67,7 @@ config SERIAL_TEXT_DEBUG
config PPC_OCP
bool
- depends on IBM_OCP || XILINX_OCP
+ depends on IBM_OCP
default y
endmenu
diff --git a/arch/ppc/platforms/4xx/xilinx_ml300.c b/arch/ppc/platforms/4xx/xilinx_ml300.c
index b0de0a2..267afb5 100644
--- a/arch/ppc/platforms/4xx/xilinx_ml300.c
+++ b/arch/ppc/platforms/4xx/xilinx_ml300.c
@@ -17,12 +17,14 @@
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
+#include <linux/serial_8250.h>
#include <linux/serialP.h>
#include <asm/io.h>
#include <asm/machdep.h>
-#include <asm/ocp.h>
+#include <asm/ppc_sys.h>
-#include <platforms/4xx/virtex.h> /* for NR_SER_PORTS */
+#include <syslib/gen550.h>
+#include <platforms/4xx/xparameters/xparameters.h>
/*
* As an overview of how the following functions (platform_init,
@@ -54,6 +56,22 @@
* ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c
*/
+/* Board specifications structures */
+struct ppc_sys_spec *cur_ppc_sys_spec;
+struct ppc_sys_spec ppc_sys_specs[] = {
+ {
+ /* Only one entry, always assume the same design */
+ .ppc_sys_name = "Xilinx ML300 Reference Design",
+ .mask = 0x00000000,
+ .value = 0x00000000,
+ .num_devices = 1,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ VIRTEX_UART,
+ },
+ },
+};
+
#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
static volatile unsigned *powerdown_base =
@@ -80,28 +98,39 @@ ml300_map_io(void)
#endif
}
+/* Early serial support functions */
static void __init
+ml300_early_serial_init(int num, struct plat_serial8250_port *pdata)
+{
+#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
+ struct uart_port serial_req;
+
+ memset(&serial_req, 0, sizeof(serial_req));
+ serial_req.mapbase = pdata->mapbase;
+ serial_req.membase = pdata->membase;
+ serial_req.irq = pdata->irq;
+ serial_req.uartclk = pdata->uartclk;
+ serial_req.regshift = pdata->regshift;
+ serial_req.iotype = pdata->iotype;
+ serial_req.flags = pdata->flags;
+ gen550_init(num, &serial_req);
+#endif
+}
+
+void __init
ml300_early_serial_map(void)
{
#ifdef CONFIG_SERIAL_8250
- struct serial_state old_ports[] = { SERIAL_PORT_DFNS };
- struct uart_port port;
- int i;
-
- /* Setup ioremapped serial port access */
- for (i = 0; i < ARRAY_SIZE(old_ports); i++ ) {
- memset(&port, 0, sizeof(port));
- port.membase = ioremap((phys_addr_t)(old_ports[i].iomem_base), 16);
- port.irq = old_ports[i].irq;
- port.uartclk = old_ports[i].baud_base * 16;
- port.regshift = old_ports[i].iomem_reg_shift;
- port.iotype = SERIAL_IO_MEM;
- port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
- port.line = i;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port %d failed\n", i);
- }
+ struct plat_serial8250_port *pdata;
+ int i = 0;
+
+ pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(VIRTEX_UART);
+ while(pdata && pdata->flags)
+ {
+ pdata->membase = ioremap(pdata->mapbase, 0x100);
+ ml300_early_serial_init(i, pdata);
+ pdata++;
+ i++;
}
#endif /* CONFIG_SERIAL_8250 */
}
@@ -109,9 +138,8 @@ ml300_early_serial_map(void)
void __init
ml300_setup_arch(void)
{
- ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
-
ml300_early_serial_map();
+ ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
/* Identify the system */
printk(KERN_INFO "Xilinx Virtex-II Pro port\n");
@@ -131,6 +159,8 @@ platform_init(unsigned long r3, unsigned
{
ppc4xx_init(r3, r4, r5, r6, r7);
+ identify_ppc_sys_by_id(mfspr(SPRN_PVR));
+
ppc_md.setup_arch = ml300_setup_arch;
ppc_md.setup_io_mappings = ml300_map_io;
ppc_md.init_IRQ = ml300_init_irq;
diff --git a/arch/ppc/platforms/4xx/xilinx_ml300.h b/arch/ppc/platforms/4xx/xilinx_ml300.h
index 8993981..ae8bf13 100644
--- a/arch/ppc/platforms/4xx/xilinx_ml300.h
+++ b/arch/ppc/platforms/4xx/xilinx_ml300.h
@@ -41,7 +41,7 @@ typedef struct board_info {
#define PPC4xx_ONB_IO_VADDR 0u
#define PPC4xx_ONB_IO_SIZE 0u
-#define PPC4xx_MACHINE_NAME "Xilinx ML300"
+#define PPC4xx_MACHINE_NAME "Xilinx ML300 Reference System"
#endif /* __ASM_XILINX_ML300_H__ */
#endif /* __KERNEL__ */
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 6234ee5..5cb62c6 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -18,7 +18,7 @@ obj-$(CONFIG_440SP) += ibm440gx_common.
obj-$(CONFIG_440SPE) += ibm440gx_common.o ibm440sp_common.o ppc440spe_pcie.o
ifeq ($(CONFIG_4xx),y)
ifeq ($(CONFIG_XILINX_VIRTEX),y)
-obj-$(CONFIG_40x) += xilinx_pic.o
+obj-$(CONFIG_40x) += xilinx_pic.o ppc_sys.o
else
ifeq ($(CONFIG_403),y)
obj-$(CONFIG_40x) += ppc403_pic.o
--
1.1.GIT
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH 4/9] Migrate ML300 reference design to the platform bus
2006-01-19 8:13 [PATCH 4/9] Migrate ML300 reference design to the platform bus Grant C. Likely
@ 2006-01-23 17:31 ` Andrei Konovalov
2006-01-23 21:13 ` Grant Likely
0 siblings, 1 reply; 3+ messages in thread
From: Andrei Konovalov @ 2006-01-23 17:31 UTC (permalink / raw)
To: Grant C. Likely; +Cc: linuxppc-embedded
Hi Grant,
Grant C. Likely wrote:
> Signed-off-by: Grant C. Likely <grant.likely@secretlab.ca>
>
> ---
>
> arch/ppc/Kconfig.debug | 2 -
> arch/ppc/platforms/4xx/xilinx_ml300.c | 74 +++++++++++++++++++++++----------
> arch/ppc/platforms/4xx/xilinx_ml300.h | 2 -
> arch/ppc/syslib/Makefile | 2 -
> 4 files changed, 55 insertions(+), 25 deletions(-)
<snip>
> +/* Board specifications structures */
> +struct ppc_sys_spec *cur_ppc_sys_spec;
> +struct ppc_sys_spec ppc_sys_specs[] = {
> + {
> + /* Only one entry, always assume the same design */
> + .ppc_sys_name = "Xilinx ML300 Reference Design",
> + .mask = 0x00000000,
> + .value = 0x00000000,
"Always assume the same design" could be a considerable limitation
for the Virtex FPGAs.
<snip>
> @@ -131,6 +159,8 @@ platform_init(unsigned long r3, unsigned
> {
> ppc4xx_init(r3, r4, r5, r6, r7);
>
> + identify_ppc_sys_by_id(mfspr(SPRN_PVR));
This is OK for the single ppc_sys_specs[] case, but in general
I am not sure using PVR to identify the system makes much sense
in case of Virtex FPGAs. IIRC, for the mpc8xxx Freescale SOCs PVR
gives enough information to determine what on-chip peripherals are
present (but not how multi-function peripherals like SCC are configured).
In case of Xilinx the situation is worse: depending on the bitstream
loaded into the FPGA, the same chip (the same PVR) and the board
can have several sets of on-chip peripherals which could be completely
different from each other. And knowing the PVR value alone puts no limitation
on what peripherals could get into the FPGA (unless e.g. a Virtex-4 specific
hardware block is used by an IP - like in case of TEMAC).
What do you think?
So far I've used a fairly dumb code like:
static int __init xilinx_platform_init(void)
{
#ifdef XPAR_EMAC_0_BASEADDR
memcpy(xemac_0_pdata.mac_addr, __res.bi_enetaddr, 6);
platform_device_register(&xilinx_emac_0_device);
#endif /* XPAR_EMAC_0_BASEADDR */
#ifdef XPAR_TEMAC_0_BASEADDR
memcpy(xtemac_0_pdata.mac_addr, __res.bi_enetaddr, 6);
platform_device_register(&xilinx_temac_0_device);
#endif /* XPAR_TEMAC_0_BASEADDR */
#ifdef XPAR_TFT_0_BASEADDR
platform_device_register(&xilinx_lcd_0_device);
#endif /* XPAR_TFT_0_BASEADDR */
#ifdef XPAR_GPIO_0_BASEADDR
platform_device_register(&xilinx_gpio_0_device);
#endif /* XPAR_GPIO_0_BASEADDR */
#ifdef XPAR_GPIO_1_BASEADDR
platform_device_register(&xilinx_gpio_1_device);
#endif /* XPAR_GPIO_1_BASEADDR */
#ifdef XPAR_PS2_0_BASEADDR
platform_device_register(&xilinx_ps2_0_device);
#endif /* XPAR_PS2_0_BASEADDR */
#ifdef XPAR_PS2_1_BASEADDR
platform_device_register(&xilinx_ps2_1_device);
#endif /* XPAR_PS2_1_BASEADDR */
return 0;
}
- to associate the devices to the drivers (the drivers
call driver_register() from their module_init function).
This helps me holding all that ugly stuff in one file
(this single file can be used by multiple boards),
and should make it easier to switch to something using
the flattened device tree parsing when the OF DT comes
into play.
Probably using ppc_sys infrastructure now has some advantages,
but they are not evident to me.
Thanks,
Andrei
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 4/9] Migrate ML300 reference design to the platform bus
2006-01-23 17:31 ` Andrei Konovalov
@ 2006-01-23 21:13 ` Grant Likely
0 siblings, 0 replies; 3+ messages in thread
From: Grant Likely @ 2006-01-23 21:13 UTC (permalink / raw)
To: Andrei Konovalov; +Cc: linuxppc-embedded
Andrei Konovalov wrote:
> Hi Grant,
>
> Grant C. Likely wrote:
>
>> Signed-off-by: Grant C. Likely <grant.likely@secretlab.ca>
>>
>> ---
>>
>> arch/ppc/Kconfig.debug | 2 -
>> arch/ppc/platforms/4xx/xilinx_ml300.c | 74
>> +++++++++++++++++++++++----------
>> arch/ppc/platforms/4xx/xilinx_ml300.h | 2 -
>> arch/ppc/syslib/Makefile | 2 -
>> 4 files changed, 55 insertions(+), 25 deletions(-)
>
>
> <snip>
>
>> +/* Board specifications structures */
>> +struct ppc_sys_spec *cur_ppc_sys_spec;
>> +struct ppc_sys_spec ppc_sys_specs[] = {
>> + {
>> + /* Only one entry, always assume the same design */
>> + .ppc_sys_name = "Xilinx ML300 Reference Design",
>> + .mask = 0x00000000,
>> + .value = 0x00000000,
>
>
> "Always assume the same design" could be a considerable limitation
> for the Virtex FPGAs.
>
> <snip>
>
>> @@ -131,6 +159,8 @@ platform_init(unsigned long r3, unsigned
>> {
>> ppc4xx_init(r3, r4, r5, r6, r7);
>>
>> + identify_ppc_sys_by_id(mfspr(SPRN_PVR));
>
>
> This is OK for the single ppc_sys_specs[] case, but in general
> I am not sure using PVR to identify the system makes much sense
> in case of Virtex FPGAs. IIRC, for the mpc8xxx Freescale SOCs PVR
> gives enough information to determine what on-chip peripherals are
> present (but not how multi-function peripherals like SCC are configured).
> In case of Xilinx the situation is worse: depending on the bitstream
> loaded into the FPGA, the same chip (the same PVR) and the board
> can have several sets of on-chip peripherals which could be completely
> different from each other. And knowing the PVR value alone puts no
> limitation
> on what peripherals could get into the FPGA (unless e.g. a Virtex-4
> specific
> hardware block is used by an IP - like in case of TEMAC).
>
> What do you think?
In short; I agree 100%. There are also some other issues with the way I
set things up. The only reason I used the ppc_sys functions was because
the other freescale ports used them. (It seemed like a good starting
point). I now thing platform devices should be registered directly by
the board setup code (or flattened-device-tree parser); just like your
code below.
> So far I've used a fairly dumb code like:
>
> static int __init xilinx_platform_init(void)
> {
> #ifdef XPAR_EMAC_0_BASEADDR
> memcpy(xemac_0_pdata.mac_addr, __res.bi_enetaddr, 6);
> platform_device_register(&xilinx_emac_0_device);
> #endif /* XPAR_EMAC_0_BASEADDR */
>
> #ifdef XPAR_TEMAC_0_BASEADDR
> memcpy(xtemac_0_pdata.mac_addr, __res.bi_enetaddr, 6);
> platform_device_register(&xilinx_temac_0_device);
> #endif /* XPAR_TEMAC_0_BASEADDR */
>
> #ifdef XPAR_TFT_0_BASEADDR
> platform_device_register(&xilinx_lcd_0_device);
> #endif /* XPAR_TFT_0_BASEADDR */
>
> #ifdef XPAR_GPIO_0_BASEADDR
> platform_device_register(&xilinx_gpio_0_device);
> #endif /* XPAR_GPIO_0_BASEADDR */
> #ifdef XPAR_GPIO_1_BASEADDR
> platform_device_register(&xilinx_gpio_1_device);
> #endif /* XPAR_GPIO_1_BASEADDR */
>
> #ifdef XPAR_PS2_0_BASEADDR
> platform_device_register(&xilinx_ps2_0_device);
> #endif /* XPAR_PS2_0_BASEADDR */
> #ifdef XPAR_PS2_1_BASEADDR
> platform_device_register(&xilinx_ps2_1_device);
> #endif /* XPAR_PS2_1_BASEADDR */
>
> return 0;
> }
>
> - to associate the devices to the drivers (the drivers
> call driver_register() from their module_init function).
> This helps me holding all that ugly stuff in one file
> (this single file can be used by multiple boards),
> and should make it easier to switch to something using
> the flattened device tree parsing when the OF DT comes
> into play.
yes; plus the flattened tree parser can allocate platform device
structures as needed at runtime.
>
> Probably using ppc_sys infrastructure now has some advantages,
> but they are not evident to me.
No, I don't really think it fits for the Virtex either; I'm just using
it as a starting point.
Cheers,
g.
--
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
(403) 663-0761
^ permalink raw reply [flat|nested] 3+ messages in thread
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2006-01-19 8:13 [PATCH 4/9] Migrate ML300 reference design to the platform bus Grant C. Likely
2006-01-23 17:31 ` Andrei Konovalov
2006-01-23 21:13 ` Grant Likely
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