From: Michael Ellerman <patch-notifications@ellerman.id.au>
To: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [1/2] powerpc/perf: Add constraints for power9 l2/l3 bus events
Date: Sat, 22 Dec 2018 20:54:55 +1100 (AEDT) [thread overview]
Message-ID: <43MLSw1VvZz9sPX@ozlabs.org> (raw)
In-Reply-To: <1528640822-4800-2-git-send-email-maddy@linux.vnet.ibm.com>
On Sun, 2018-06-10 at 14:27:01 UTC, Madhavan Srinivasan wrote:
> In previous generation processors, both bus events and direct
> events of performance monitoring unit can be individually
> programmabled and monitored in PMCs.
>
> But in Power9, L2/L3 bus events are always available as a
> "bank" of 4 events. To obtain the counts for any of the
> l2/l3 bus events in a given bank, the user will have to
> program PMC4 with corresponding l2/l3 bus event for that
> bank.
>
> Patch enforce two contraints incase of L2/L3 bus events.
>
> 1)Any L2/L3 event when programmed is also expected to program corresponding
> PMC4 event from that group.
> 2)PMC4 event should always been programmed first due to group constraint
> logic limitation
>
> For ex. consider these L3 bus events
>
> PM_L3_PF_ON_CHIP_MEM (0x460A0),
> PM_L3_PF_MISS_L3 (0x160A0),
> PM_L3_CO_MEM (0x260A0),
> PM_L3_PF_ON_CHIP_CACHE (0x360A0),
>
> 1) This is an INVALID group for L3 Bus event monitoring,
> since it is missing PMC4 event.
> perf stat -e "{r160A0,r260A0,r360A0}" < >
>
> And this is a VALID group for L3 Bus events:
> perf stat -e "{r460A0,r160A0,r260A0,r360A0}" < >
>
> 2) This is an INVALID group for L3 Bus event monitoring,
> since it is missing PMC4 event.
> perf stat -e "{r260A0,r360A0}" < >
>
> And this is a VALID group for L3 Bus events:
> perf stat -e "{r460A0,r260A0,r360A0}" < >
>
> 3) This is an INVALID group for L3 Bus event monitoring,
> since it is missing PMC4 event.
> perf stat -e "{r360A0}" < >
>
> And this is a VALID group for L3 Bus events:
> perf stat -e "{r460A0,r360A0}" < >
>
> Patch here implements group constraint logic suggested by Michael Ellerman.
>
> Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/59029136d75022cb8b7c7bebd1738a
cheers
next prev parent reply other threads:[~2018-12-22 10:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-10 14:27 [PATCH 0/2] constraints for power9 l2/l3 bus events Madhavan Srinivasan
2018-06-10 14:27 ` [PATCH 1/2] powerpc/perf: Add " Madhavan Srinivasan
2018-12-22 9:54 ` Michael Ellerman [this message]
2018-06-10 14:27 ` [PATCH 2/2] powerpc/perf: Remove l2 bus events from HW cache event array Madhavan Srinivasan
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