From: Christophe Lombard <clombard@linux.vnet.ibm.com>
To: Jason Gunthorpe <jgg@nvidia.com>, Christoph Hellwig <hch@infradead.org>
Cc: linuxppc-dev@lists.ozlabs.org, ajd@linux.ibm.com,
fbarrat@linux.vnet.ibm.com
Subject: Re: [PATCH V2 4/5] ocxl: Add mmu notifier
Date: Tue, 24 Nov 2020 17:48:55 +0100 [thread overview]
Message-ID: <43ad6f31-5778-e974-8671-43710a301df3@linux.vnet.ibm.com> (raw)
In-Reply-To: <20201124134525.GB4800@nvidia.com>
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Le 24/11/2020 à 14:45, Jason Gunthorpe a écrit :
> On Tue, Nov 24, 2020 at 09:17:38AM +0000, Christoph Hellwig wrote:
>
>>> @@ -470,6 +487,26 @@ void ocxl_link_release(struct pci_dev *dev, void *link_handle)
>>> }
>>> EXPORT_SYMBOL_GPL(ocxl_link_release);
>>>
>>> +static void invalidate_range(struct mmu_notifier *mn,
>>> + struct mm_struct *mm,
>>> + unsigned long start, unsigned long end)
>>> +{
>>> + struct pe_data *pe_data = container_of(mn, struct pe_data, mmu_notifier);
>>> + struct ocxl_link *link = pe_data->link;
>>> + unsigned long addr, pid, page_size = PAGE_SIZE;
> The page_size variable seems unnecessary
>
>>> +
>>> + pid = mm->context.id;
>>> +
>>> + spin_lock(&link->atsd_lock);
>>> + for (addr = start; addr < end; addr += page_size)
>>> + pnv_ocxl_tlb_invalidate(&link->arva, pid, addr);
>>> + spin_unlock(&link->atsd_lock);
>>> +}
>>> +
>>> +static const struct mmu_notifier_ops ocxl_mmu_notifier_ops = {
>>> + .invalidate_range = invalidate_range,
>>> +};
>>> +
>>> static u64 calculate_cfg_state(bool kernel)
>>> {
>>> u64 state;
>>> @@ -526,6 +563,8 @@ int ocxl_link_add_pe(void *link_handle, int pasid, u32 pidr, u32 tidr,
>>> pe_data->mm = mm;
>>> pe_data->xsl_err_cb = xsl_err_cb;
>>> pe_data->xsl_err_data = xsl_err_data;
>>> + pe_data->link = link;
>>> + pe_data->mmu_notifier.ops = &ocxl_mmu_notifier_ops;
>>>
>>> memset(pe, 0, sizeof(struct ocxl_process_element));
>>> pe->config_state = cpu_to_be64(calculate_cfg_state(pidr == 0));
>>> @@ -542,8 +581,16 @@ int ocxl_link_add_pe(void *link_handle, int pasid, u32 pidr, u32 tidr,
>>> * by the nest MMU. If we have a kernel context, TLBIs are
>>> * already global.
>>> */
>>> - if (mm)
>>> + if (mm) {
>>> mm_context_add_copro(mm);
>>> + if (link->arva) {
>>> + /* Use MMIO registers for the TLB Invalidate
>>> + * operations.
>>> + */
>>> + mmu_notifier_register(&pe_data->mmu_notifier, mm);
> Every other place doing stuff like this is de-duplicating the
> notifier. If you have multiple clients this will do multiple redundant
> invalidations?
We could have multiple clients, although not something that we have often.
We have only one attach per process. But if not, we must still have
invalidation for each.
>
> The notifier get/put API is designed to solve that problem, you'd get
> a single notifier for the mm and then add the impacted arva's to some
> list at the notifier.
Thanks for the information.
>
> Jason
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next prev parent reply other threads:[~2020-11-24 20:36 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-20 17:32 [PATCH V2 0/5] ocxl: Mmio invalidation support Christophe Lombard
2020-11-20 17:32 ` [PATCH V2 1/5] ocxl: Assign a register set to a Logical Partition Christophe Lombard
2020-11-23 10:35 ` Frederic Barrat
2020-11-20 17:32 ` [PATCH V2 2/5] ocxl: Initiate a TLB invalidate command Christophe Lombard
2020-11-23 10:37 ` Frederic Barrat
2020-11-20 17:32 ` [PATCH V2 3/5] ocxl: Update the Process Element Entry Christophe Lombard
2020-11-23 10:38 ` Frederic Barrat
2020-11-20 17:32 ` [PATCH V2 4/5] ocxl: Add mmu notifier Christophe Lombard
2020-11-23 10:40 ` Frederic Barrat
2020-11-24 9:17 ` Christoph Hellwig
2020-11-24 13:45 ` Jason Gunthorpe
2020-11-24 16:48 ` Christophe Lombard [this message]
2020-11-20 17:32 ` [PATCH V2 5/5] ocxl: Add new kernel traces Christophe Lombard
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