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Date: Wed, 13 Feb 2008 11:32:07 -0700
From: "David Baird" <dhbaird@gmail.com>
To: linuxppc-embedded@ozlabs.org
Subject: Re: TLB Miss booting linux kernel on ppc 405
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On Feb 13, 2008 11:03 AM, Ricardo Ayres Severo <severo.ricardo@gmail.com> wrote:
> Here are the srr dump:
>   srr0: c0002218
>   srr1: 00021030
>   srr2: 00001154
>   srr3: 00000000

Okay, SRR0 tells us that you did in fact have an exception at
0xc0002218.  And I am willing to bet that is the line you mentioned
(line 826 of start_here).  You can match this up with your System.map
or an objdump -d of vmlinux.

Someone who knows more than I do can correct me on this, but I have a
suspicion.  As soon virtual (translation) mode is entered, I have had
a hard time using the normal debugging functions (e.g. single
instruction stepping and reading memory regions).  While in virtual
mode, it seemed like I had to resort to these techniques:

- Blinking some LEDs
- Spitting characters out of a uartlite
- When an exception occurs, the processor switches back into real mode
and therefore I can set breakpoints on the beginnings of various
exception handlers and be able to use normal debugging tools again

So, I have another question.  Can you set a breakpoint on 0x1100 (in
XMD: bps 0x1100 hw), then just let it run (i.e. do not single step!)
all the way until an exception happens.  When the exception happens,
can you then paste the SRR0, SRR1, and the ESR (exception syndrome
register)?

I hope I am not giving you a run-around here....

-David