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Thu, 17 Sep 2020 13:25:29 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5FEA2AE063; Thu, 17 Sep 2020 13:25:29 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1A74EAE060; Thu, 17 Sep 2020 13:25:26 +0000 (GMT) Received: from localhost.localdomain (unknown [9.211.95.89]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 17 Sep 2020 13:25:25 +0000 (GMT) Subject: Re: [PATCH v6 1/8] powerpc/watchpoint: Fix quarword instruction handling on p10 predecessors To: Ravi Bangoria , mpe@ellerman.id.au, christophe.leroy@c-s.fr References: <20200902042945.129369-1-ravi.bangoria@linux.ibm.com> <20200902042945.129369-2-ravi.bangoria@linux.ibm.com> From: Rogerio Alves Message-ID: <4522c423-c020-3abc-8db6-acdc2a095d21@linux.ibm.com> Date: Thu, 17 Sep 2020 10:25:24 -0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200902042945.129369-2-ravi.bangoria@linux.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-09-17_09:2020-09-16, 2020-09-17 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 impostorscore=0 bulkscore=0 priorityscore=1501 mlxlogscore=999 suspectscore=0 adultscore=0 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009170098 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mikey@neuling.org, jniethe5@gmail.com, pedromfc@linux.ibm.com, linux-kernel@vger.kernel.org, paulus@samba.org, rogealve@linux.ibm.com, naveen.n.rao@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 9/2/20 1:29 AM, Ravi Bangoria wrote: > On p10 predecessors, watchpoint with quarword access is compared at > quardword length. If the watch range is doubleword or less than that > in a first half of quarword aligned 16 bytes, and if there is any > unaligned quadword access which will access only the 2nd half, the > handler should consider it as extraneous and emulate/single-step it > before continuing. > > Reported-by: Pedro Miraglia Franco de Carvalho > Fixes: 74c6881019b7 ("powerpc/watchpoint: Prepare handler to handle more than one watchpoint") > Signed-off-by: Ravi Bangoria Tested-by: Rogerio Alves > --- > arch/powerpc/include/asm/hw_breakpoint.h | 1 + > arch/powerpc/kernel/hw_breakpoint.c | 12 ++++++++++-- > 2 files changed, 11 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/include/asm/hw_breakpoint.h b/arch/powerpc/include/asm/hw_breakpoint.h > index db206a7f38e2..9b68eafebf43 100644 > --- a/arch/powerpc/include/asm/hw_breakpoint.h > +++ b/arch/powerpc/include/asm/hw_breakpoint.h > @@ -42,6 +42,7 @@ struct arch_hw_breakpoint { > #else > #define HW_BREAKPOINT_SIZE 0x8 > #endif > +#define HW_BREAKPOINT_SIZE_QUADWORD 0x10 > > #define DABR_MAX_LEN 8 > #define DAWR_MAX_LEN 512 > diff --git a/arch/powerpc/kernel/hw_breakpoint.c b/arch/powerpc/kernel/hw_breakpoint.c > index 1f4a1efa0074..9f7df1c37233 100644 > --- a/arch/powerpc/kernel/hw_breakpoint.c > +++ b/arch/powerpc/kernel/hw_breakpoint.c > @@ -520,9 +520,17 @@ static bool ea_hw_range_overlaps(unsigned long ea, int size, > struct arch_hw_breakpoint *info) > { > unsigned long hw_start_addr, hw_end_addr; > + unsigned long align_size = HW_BREAKPOINT_SIZE; > > - hw_start_addr = ALIGN_DOWN(info->address, HW_BREAKPOINT_SIZE); > - hw_end_addr = ALIGN(info->address + info->len, HW_BREAKPOINT_SIZE); > + /* > + * On p10 predecessors, quadword is handle differently then > + * other instructions. > + */ > + if (!cpu_has_feature(CPU_FTR_ARCH_31) && size == 16) > + align_size = HW_BREAKPOINT_SIZE_QUADWORD; > + > + hw_start_addr = ALIGN_DOWN(info->address, align_size); > + hw_end_addr = ALIGN(info->address + info->len, align_size); > > return ((ea < hw_end_addr) && (ea + size > hw_start_addr)); > } >