* Re: Re: SMC as UART problem on mpc8xx
@ 2007-02-02 10:51 Ladislav Klenovic
2007-02-02 14:54 ` Vitaly Bordug
0 siblings, 1 reply; 2+ messages in thread
From: Ladislav Klenovic @ 2007-02-02 10:51 UTC (permalink / raw)
To: linuxppc-embedded
> On 01 Feb 2007 17:10:31 +0100 (CET)
> a b wrote:
>
> > Hi,
> > I have mpc8xx where I would like the following configuration:
> > - SCC1 as system console (works fine)
> > - SMC1-2 as UART (doesn\\\'t work)
> >
> > I use linux 2.6.16.20 with backward patch from linux-2.6.19.2 for SMCs. My only problem is
> > that even I can see cpm_uart registered for IRQ 20 (for SMC1) I never get interrupt even
> > I do e.g. \\\"echo 123 > /dev/ttyCPM\\\".
> >
> > here is a short extract from /proc/interrupts:
> > 20: 0 CPM Edge cpm_uart <--SMC1
> > 21: 7546 CPM Edge SPI
> > 46: 20 CPM Edge cpm_uart <-- SCC1 (console)
> >
> > here is a short extract from /proc/tty/driver/ttyCPM:
> > serinfo:1.0 driver revision:
> > 0: uart:CPM UART mmio:0xFFF00A80 irq:20 tx:14 rx:0 RTS|CTS|DTR|DSR|CD
> > 1: uart:CPM UART mmio:0xFFF00A90 irq:19 tx:0 rx:0 CTS|DSR|CD
> > 2: uart:CPM UART mmio:0xFFF00A00 irq:46 tx:3038 rx:46 RTS|CTS|DTR|DSR|CD
> >
> > Can anybody help me to get SMCs working?
> >
> >
> Check IO ports? IIRC, in 8xx some SoC devices could not work simultaneously because they
> share some GPIO pins. In any case, if something does not function with CPM UART, IOports stuff is the first thing to check.
>
> --
> Sincerely,
> Vitaly
>
Hi,
thnx for hint, you were right, problem was in I/O port configuration.
I am a bit wondered why is B port for mpc8xx not configured in 2.16.19.2. Or is it
configured somewhere else? I especially miss this part of code in cpm_uart_cpm1.c:
void smc1_lineif(struct uart_cpm_port *pinfo){
...
#elif defined (CONFIG_MPC86XADS)
if (!pinfo->is_portb) {
cp->cp_pbpar |= iobits;
cp->cp_pbdir &= ~iobits;
cp->cp_pbodr &= ~iobits;
} else {
((immap_t *)IMAP_ADDR)->im_ioport.iop_papar |= iobits;
((immap_t *)IMAP_ADDR)->im_ioport.iop_padir &= ~iobits;
((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits;
}
#endif
...
}
Regards,
Ladislav.
__________
Mobilné telefóny v slovenskej premiére a najaktuálnejšie informácie - http://mobil.sme.sk/
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: SMC as UART problem on mpc8xx
2007-02-02 10:51 Re: SMC as UART problem on mpc8xx Ladislav Klenovic
@ 2007-02-02 14:54 ` Vitaly Bordug
0 siblings, 0 replies; 2+ messages in thread
From: Vitaly Bordug @ 2007-02-02 14:54 UTC (permalink / raw)
To: Ladislav Klenovic; +Cc: linuxppc-embedded
On 02 Feb 2007 11:51:01 +0100 (CET)
Ladislav Klenovic <poseidon21@post.sk> wrote:
> > On 01 Feb 2007 17:10:31 +0100 (CET)
> > a b wrote:
> >
> > > Hi,
> > > I have mpc8xx where I would like the following configuration:
> > > - SCC1 as system console (works fine)
> > > - SMC1-2 as UART (doesn\\\'t work)
> > >
> > > I use linux 2.6.16.20 with backward patch from linux-2.6.19.2 for SMCs. My only problem is
> > > that even I can see cpm_uart registered for IRQ 20 (for SMC1) I never get interrupt even
> > > I do e.g. \\\"echo 123 > /dev/ttyCPM\\\".
> > >
> > > here is a short extract from /proc/interrupts:
> > > 20: 0 CPM Edge cpm_uart <--SMC1
> > > 21: 7546 CPM Edge SPI
> > > 46: 20 CPM Edge cpm_uart <-- SCC1 (console)
> > >
> > > here is a short extract from /proc/tty/driver/ttyCPM:
> > > serinfo:1.0 driver revision:
> > > 0: uart:CPM UART mmio:0xFFF00A80 irq:20 tx:14 rx:0 RTS|CTS|DTR|DSR|CD
> > > 1: uart:CPM UART mmio:0xFFF00A90 irq:19 tx:0 rx:0 CTS|DSR|CD
> > > 2: uart:CPM UART mmio:0xFFF00A00 irq:46 tx:3038 rx:46 RTS|CTS|DTR|DSR|CD
> > >
> > > Can anybody help me to get SMCs working?
> > >
> > >
> > Check IO ports? IIRC, in 8xx some SoC devices could not work simultaneously because they
> > share some GPIO pins. In any case, if something does not function with CPM UART, IOports stuff is the first thing to check.
> >
> > --
> > Sincerely,
> > Vitaly
> >
>
> Hi,
> thnx for hint, you were right, problem was in I/O port configuration.
> I am a bit wondered why is B port for mpc8xx not configured in 2.16.19.2. Or is it
> configured somewhere else? I especially miss this part of code in cpm_uart_cpm1.c:
>
> void smc1_lineif(struct uart_cpm_port *pinfo){
> ...
> #elif defined (CONFIG_MPC86XADS)
> if (!pinfo->is_portb) {
> cp->cp_pbpar |= iobits;
> cp->cp_pbdir &= ~iobits;
> cp->cp_pbodr &= ~iobits;
> } else {
> ((immap_t *)IMAP_ADDR)->im_ioport.iop_papar |= iobits;
> ((immap_t *)IMAP_ADDR)->im_ioport.iop_padir &= ~iobits;
> ((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits;
> }
> #endif
> ...
> }
>
Oh well, the preferred way is not to bloat drivers/ space with code snippets that are clearly
board specific. There are hooks to set up IO space in BSP code already, it just has to have proper pinfo
set up - mpc86xads and mpc885ads work that way. Yet I haven't checked ppc/ stuff for a while, being concentrated on arch/powerpc...
--
Sincerely,
Vitaly
^ permalink raw reply [flat|nested] 2+ messages in thread
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2007-02-02 14:54 ` Vitaly Bordug
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