We Got It!  The mention of the cpld's on the ml410 board by Feldman caused me to try something that worked.

   The .bsd file did indeed contain the irlength.  The idcode for the part was incorrect in the shipped genace.tcl file (but correct in the xilinx book).  The final key was the CPLD we had on the JTAG chain HAD TO BE LISTED as a "-configdevice devicenr 2 irlength 8 partname xc2c128" in the parameter string before the system ace would program up the xilinx chip without showing an error.

   Evidently the system ace has to see the all of the parts on the jtag chain listed  in the system.ace file or it will refuse to program any device at all.  (Unless you have NO devices listed in the system.ace file.  In that case it is also happy.)

thanks again,
wade


On 12/14/06, Wade Maxfield <wmaxfield@gmail.com> wrote:
Hi Sharon,

   Thank you!   I found the irlength (called INSTRUCTION_LENGTH) in the file xc4vfx60_ff1152.bsd and it is indeed 14.

   We are running a custom board that looks like an ml410, with only one device, the xf60 (in addition to the system ace chip), which is exactly what the genace.tcl file specifies.  We do have  a cpld as a second part, but we are not programming it. The genace.tcl file in the Xininx/data/xmd directory was incorrect in how it listed the device IDCODE on the part.  It had  0x01eb409, the real code is 0x1EB4093.  Once the code was fixed in the file, the genace.tcl created system.ace bundling the zImage.elf file into it correctly.

    However, we are not yet getting a xilinx program load.  Onward through the fog!

    We can program the xilinx through the system ace using the jtag, but we cannot get the system ace to program it from the system.ace on the compact flash, generated using the same download.bit we use over the jtag.

wade




On 12/14/06, Sharon Feldman < sharonf@scopus.net> wrote:
the INSTRUCTION_LENGTH attribute can be found in The Device BSDL File.
 
As Much As I Know It Is 14 For All FX60 Devices.
 
BSDL .bsd File Are Found Under :
 
C:\Xilinx\virtex4\data
 
Are You Sure You Are Accessing The Wright Device On The Chain ?
It Is Possible That The Number Of Xilinx FPGA Has Changed In ML410. (It Is 3 In ML403),
In ML410 There Is No CPLD, So I Guess It Is Probebly 2 Now.
 
-----Original Message-----
From: linuxppc-embedded-bounces+sharonf=scopus.net@ozlabs.org [mailto:linuxppc-embedded-bounces+sharonf=scopus.net@ozlabs.org]On Behalf Of Wade Maxfield
Sent: Thursday, December 14, 2006 6:06 PM
To: ppc
Subject: system ace programming xf60

Hi,

  We are trying to generate a system ace file that will program an xf60 using Xilinx scripts,
(and even their impact GUI), using 8.1i, service pack 3 EDK.

  Unfortunately, if we choose the ml410 board from Xilinx's genace.tcl script
in their EDK/data/xmd directory, it errors with an invalid instruction register length.
The irlength is listed as 14 in the xilinx script files.  I looked and googled and could
not find the irlength listed for that xf60 part in any literature.

  Also, if we try to include the zImage.elf file, the script errors out.

  Conversely, if we choose an ml403 board (and switch the project to the xf12 chip),
we can combine the zImage.elf file and generate a system.ace file that loads on an
ml403 board.

  We can take the download.bit file that refuses to load when combined into the system.ace,
and load it over the jtag port.  It programs the xf60 just fine.

  If we create an empty system.ace file,  the system ace chip on our board signals everything is ok,
but of course, the xilinx chip is not programmed.  If we pull the compact flash out of the board,
the system ace chip signals that is can't find the compact flash by flashing the error light.

  Has anyone on this list had any experience with this that could lead us in a right direction?  We've
tried about 10 different combinations so far with no luck.

thanks,
wade