From: Didier Kryn <kryn@in2p3.fr>
To: Konstantin Boyanov <kkboyanov@gmail.com>
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Reading and writing from/to VME device
Date: Wed, 28 Mar 2007 11:56:12 +0200 [thread overview]
Message-ID: <460A3BBC.5060002@in2p3.fr> (raw)
In-Reply-To: <821B2170E9E7F04FA38DF7EC21DE4871088C81DA@VCAEXCH01.hq.corp.viasat.com>
Konstantin, I am a little confused;
You tell you want to access CR/CSR space but you configure your
window for A24. Even if addresses are coded in 24-bit in CR/CSR, this is
not the same space as A24. Although I never still used it, I believe
that CR/CSR is a geographical address space (base address of the board
defined by its location in the crate) while all others are logical
address spaces where the base address is set at power up from a
switch... and can be changed by writing the proper register in CR/CSR.
CR/CSR has address modifier 2F, while you are configuring your window
for A24/data/supervisory which gives address modifier 3D. BTW, most
boards don't care about user or supervisory, they would respond as well
to address modifier 39
To answer one of your questions, for sure inbound windows are
dedicated to configure the response of the module as a slave and
outbound windows as a master.
When you are reading anything else than FF, then you are actually
reading something, which means that some slave module has accepted the
transaction. You always get all bits set to 1 in case of VMEbus timeout.
Hope this helps
Didier
next prev parent reply other threads:[~2007-03-28 9:56 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-03-26 15:14 Reading and writing from/to VME device Konstantin Boyanov
2007-03-26 18:31 ` Martin, Tim
2007-03-27 9:09 ` Didier Kryn
2007-03-27 12:38 ` Didier Kryn
2007-03-27 15:47 ` Konstantin Boyanov
2007-03-27 19:02 ` Martin, Tim
2007-03-28 9:56 ` Didier Kryn [this message]
2007-03-29 10:13 ` Konstantin Boyanov
2007-03-29 19:27 ` Martin, Tim
2007-03-30 9:24 ` Didier Kryn
2007-04-02 9:15 ` Didier Kryn
2007-04-02 9:21 ` Didier Kryn
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