[PATCH 01/61] Use strcasecmp() rather than strncasecmp() when determining device node compatibility.

[PATCH 01/61] Use strcasecmp() rather than strncasecmp() when determining device node compatibility.

[Scott Wood]

The current code assumes "foo-bar" must always be compatible with a node
compatible with "foo", which breaks device trees where this is not so.

The "case" part is also wrong according to Open Firmware, but it's more
likely to have drivers and/or device trees depending on it, and thus
needs to be handled more carefully.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/kernel/prom.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 37ff99b..0b136a5 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -218,7 +218,7 @@ int __init of_flat_dt_is_compatible(unsigned long node, const char *compat)
 	if (cp == NULL)
 		return 0;
 	while (cplen > 0) {
-		if (strncasecmp(cp, compat, strlen(compat)) == 0)
+		if (strcasecmp(cp, compat) == 0)
 			return 1;
 		l = strlen(cp) + 1;
 		cp += l;
@@ -1099,7 +1099,7 @@ int of_device_is_compatible(const struct device_node *device,
 	if (cp == NULL)
 		return 0;
 	while (cplen > 0) {
-		if (strncasecmp(cp, compat, strlen(compat)) == 0)
+		if (strcasecmp(cp, compat) == 0)
 			return 1;
 		l = strlen(cp) + 1;
 		cp += l;
-- 
1.5.0.3

[PATCH 02/61] mpc8272ads.dts: Whitespace cleanup

[Scott Wood]

Convert spaces to tabs, and add a few newlines where appropriate.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/dts/mpc8272ads.dts |  376 +++++++++++++++++-----------------
 1 files changed, 189 insertions(+), 187 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 1934b80..4d09dca 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -10,207 +10,209 @@
  */
 
 / {
-       model = "MPC8272ADS";
-       compatible = "MPC8260ADS";
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               PowerPC,8272@0 {
-                       device_type = "cpu";
-                       reg = <0>;
-                       d-cache-line-size = <20>;       // 32 bytes
-                       i-cache-line-size = <20>;       // 32 bytes
-                       d-cache-size = <4000>;          // L1, 16K
-                       i-cache-size = <4000>;          // L1, 16K
-                       timebase-frequency = <0>;
-                       bus-frequency = <0>;
-                       clock-frequency = <0>;
-                       32-bit;
-               };
-       };
-
-		pci_pic: interrupt-controller@f8200000 {
-               #address-cells = <0>;
-               #interrupt-cells = <2>;
-               interrupt-controller;
-               reg = <f8200000 f8200004>;
-               built-in;
-               device_type = "pci-pic";
-       };
-       memory {
-               device_type = "memory";
-               reg = <00000000 4000000 f4500000 00000020>;
-       };
-
-       chosen {
-               name = "chosen";
-               linux,platform = <0>;
+	model = "MPC8272ADS";
+	compatible = "MPC8260ADS";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		PowerPC,8272@0 {
+			device_type = "cpu";
+			reg = <0>;
+			d-cache-line-size = <20>;       // 32 bytes
+			i-cache-line-size = <20>;       // 32 bytes
+			d-cache-size = <4000>;          // L1, 16K
+			i-cache-size = <4000>;          // L1, 16K
+			timebase-frequency = <0>;
+			bus-frequency = <0>;
+			clock-frequency = <0>;
+			32-bit;
+		};
+	};
+
+	pci_pic: interrupt-controller@f8200000 {
+		#address-cells = <0>;
+		#interrupt-cells = <2>;
+		interrupt-controller;
+		reg = <f8200000 f8200004>;
+		built-in;
+		device_type = "pci-pic";
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <00000000 4000000 f4500000 00000020>;
+	};
+
+	chosen {
+		name = "chosen";
+		linux,platform = <0>;
 		interrupt-controller = <&Cpm_pic>;
-       };
-
-       soc8272@f0000000 {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               #interrupt-cells = <2>;
-               device_type = "soc";
-               ranges = <00000000 f0000000 00053000>;
-               reg = <f0000000 10000>;
-
-               mdio@0 {
-                       device_type = "mdio";
-                       compatible = "fs_enet";
-                       reg = <0 0>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
+	};
+
+	soc8272@f0000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		#interrupt-cells = <2>;
+		device_type = "soc";
+		ranges = <00000000 f0000000 00053000>;
+		reg = <f0000000 10000>;
+
+		mdio@0 {
+			device_type = "mdio";
+			compatible = "fs_enet";
+			reg = <0 0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
 			phy0:ethernet-phy@0 {
 				interrupt-parent = <&Cpm_pic>;
-                               interrupts = <17 4>;
-                               reg = <0>;
-                               bitbang = [ 12 12 13 02 02 01 ];
-                               device_type = "ethernet-phy";
-                       };
+				interrupts = <17 4>;
+				reg = <0>;
+				bitbang = [ 12 12 13 02 02 01 ];
+				device_type = "ethernet-phy";
+			};
+
 			phy1:ethernet-phy@1 {
 				interrupt-parent = <&Cpm_pic>;
-                               interrupts = <17 4>;
-                               bitbang = [ 12 12 13 02 02 01 ];
-                               reg = <3>;
-                               device_type = "ethernet-phy";
-                       };
-               };
-
-               ethernet@24000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       device_type = "network";
-                       device-id = <1>;
-                       compatible = "fs_enet";
-                       model = "FCC";
-                       reg = <11300 20 8400 100 11380 30>;
-                       mac-address = [ 00 11 2F 99 43 54 ];
-                       interrupts = <20 2>;
+				interrupts = <17 4>;
+				bitbang = [ 12 12 13 02 02 01 ];
+				reg = <3>;
+				device_type = "ethernet-phy";
+			};
+		};
+
+		ethernet@24000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			device-id = <1>;
+			compatible = "fs_enet";
+			model = "FCC";
+			reg = <11300 20 8400 100 11380 30>;
+			mac-address = [ 00 11 2F 99 43 54 ];
+			interrupts = <20 2>;
 			interrupt-parent = <&Cpm_pic>;
 			phy-handle = <&Phy0>;
-                       rx-clock = <13>;
-                       tx-clock = <12>;
-               };
-
-               ethernet@25000 {
-                       device_type = "network";
-                       device-id = <2>;
-                       compatible = "fs_enet";
-                       model = "FCC";
-                       reg = <11320 20 8500 100 113b0 30>;
-                       mac-address = [ 00 11 2F 99 44 54 ];
-                       interrupts = <21 2>;
+			rx-clock = <13>;
+			tx-clock = <12>;
+		};
+
+		ethernet@25000 {
+			device_type = "network";
+			device-id = <2>;
+			compatible = "fs_enet";
+			model = "FCC";
+			reg = <11320 20 8500 100 113b0 30>;
+			mac-address = [ 00 11 2F 99 44 54 ];
+			interrupts = <21 2>;
 			interrupt-parent = <&Cpm_pic>;
 			phy-handle = <&Phy1>;
-                       rx-clock = <17>;
-                       tx-clock = <18>;
-               };
-
-               cpm@f0000000 {
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       #interrupt-cells = <2>;
-                       device_type = "cpm";
-                       model = "CPM2";
-                       ranges = <00000000 00000000 20000>;
-                       reg = <0 20000>;
-                       command-proc = <119c0>;
-                       brg-frequency = <17D7840>;
-                       cpm_clk = <BEBC200>;
-
-                       scc@11a00 {
-                               device_type = "serial";
-                               compatible = "cpm_uart";
-                               model = "SCC";
-                               device-id = <1>;
-                               reg = <11a00 20 8000 100>;
-                               current-speed = <1c200>;
-                               interrupts = <28 2>;
+			rx-clock = <17>;
+			tx-clock = <18>;
+		};
+
+		cpm@f0000000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			#interrupt-cells = <2>;
+			device_type = "cpm";
+			model = "CPM2";
+			ranges = <00000000 00000000 20000>;
+			reg = <0 20000>;
+			command-proc = <119c0>;
+			brg-frequency = <17D7840>;
+			cpm_clk = <BEBC200>;
+
+			scc@11a00 {
+				device_type = "serial";
+				compatible = "cpm_uart";
+				model = "SCC";
+				device-id = <1>;
+				reg = <11a00 20 8000 100>;
+				current-speed = <1c200>;
+				interrupts = <28 2>;
 				interrupt-parent = <&Cpm_pic>;
-                               clock-setup = <0 00ffffff>;
-                               rx-clock = <1>;
-                               tx-clock = <1>;
-                       };
-
-                       scc@11a60 {
-                               device_type = "serial";
-                               compatible = "cpm_uart";
-                               model = "SCC";
-                               device-id = <4>;
-                               reg = <11a60 20 8300 100>;
-                               current-speed = <1c200>;
-                               interrupts = <2b 2>;
+				clock-setup = <0 00ffffff>;
+				rx-clock = <1>;
+				tx-clock = <1>;
+			};
+
+			scc@11a60 {
+				device_type = "serial";
+				compatible = "cpm_uart";
+				model = "SCC";
+				device-id = <4>;
+				reg = <11a60 20 8300 100>;
+				current-speed = <1c200>;
+				interrupts = <2b 2>;
 				interrupt-parent = <&Cpm_pic>;
-                               clock-setup = <1b ffffff00>;
-                               rx-clock = <4>;
-                               tx-clock = <4>;
-                       };
-
-               };
-			cpm_pic:interrupt-controller@10c00 {
-                       #address-cells = <0>;
-                       #interrupt-cells = <2>;
-                       interrupt-controller;
-                       reg = <10c00 80>;
-                       built-in;
-                       device_type = "cpm-pic";
-		       compatible = "CPM2";
-               };
-               pci@0500 {
-                       #interrupt-cells = <1>;
-                       #size-cells = <2>;
-                       #address-cells = <3>;
-                       compatible = "8272";
-                       device_type = "pci";
-                       reg = <10430 4dc>;
-                       clock-frequency = <3f940aa>;
-                       interrupt-map-mask = <f800 0 0 7>;
-                       interrupt-map = <
-
-                                       /* IDSEL 0x16 */
-                                        b000 0 0 1 f8200000 40 8
-                                        b000 0 0 2 f8200000 41 8
-                                        b000 0 0 3 f8200000 42 8
-                                        b000 0 0 4 f8200000 43 8
-
-                                       /* IDSEL 0x17 */
-                                        b800 0 0 1 f8200000 43 8
-                                        b800 0 0 2 f8200000 40 8
-                                        b800 0 0 3 f8200000 41 8
-                                        b800 0 0 4 f8200000 42 8
-
-                                       /* IDSEL 0x18 */
-                                        c000 0 0 1 f8200000 42 8
-                                        c000 0 0 2 f8200000 43 8
-                                        c000 0 0 3 f8200000 40 8
-                                        c000 0 0 4 f8200000 41 8>;
+				clock-setup = <1b ffffff00>;
+				rx-clock = <4>;
+				tx-clock = <4>;
+			};
+		};
+
+		cpm_pic:interrupt-controller@10c00 {
+			#address-cells = <0>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			reg = <10c00 80>;
+			built-in;
+			device_type = "cpm-pic";
+			compatible = "CPM2";
+		};
+
+		pci@0500 {
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			compatible = "8272";
+			device_type = "pci";
+			reg = <10430 4dc>;
+			clock-frequency = <3f940aa>;
+			interrupt-map-mask = <f800 0 0 7>;
+			interrupt-map = <
+			                /* IDSEL 0x16 */
+			                 b000 0 0 1 f8200000 40 8
+			                 b000 0 0 2 f8200000 41 8
+			                 b000 0 0 3 f8200000 42 8
+			                 b000 0 0 4 f8200000 43 8
+
+			                /* IDSEL 0x17 */
+			                 b800 0 0 1 f8200000 43 8
+			                 b800 0 0 2 f8200000 40 8
+			                 b800 0 0 3 f8200000 41 8
+			                 b800 0 0 4 f8200000 42 8
+
+			                /* IDSEL 0x18 */
+			                 c000 0 0 1 f8200000 42 8
+			                 c000 0 0 2 f8200000 43 8
+			                 c000 0 0 3 f8200000 40 8
+			                 c000 0 0 4 f8200000 41 8>;
 			interrupt-parent = <&Cpm_pic>;
-                       interrupts = <14 8>;
-                       bus-range = <0 0>;
-                       ranges = <02000000 0 80000000 80000000 0 40000000
-                                 01000000 0 00000000 f6000000 0 02000000>;
-               };
+			interrupts = <14 8>;
+			bus-range = <0 0>;
+			ranges = <02000000 0 80000000 80000000 0 40000000
+			          01000000 0 00000000 f6000000 0 02000000>;
+		};
 
 /* May need to remove if on a part without crypto engine */
-               crypto@30000 {
-                       device_type = "crypto";
-                       model = "SEC2";
-                       compatible = "talitos";
-                       reg = <30000 10000>;
-                       interrupts = <b 2>;
+		crypto@30000 {
+			device_type = "crypto";
+			model = "SEC2";
+			compatible = "talitos";
+			reg = <30000 10000>;
+			interrupts = <b 2>;
 			interrupt-parent = <&Cpm_pic>;
-                       num-channels = <4>;
-                       channel-fifo-len = <18>;
-                       exec-units-mask = <0000007e>;
+			num-channels = <4>;
+			channel-fifo-len = <18>;
+			exec-units-mask = <0000007e>;
 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
-                       descriptor-types-mask = <01010ebf>;
-               };
-
-       };
+			descriptor-types-mask = <01010ebf>;
+		};
+	};
 };
-- 
1.5.0.3

[PATCH 03/61] Only include linux/ide.h if CONFIG_BLOCK is defined.

[Scott Wood]

The IDE header file uses type definitions that are undefined if the
CONFIG_BLOCK is deselected.  This causes a compilation failure in
setup_32.c.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/kernel/ppc_ksyms.c |    2 ++
 arch/powerpc/kernel/setup_32.c  |    4 +++-
 2 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index a20f195..bc54493 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -12,7 +12,9 @@
 #include <linux/irq.h>
 #include <linux/pci.h>
 #include <linux/delay.h>
+#ifdef CONFIG_BLOCK
 #include <linux/ide.h>
+#endif
 #include <linux/bitops.h>
 
 #include <asm/page.h>
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 7ec6ba5..ae5d60e 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -10,7 +10,6 @@
 #include <linux/reboot.h>
 #include <linux/delay.h>
 #include <linux/initrd.h>
-#include <linux/ide.h>
 #include <linux/tty.h>
 #include <linux/bootmem.h>
 #include <linux/seq_file.h>
@@ -51,7 +50,10 @@
 
 extern void bootx_init(unsigned long r4, unsigned long phys);
 
+#ifdef COFNIG_BLOCK
+#include <linux/ide.h>
 struct ide_machdep_calls ppc_ide_md;
+#endif
 
 int boot_cpuid;
 EXPORT_SYMBOL_GPL(boot_cpuid);
-- 
1.5.0.3

Re: [PATCH 03/61] Only include linux/ide.h if CONFIG_BLOCK is defined.

[Kumar Gala]

On Jul 17, 2007, at 8:32 PM, Scott Wood wrote:

> The IDE header file uses type definitions that are undefined if the
> CONFIG_BLOCK is deselected.  This causes a compilation failure in
> setup_32.c.

I'm not yet convinced the solution shouldn't be more generic than  
this.  I'm guessing the same issue exists on other platforms if you  
don't have CONFIG_BLOCK enabled.

- k

[PATCH 04/61] 8xx: Work around CPU15 erratum.

[Scott Wood]

The CPU15 erratum on MPC8xx chips can cause incorrect code execution
under certain circumstances, where there is a conditional or indirect
branch in the last word of a page, with a target in the last cache line
of the next page.  This patch implements one of the suggested
workarounds, by forcing a TLB miss whenever execution crosses a page
boundary.  This is done by invalidating the pages before and after the
one being loaded into the TLB in the ITLB miss handler.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/kernel/head_8xx.S     |    6 ++++++
 arch/powerpc/platforms/8xx/Kconfig |   16 ++++++++++++++++
 2 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 901be47..7488f30 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -301,6 +301,12 @@ InstructionTLBMiss:
 	stw	r10, 0(r0)
 	stw	r11, 4(r0)
 	mfspr	r10, SPRN_SRR0	/* Get effective address of fault */
+#ifdef CONFIG_8xx_CPU15
+	addi	r11, r10, 0x1000
+	tlbie	r11
+	addi	r11, r10, -0x1000
+	tlbie	r11
+#endif
 	DO_8xx_CPU6(0x3780, r3)
 	mtspr	SPRN_MD_EPN, r10	/* Have to use MD_EPN for walk, MI_EPN can't */
 	mfspr	r10, SPRN_M_TWB	/* Get level 1 table entry address */
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
index 39bb8c5..b8dd515 100644
--- a/arch/powerpc/platforms/8xx/Kconfig
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -99,6 +99,22 @@ config 8xx_CPU6
 
 	  If in doubt, say N here.
 
+config 8xx_CPU15
+	bool "CPU15 Silicon Errata"
+	default y
+	help
+	  This enables a workaround for erratum CPU15 on MPC8xx chips.
+	  This bug can cause incorrect code execution under certain
+	  circumstances.  This workaround adds some overhead (a TLB miss
+	  every time execution crosses a page boundary), and you may wish
+	  to disable it if you have worked around the bug in the compiler
+	  (by not placing conditional branches or branches to LR or CTR
+	  in the last word of a page, with a target of the last cache
+	  line in the next page), or if you have used some other
+	  workaround.
+
+	  If in doubt, say Y here.
+
 choice
 	prompt "Microcode patch selection"
 	default NO_UCODE_PATCH
-- 
1.5.0.3

Re: [PATCH 04/61] 8xx: Work around CPU15 erratum.

[Segher Boessenkool]

> The CPU15 erratum on MPC8xx chips can cause incorrect code execution
> under certain circumstances, where there is a conditional or indirect
> branch in the last word of a page, with a target in the last cache  
> line
> of the next page.  This patch implements one of the suggested
> workarounds, by forcing a TLB miss whenever execution crosses a page
> boundary.  This is done by invalidating the pages before and after the
> one being loaded into the TLB in the ITLB miss handler.

So you never found a bug workaround without the terrible
overhead of this one?  A shame :-(


Segher

Re: [PATCH 04/61] 8xx: Work around CPU15 erratum.

[Scott Wood]

Segher Boessenkool wrote:
>> The CPU15 erratum on MPC8xx chips can cause incorrect code execution
>> under certain circumstances, where there is a conditional or indirect
>> branch in the last word of a page, with a target in the last cache  line
>> of the next page.  This patch implements one of the suggested
>> workarounds, by forcing a TLB miss whenever execution crosses a page
>> boundary.  This is done by invalidating the pages before and after the
>> one being loaded into the TLB in the ITLB miss handler.
> 
> 
> So you never found a bug workaround without the terrible
> overhead of this one?  A shame :-(

The only lower-overhead workaround I know of requires compiler 
modifications (and I made it configurable to allow for that possibility).

-Scott

[PATCH 05/61] bootwrapper: Change cuImage .gitignore entry to cuImage.*

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/.gitignore |    4 +---
 1 files changed, 1 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index eec7af7..3270335 100644
--- a/arch/powerpc/boot/.gitignore
+++ b/arch/powerpc/boot/.gitignore
@@ -18,9 +18,7 @@ kernel-vmlinux.strip.c
 kernel-vmlinux.strip.gz
 mktree
 uImage
-cuImage
-cuImage.bin.gz
-cuImage.elf
+cuImage.*
 zImage
 zImage.chrp
 zImage.coff
-- 
1.5.0.3

Re: [PATCH 05/61] bootwrapper: Change cuImage .gitignore entry to cuImage.*

[David Gibson]

On Tue, Jul 17, 2007 at 08:33:01PM -0500, Scott Wood wrote:
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
>  arch/powerpc/boot/.gitignore |    4 +---
>  1 files changed, 1 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
> index eec7af7..3270335 100644
> --- a/arch/powerpc/boot/.gitignore
> +++ b/arch/powerpc/boot/.gitignore
> @@ -18,9 +18,7 @@ kernel-vmlinux.strip.c
>  kernel-vmlinux.strip.gz
>  mktree
>  uImage
> -cuImage
> -cuImage.bin.gz
> -cuImage.elf
> +cuImage.*
>  zImage
>  zImage.chrp
>  zImage.coff

Err... your new wildcard won't match plain 'cuImage'.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

Re: [PATCH 05/61] bootwrapper: Change cuImage .gitignore entry to cuImage.*

[Scott Wood]

David Gibson wrote:
> On Tue, Jul 17, 2007 at 08:33:01PM -0500, Scott Wood wrote:
> 
>>Signed-off-by: Scott Wood <scottwood@freescale.com>
>>---
>> arch/powerpc/boot/.gitignore |    4 +---
>> 1 files changed, 1 insertions(+), 3 deletions(-)
>>
>>diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
>>index eec7af7..3270335 100644
>>--- a/arch/powerpc/boot/.gitignore
>>+++ b/arch/powerpc/boot/.gitignore
>>@@ -18,9 +18,7 @@ kernel-vmlinux.strip.c
>> kernel-vmlinux.strip.gz
>> mktree
>> uImage
>>-cuImage
>>-cuImage.bin.gz
>>-cuImage.elf
>>+cuImage.*
>> zImage
>> zImage.chrp
>> zImage.coff
> 
> 
> Err... your new wildcard won't match plain 'cuImage'.

When is plain "cuImage" ever generated anymore?

-Scott

Re: [PATCH 05/61] bootwrapper: Change cuImage .gitignore entry to cuImage.*

[David Gibson]

On Wed, Jul 18, 2007 at 11:09:11AM -0500, Scott Wood wrote:
> David Gibson wrote:
> > On Tue, Jul 17, 2007 at 08:33:01PM -0500, Scott Wood wrote:
> > 
> >>Signed-off-by: Scott Wood <scottwood@freescale.com>
> >>---
> >> arch/powerpc/boot/.gitignore |    4 +---
> >> 1 files changed, 1 insertions(+), 3 deletions(-)
> >>
> >>diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
> >>index eec7af7..3270335 100644
> >>--- a/arch/powerpc/boot/.gitignore
> >>+++ b/arch/powerpc/boot/.gitignore
> >>@@ -18,9 +18,7 @@ kernel-vmlinux.strip.c
> >> kernel-vmlinux.strip.gz
> >> mktree
> >> uImage
> >>-cuImage
> >>-cuImage.bin.gz
> >>-cuImage.elf
> >>+cuImage.*
> >> zImage
> >> zImage.chrp
> >> zImage.coff
> > 
> > 
> > Err... your new wildcard won't match plain 'cuImage'.
> 
> When is plain "cuImage" ever generated anymore?

Oh, yes...

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

[PATCH 06/61] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.

[Scott Wood]

On arch/ppc, Soft_emulate_8xx was used when full math emulation was
turned off to emulate a minimal subset of floating point load/store
instructions, to avoid needing a soft-float toolchain.  This function
is called, but not present, on arch/powerpc, causing a build error
if floating point emulation is turned off.

As soft-float toolchains are now common, I'm deleting the call rather
than moving Soft_emulate_8xx over to arch/powerpc.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/kernel/traps.c |   16 +++-------------
 1 files changed, 3 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index bf6445a..312fb67 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -912,9 +912,10 @@ void performance_monitor_exception(struct pt_regs *regs)
 #ifdef CONFIG_8xx
 void SoftwareEmulation(struct pt_regs *regs)
 {
+#ifdef CONFIG_MATH_EMULATION
 	extern int do_mathemu(struct pt_regs *);
-	extern int Soft_emulate_8xx(struct pt_regs *);
 	int errcode;
+#endif
 
 	CHECK_FULL_REGS(regs);
 
@@ -945,18 +946,7 @@ void SoftwareEmulation(struct pt_regs *regs)
 	}
 
 #else
-	errcode = Soft_emulate_8xx(regs);
-	switch (errcode) {
-	case 0:
-		emulate_single_step(regs);
-		return;
-	case 1:
-		_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
-		return;
-	case -EFAULT:
-		_exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
-		return;
-	}
+	_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
 #endif
 }
 #endif /* CONFIG_8xx */
-- 
1.5.0.3

Re: [PATCH 06/61] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.

[Kumar Gala]

On Jul 17, 2007, at 8:33 PM, Scott Wood wrote:

> On arch/ppc, Soft_emulate_8xx was used when full math emulation was
> turned off to emulate a minimal subset of floating point load/store
> instructions, to avoid needing a soft-float toolchain.  This function
> is called, but not present, on arch/powerpc, causing a build error
> if floating point emulation is turned off.
>
> As soft-float toolchains are now common, I'm deleting the call rather
> than moving Soft_emulate_8xx over to arch/powerpc.

We should move the Soft_emulate_8xx code over.  I see no reason to  
break a usage model that existed in arch/ppc.

- k

Re: [PATCH 06/61] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.

[Scott Wood]

Kumar Gala wrote:
> 
> On Jul 17, 2007, at 8:33 PM, Scott Wood wrote:
> 
>> On arch/ppc, Soft_emulate_8xx was used when full math emulation was
>> turned off to emulate a minimal subset of floating point load/store
>> instructions, to avoid needing a soft-float toolchain.  This function
>> is called, but not present, on arch/powerpc, causing a build error
>> if floating point emulation is turned off.
>>
>> As soft-float toolchains are now common, I'm deleting the call rather
>> than moving Soft_emulate_8xx over to arch/powerpc.
> 
> 
> We should move the Soft_emulate_8xx code over.  I see no reason to  
> break a usage model that existed in arch/ppc.

According to the comment in softemu8xx.c, the only reason for it was 
that "it was easier than trying to get the libraries compiled for 
software floating point."  Given that soft-float toolchains are easily 
had now, and that full emulation could be used if one really needs to 
work with hard-float binaries, I don't really see the need for this...

If you want to move it over and test it, though, be my guest. :-)

-Scott

Re: [PATCH 06/61] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.

[Kumar Gala]

On Jul 18, 2007, at 11:22 AM, Scott Wood wrote:

> Kumar Gala wrote:
>> On Jul 17, 2007, at 8:33 PM, Scott Wood wrote:
>>> On arch/ppc, Soft_emulate_8xx was used when full math emulation was
>>> turned off to emulate a minimal subset of floating point load/store
>>> instructions, to avoid needing a soft-float toolchain.  This  
>>> function
>>> is called, but not present, on arch/powerpc, causing a build error
>>> if floating point emulation is turned off.
>>>
>>> As soft-float toolchains are now common, I'm deleting the call  
>>> rather
>>> than moving Soft_emulate_8xx over to arch/powerpc.
>> We should move the Soft_emulate_8xx code over.  I see no reason  
>> to  break a usage model that existed in arch/ppc.
>
> According to the comment in softemu8xx.c, the only reason for it  
> was that "it was easier than trying to get the libraries compiled  
> for software floating point."  Given that soft-float toolchains are  
> easily had now, and that full emulation could be used if one really  
> needs to work with hard-float binaries, I don't really see the need  
> for this...
>
> If you want to move it over and test it, though, be my guest. :-)

I don't see any reason to break people that might not have updated  
their toolchains.  There is no reason for us to drop a feature like  
this w/o some additional warning.

I think its fine to just move the code over from arch/powerpc and  
than in the future we can deal with removing it in a more "proper"  
manor.

- k

Re: [PATCH 06/61] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.

[Scott Wood]

Kumar Gala wrote:
> I don't see any reason to break people that might not have updated  
> their toolchains.

Full math emulation is still an option...

>  There is no reason for us to drop a feature like  
> this w/o some additional warning.

...as is arch/ppc, whose remaining life expectancy can serve as the 
warning period.

-Scott

[PATCH 07/61] bootwrapper: Set timebase_period_ns from dt_fixup_cpu_clocks.

[Scott Wood]

This lets udelay() work properly on platforms which use dt_fixup_cpu_clocks.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/devtree.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/devtree.c b/arch/powerpc/boot/devtree.c
index c995155..3465d3f 100644
--- a/arch/powerpc/boot/devtree.c
+++ b/arch/powerpc/boot/devtree.c
@@ -61,6 +61,7 @@ void dt_fixup_memory(u64 start, u64 size)
 
 void dt_fixup_cpu_clocks(u32 cpu, u32 tb, u32 bus)
 {
+	extern unsigned long timebase_period_ns;
 	void *devp = NULL;
 
 	printf("CPU clock-frequency <- 0x%x (%dMHz)\n\r", cpu, MHZ(cpu));
@@ -74,6 +75,8 @@ void dt_fixup_cpu_clocks(u32 cpu, u32 tb, u32 bus)
 		if (bus > 0)
 			setprop_val(devp, "bus-frequency", bus);
 	}
+
+	timebase_period_ns = 1000000000 / tb;
 }
 
 void dt_fixup_clock(const char *path, u32 freq)
-- 
1.5.0.3

Re: [PATCH 07/61] bootwrapper: Set timebase_period_ns from dt_fixup_cpu_clocks.

[Stephen Rothwell]

[-- Attachment #1: Type: text/plain, Size: 353 bytes --]

On Tue, 17 Jul 2007 20:33:04 -0500 Scott Wood <scottwood@freescale.com> wrote:
>
  void dt_fixup_cpu_clocks(u32 cpu, u32 tb, u32 bus)
>  {
> +	extern unsigned long timebase_period_ns;

Why isn't this declared in a header file somewhere?

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

[PATCH 08/61] bootwrapper: dt_xlate_range() bugfixes

[Scott Wood]

1. The check whether ranges fits in the buffer was using elements rather
than bytes.
2. Empty ranges were not properly treated as transparent, and missing
ranges were treated as transparent.
3. The loop terminated when translating from the root rather than to.  Once
bug #2 was fixed, it failed due to a missing ranges in the root node.
4. In decoding the ranges property, the #size-cells used was that of
the parent, not the child.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/devtree.c |   20 +++++++++++++-------
 1 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/boot/devtree.c b/arch/powerpc/boot/devtree.c
index 3465d3f..f33c00b 100644
--- a/arch/powerpc/boot/devtree.c
+++ b/arch/powerpc/boot/devtree.c
@@ -219,7 +219,7 @@ static int dt_xlate(void *node, int res, int reglen, unsigned long *addr,
 	u32 this_addr[MAX_ADDR_CELLS];
 	void *parent;
 	u64 ret_addr, ret_size;
-	u32 naddr, nsize, prev_naddr;
+	u32 naddr, nsize, prev_naddr, prev_nsize;
 	int buflen, offset;
 
 	parent = get_parent(node);
@@ -234,7 +234,7 @@ static int dt_xlate(void *node, int res, int reglen, unsigned long *addr,
 	offset = (naddr + nsize) * res;
 
 	if (reglen < offset + naddr + nsize ||
-	    sizeof(dt_xlate_buf) < offset + naddr + nsize)
+	    sizeof(dt_xlate_buf) < (offset + naddr + nsize) * 4)
 		return 0;
 
 	copy_val(last_addr, dt_xlate_buf + offset, naddr);
@@ -245,20 +245,26 @@ static int dt_xlate(void *node, int res, int reglen, unsigned long *addr,
 		ret_size |= dt_xlate_buf[offset + naddr + 1];
 	}
 
-	while ((node = get_parent(node))) {
+	for (;;) {
 		prev_naddr = naddr;
+		prev_nsize = nsize;
+		node = parent;
 
-		get_reg_format(node, &naddr, &nsize);
+		parent = get_parent(node);
+		if (!parent)
+			break;
+
+		get_reg_format(parent, &naddr, &nsize);
 
 		buflen = getprop(node, "ranges", dt_xlate_buf,
 				sizeof(dt_xlate_buf));
-		if (buflen < 0)
+		if (buflen == 0)
 			continue;
-		if (buflen > sizeof(dt_xlate_buf))
+		if (buflen < 0 || buflen > sizeof(dt_xlate_buf))
 			return 0;
 
 		offset = find_range(last_addr, dt_xlate_buf, prev_naddr,
-		                    naddr, nsize, buflen / 4);
+		                    naddr, prev_nsize, buflen / 4);
 
 		if (offset < 0)
 			return 0;
-- 
1.5.0.3

[PATCH 09/61] bootwrapper: Add dt_is_compatible().

[Scott Wood]

This can be used rather than doing a simple strcmp, which will fail to
handle multiple compatible entries.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/devtree.c |   50 ++++++++++++++++++++++++++++++-------------
 arch/powerpc/boot/ops.h     |    1 +
 2 files changed, 36 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/boot/devtree.c b/arch/powerpc/boot/devtree.c
index f33c00b..455e146 100644
--- a/arch/powerpc/boot/devtree.c
+++ b/arch/powerpc/boot/devtree.c
@@ -114,7 +114,6 @@ void __dt_fixup_mac_addresses(u32 startindex, ...)
 }
 
 #define MAX_ADDR_CELLS 4
-#define MAX_RANGES 8
 
 static void get_reg_format(void *node, u32 *naddr, u32 *nsize)
 {
@@ -210,7 +209,7 @@ static int find_range(u32 *reg, u32 *ranges, int nregaddr,
  * In particular, PCI is not supported.  Also, only the beginning of the
  * reg block is tracked; size is ignored except in ranges.
  */
-static u32 dt_xlate_buf[MAX_ADDR_CELLS * MAX_RANGES * 3];
+static u32 prop_buf[MAX_PROP_LEN / 4];
 
 static int dt_xlate(void *node, int res, int reglen, unsigned long *addr,
 		unsigned long *size)
@@ -234,15 +233,15 @@ static int dt_xlate(void *node, int res, int reglen, unsigned long *addr,
 	offset = (naddr + nsize) * res;
 
 	if (reglen < offset + naddr + nsize ||
-	    sizeof(dt_xlate_buf) < (offset + naddr + nsize) * 4)
+	    MAX_PROP_LEN < (offset + naddr + nsize) * 4)
 		return 0;
 
-	copy_val(last_addr, dt_xlate_buf + offset, naddr);
+	copy_val(last_addr, prop_buf + offset, naddr);
 
-	ret_size = dt_xlate_buf[offset + naddr];
+	ret_size = prop_buf[offset + naddr];
 	if (nsize == 2) {
 		ret_size <<= 32;
-		ret_size |= dt_xlate_buf[offset + naddr + 1];
+		ret_size |= prop_buf[offset + naddr + 1];
 	}
 
 	for (;;) {
@@ -256,25 +255,25 @@ static int dt_xlate(void *node, int res, int reglen, unsigned long *addr,
 
 		get_reg_format(parent, &naddr, &nsize);
 
-		buflen = getprop(node, "ranges", dt_xlate_buf,
-				sizeof(dt_xlate_buf));
+		buflen = getprop(node, "ranges", prop_buf,
+				sizeof(prop_buf));
 		if (buflen == 0)
 			continue;
-		if (buflen < 0 || buflen > sizeof(dt_xlate_buf))
+		if (buflen < 0 || buflen > sizeof(prop_buf))
 			return 0;
 
-		offset = find_range(last_addr, dt_xlate_buf, prev_naddr,
+		offset = find_range(last_addr, prop_buf, prev_naddr,
 		                    naddr, prev_nsize, buflen / 4);
 
 		if (offset < 0)
 			return 0;
 
-		copy_val(this_addr, dt_xlate_buf + offset, prev_naddr);
+		copy_val(this_addr, prop_buf + offset, prev_naddr);
 
 		if (!sub_reg(last_addr, this_addr))
 			return 0;
 
-		copy_val(this_addr, dt_xlate_buf + offset + prev_naddr, naddr);
+		copy_val(this_addr, prop_buf + offset + prev_naddr, naddr);
 
 		if (!add_reg(last_addr, this_addr, naddr))
 			return 0;
@@ -301,16 +300,37 @@ int dt_xlate_reg(void *node, int res, unsigned long *addr, unsigned long *size)
 {
 	int reglen;
 
-	reglen = getprop(node, "reg", dt_xlate_buf, sizeof(dt_xlate_buf)) / 4;
+	reglen = getprop(node, "reg", prop_buf, sizeof(prop_buf)) / 4;
 	return dt_xlate(node, res, reglen, addr, size);
 }
 
 int dt_xlate_addr(void *node, u32 *buf, int buflen, unsigned long *xlated_addr)
 {
 
-	if (buflen > sizeof(dt_xlate_buf))
+	if (buflen > sizeof(prop_buf))
 		return 0;
 
-	memcpy(dt_xlate_buf, buf, buflen);
+	memcpy(prop_buf, buf, buflen);
 	return dt_xlate(node, 0, buflen / 4, xlated_addr, NULL);
 }
+
+int dt_is_compatible(void *node, const char *compat)
+{
+	char *buf = (char *)prop_buf;
+	int compat_len = strlen(compat);
+	int len, pos;
+
+	len = getprop(node, "compatible", buf, MAX_PROP_LEN);
+	if (len < 0)
+		return 0;
+
+	for (pos = 0; pos + compat_len < len; pos++) {
+		if (!strcmp(buf + pos, compat))
+			return 1;
+
+		while (buf[pos] && pos + compat_len < len)
+			pos++;
+	}
+
+	return 0;
+}
diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h
index 8607706..9a88a80 100644
--- a/arch/powerpc/boot/ops.h
+++ b/arch/powerpc/boot/ops.h
@@ -87,6 +87,7 @@ void *simple_alloc_init(char *base, unsigned long heap_size,
 extern void flush_cache(void *, unsigned long);
 int dt_xlate_reg(void *node, int res, unsigned long *addr, unsigned long *size);
 int dt_xlate_addr(void *node, u32 *buf, int buflen, unsigned long *xlated_addr);
+int dt_is_compatible(void *node, const char *compat);
 
 static inline void *finddevice(const char *name)
 {
-- 
1.5.0.3

Re: [PATCH 09/61] bootwrapper: Add dt_is_compatible().

[Milton Miller]

On Wed Jul 18 11:33:06 EST 2007, Scott Wood wrote:
> +int dt_is_compatible(void *node, const char *compat)
> +{
> +       char *buf = (char *)prop_buf;
> +       int compat_len = strlen(compat);
> +       int len, pos;
> +
> +       len = getprop(node, "compatible", buf, MAX_PROP_LEN);
> +       if (len < 0)
> +               return 0;
> +
> +       for (pos = 0; pos + compat_len < len; pos++) {
> +               if (!strcmp(buf + pos, compat))
> +                       return 1;
> +
> +               while (buf[pos] && pos + compat_len < len)
> +                       pos++;

This is buggy: if you are searching for "ns16550" and the compatable is 
"fsl,1234\0commons16550" this code will incorrectly says its 
compatable.

Comparing pos < len instead will do the right thing, at the cost of a 
few iterations of the loop.

> +       }
> +
> +       return 0;

milton

Re: [PATCH 09/61] bootwrapper: Add dt_is_compatible().

[Scott Wood]

Milton Miller wrote:
>> +       for (pos = 0; pos + compat_len < len; pos++) {
>> +               if (!strcmp(buf + pos, compat))
>> +                       return 1;
>> +
>> +               while (buf[pos] && pos + compat_len < len)
>> +                       pos++;
> 
> 
> This is buggy: if you are searching for "ns16550" and the compatable is 
> "fsl,1234\0commons16550" this code will incorrectly says its compatable.

How so?

The first iteration will compare "ns16550" to "fsl,1234", find that they 
don't match, and advance to the '\0'.

The second iteration will compare "ns16550" to "commons16550", find that 
they don't match, and advance to the 'n'.

The third iteration will not happen, since the loop condition fails, and 
not-compatible is returned.

> Comparing pos < len instead will do the right thing, at the cost of a 
> few iterations of the loop.

I'll grant that the extra iterations aren't worth doing the strlen() -- 
I'm not sure why I did it that way.

-Scott

[PATCH 10/61] bootwrapper: flatdevtree fixes

[Scott Wood]

1. ft_create_node was returning the internal pointer rather than a phandle.
2. ft_find_device_rel was treating lookups relative to root as an error.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/flatdevtree.c |   12 ++++++++----
 1 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/boot/flatdevtree.c b/arch/powerpc/boot/flatdevtree.c
index b732644..5b69aeb 100644
--- a/arch/powerpc/boot/flatdevtree.c
+++ b/arch/powerpc/boot/flatdevtree.c
@@ -659,9 +659,13 @@ void *ft_find_device_rel(struct ft_cxt *cxt, const void *top,
 {
 	char *node;
 
-	node = ft_node_ph2node(cxt, top);
-	if (node == NULL)
-		return NULL;
+	if (top) {
+		node = ft_node_ph2node(cxt, top);
+		if (node == NULL)
+			return NULL;
+	} else {
+		node = ft_root_node(cxt);
+	}
 
 	node = ft_find_descendent(cxt, node, srch_path);
 	return ft_get_phandle(cxt, node);
@@ -990,7 +994,7 @@ void *ft_create_node(struct ft_cxt *cxt, const void *parent, const char *name)
 			cxt->p = p;
 			ft_begin_node(cxt, name);
 			ft_end_node(cxt);
-			return p;
+			return ft_find_device_rel(cxt, parent, name);
 		}
 		p = next;
 	}
-- 
1.5.0.3

Re: [PATCH 10/61] bootwrapper: flatdevtree fixes

[Milton Miller]

On Wed Jul 18 11:33:08 EST 2007, Scott Wood wrote:
> 1. ft_create_node was returning the internal pointer rather than a 
> phandle.
> 2. ft_find_device_rel was treating lookups relative to root as an 
> error.

No, it is treating lookups relative to NULL as an error.

Your patch changes it to treat lookups relative to the NULL phandle as 
relative to root.

I've no objections to the other part, can you split these?

>
> Signed-off-by: Scott Wood <scottwood at freescale.com>
> ---
>  arch/powerpc/boot/flatdevtree.c |   12 ++++++++----
>  1 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/arch/powerpc/boot/flatdevtree.c 
> b/arch/powerpc/boot/flatdevtree.c
> index b732644..5b69aeb 100644
> --- a/arch/powerpc/boot/flatdevtree.c
> +++ b/arch/powerpc/boot/flatdevtree.c
> @@ -659,9 +659,13 @@ void *ft_find_device_rel(struct ft_cxt *cxt, 
> const void *top,
>  {
>         char *node;
>
> -       node = ft_node_ph2node(cxt, top);
> -       if (node == NULL)
> -               return NULL;
> +       if (top) {
> +               node = ft_node_ph2node(cxt, top);
> +               if (node == NULL)
> +                       return NULL;
> +       } else {
> +               node = ft_root_node(cxt);
> +       }
>

milton

[PATCH 11/61] bootwrapper: Add 16-bit I/O.

[Scott Wood]

Also, include types.h from io.h, so callers don't have to.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/io.h |   34 ++++++++++++++++++++++++++++++++++
 1 files changed, 34 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/io.h b/arch/powerpc/boot/io.h
index 32974ed..ff3aa19 100644
--- a/arch/powerpc/boot/io.h
+++ b/arch/powerpc/boot/io.h
@@ -1,5 +1,8 @@
 #ifndef _IO_H
 #define __IO_H
+
+#include "types.h"
+
 /*
  * Low-level I/O routines.
  *
@@ -20,6 +23,37 @@ static inline void out_8(volatile unsigned char *addr, int val)
 			     : "=m" (*addr) : "r" (val));
 }
 
+static inline unsigned in_le16(const volatile u16 *addr)
+{
+	unsigned ret;
+
+	__asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync"
+			     : "=r" (ret) : "r" (addr), "m" (*addr));
+
+	return ret;
+}
+
+static inline unsigned in_be16(const volatile u16 *addr)
+{
+	unsigned ret;
+
+	__asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
+			     : "=r" (ret) : "m" (*addr));
+	return ret;
+}
+
+static inline void out_le16(volatile u16 *addr, int val)
+{
+	__asm__ __volatile__("sthbrx %1,0,%2; sync" : "=m" (*addr)
+			     : "r" (val), "r" (addr));
+}
+
+static inline void out_be16(volatile u16 *addr, int val)
+{
+	__asm__ __volatile__("sth%U0%X0 %1,%0; sync"
+			     : "=m" (*addr) : "r" (val));
+}
+
 static inline unsigned in_le32(const volatile unsigned *addr)
 {
 	unsigned ret;
-- 
1.5.0.3

[PATCH 12/61] bootwrapper: Add TARGET_HAS_ETHn tests to ppcboot.h.

[Scott Wood]

U-boots more recent than when ppcboot.h was forked allow the board config
file to enable additional ethernet ports explicitly, rather than
using a hardcoded list of targets.  This allows bootwrapper platform
files to do the same.

Fortunately, nothing after the ethernet addresses is of interest to
cuboot platforms, so the inevitable mismatches won't be too catastrophic.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/ppcboot.h |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/boot/ppcboot.h b/arch/powerpc/boot/ppcboot.h
index 5290ff2..6ae6f90 100644
--- a/arch/powerpc/boot/ppcboot.h
+++ b/arch/powerpc/boot/ppcboot.h
@@ -78,17 +78,18 @@ typedef struct bd_info {
 	hymod_conf_t	bi_hymod_conf;	/* hymod configuration information */
 #endif
 #if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \
-	defined(TARGET_85xx) ||	defined(TARGET_83xx)
+	defined(TARGET_85xx) ||	defined(TARGET_83xx) || defined(TARGET_HAS_ETH1)
 	/* second onboard ethernet port */
 	unsigned char	bi_enet1addr[6];
 #define HAVE_ENET1ADDR
 #endif
-#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || defined(TARGET_85xx)
+#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \
+    defined(TARGET_85xx) || defined(TARGET_HAS_ETH2)
 	/* third onboard ethernet ports */
 	unsigned char	bi_enet2addr[6];
 #define HAVE_ENET2ADDR
 #endif
-#if defined(TARGET_440GX)
+#if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3)
 	/* fourth onboard ethernet ports */
 	unsigned char	bi_enet3addr[6];
 #define HAVE_ENET3ADDR
-- 
1.5.0.3

[PATCH 13/61] bootwrapper: Search the entire compatible list for serial devices.

[Scott Wood]

The serial code previously did a simple strcmp on the compatible
node; this fails when the match string is not the first compatible
listed.  Use dt_is_compatible() instead.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/serial.c |    8 ++------
 1 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index eaa0d3a..c551bac 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -114,18 +114,14 @@ int serial_console_init(void)
 {
 	void *devp;
 	int rc = -1;
-	char compat[MAX_PROP_LEN];
 
 	devp = serial_get_stdout_devp();
 	if (devp == NULL)
 		goto err_out;
 
-	if (getprop(devp, "compatible", compat, sizeof(compat)) < 0)
-		goto err_out;
-
-	if (!strcmp(compat, "ns16550"))
+	if (dt_is_compatible(devp, "ns16550"))
 		rc = ns16550_console_init(devp, &serial_cd);
-	else if (!strcmp(compat, "marvell,mpsc"))
+	else if (dt_is_compatible(devp, "marvell,mpsc"))
 		rc = mpsc_console_init(devp, &serial_cd);
 
 	/* Add other serial console driver calls here */
-- 
1.5.0.3

[PATCH 14/61] bootwrapper: Don't call serial_edit_cmdline if getc isn't defined.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/serial.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index c551bac..1c27110 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -129,7 +129,7 @@ int serial_console_init(void)
 	if (!rc) {
 		console_ops.open = serial_open;
 		console_ops.write = serial_write;
-		console_ops.edit_cmdline = serial_edit_cmdline;
+		console_ops.edit_cmdline = serial_cd.getc ? serial_edit_cmdline : NULL;
 		console_ops.close = serial_close;
 		console_ops.data = &serial_cd;
 
-- 
1.5.0.3

[PATCH 15/61] Declare udelay() in ops.h, and remove declarations in various users.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/mpsc.c        |    1 -
 arch/powerpc/boot/mv64x60_i2c.c |    2 --
 arch/powerpc/boot/ops.h         |    2 ++
 arch/powerpc/boot/prpmc2800.c   |    2 --
 arch/powerpc/boot/serial.c      |    2 --
 5 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/boot/mpsc.c b/arch/powerpc/boot/mpsc.c
index f1c0e96..802ea53 100644
--- a/arch/powerpc/boot/mpsc.c
+++ b/arch/powerpc/boot/mpsc.c
@@ -17,7 +17,6 @@
 #include "io.h"
 #include "ops.h"
 
-extern void udelay(long delay);
 
 #define MPSC_CHR_1		0x000c
 
diff --git a/arch/powerpc/boot/mv64x60_i2c.c b/arch/powerpc/boot/mv64x60_i2c.c
index 435fe85..d085377 100644
--- a/arch/powerpc/boot/mv64x60_i2c.c
+++ b/arch/powerpc/boot/mv64x60_i2c.c
@@ -21,8 +21,6 @@
 #include "ops.h"
 #include "mv64x60.h"
 
-extern void udelay(long);
-
 /* Register defines */
 #define MV64x60_I2C_REG_SLAVE_ADDR			0x00
 #define MV64x60_I2C_REG_DATA				0x04
diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h
index 9a88a80..c48e8ed 100644
--- a/arch/powerpc/boot/ops.h
+++ b/arch/powerpc/boot/ops.h
@@ -192,4 +192,6 @@ static inline void exit(void)
 	static char _bss_stack[size]; \
 	void *_platform_stack_top = _bss_stack + sizeof(_bss_stack);
 
+void udelay(long delay);
+
 #endif /* _PPC_BOOT_OPS_H_ */
diff --git a/arch/powerpc/boot/prpmc2800.c b/arch/powerpc/boot/prpmc2800.c
index f428bac..5c6cd36 100644
--- a/arch/powerpc/boot/prpmc2800.c
+++ b/arch/powerpc/boot/prpmc2800.c
@@ -25,8 +25,6 @@ extern char _end[];
 extern char _vmlinux_start[], _vmlinux_end[];
 extern char _dtb_start[], _dtb_end[];
 
-extern void udelay(long delay);
-
 #define KB	1024U
 #define MB	(KB*KB)
 #define GB	(KB*MB)
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index 1c27110..441151f 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -19,8 +19,6 @@
 #include "io.h"
 #include "ops.h"
 
-extern void udelay(long delay);
-
 static int serial_open(void)
 {
 	struct serial_console_data *scdp = console_ops.data;
-- 
1.5.0.3

[PATCH 16/61] bootwrapper: Add CPM serial driver.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/Makefile     |    3 +-
 arch/powerpc/boot/cpm-serial.c |  247 ++++++++++++++++++++++++++++++++++++++++
 arch/powerpc/boot/ops.h        |    1 +
 arch/powerpc/boot/serial.c     |    2 +
 4 files changed, 252 insertions(+), 1 deletions(-)
 create mode 100644 arch/powerpc/boot/cpm-serial.c

diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 61a6f34..997980f 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -44,7 +44,8 @@ $(addprefix $(obj)/,$(zlib) gunzip_util.o main.o): \
 src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
 		ns16550.c serial.c simple_alloc.c div64.S util.S \
 		gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \
-		44x.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c
+		44x.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c \
+		cpm-serial.c
 src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
 		cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
 		ps3-head.S ps3-hvcall.S ps3.c
diff --git a/arch/powerpc/boot/cpm-serial.c b/arch/powerpc/boot/cpm-serial.c
new file mode 100644
index 0000000..2794d1c
--- /dev/null
+++ b/arch/powerpc/boot/cpm-serial.c
@@ -0,0 +1,247 @@
+/*
+ * CPM serial console support.
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * It is assumed that the firmware (or the platform file) has already set
+ * up the port.
+ */
+
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+struct cpm_scc {
+	u32 gsmrl;
+	u32 gsmrh;
+	u16 psmr;
+	u8 res1[2];
+	u16 todr;
+	u16 dsr;
+	u16 scce;
+	u8 res2[2];
+	u16 sccm;
+	u8 res3;
+	u8 sccs;
+	u8 res4[8];
+};
+
+struct cpm_smc {
+	u8 res1[2];
+	u16 smcmr;
+	u8 res2[2];
+	u8 smce;
+	u8 res3[3];
+	u8 smcm;
+	u8 res4[5];
+};
+
+struct cpm_param {
+	u16 rbase;
+	u16 tbase;
+	u8 rfcr;
+	u8 tfcr;
+};
+
+struct cpm_bd {
+	u16 sc;   /* Status and Control */
+	u16 len;  /* Data length in buffer */
+	u8 *addr; /* Buffer address in host memory */
+};
+
+static void *cpcr;
+static struct cpm_param *param;
+static struct cpm_smc *smc;
+static struct cpm_scc *scc;
+struct cpm_bd *tbdf, *rbdf;
+static u32 cpm_cmd;
+static u8 *dpram_start;
+int is_cpm2;
+
+void cpm1_cmd(int op)
+{
+	while (in_be16(cpcr) & 1)
+		;
+
+	out_be16(cpcr, (op << 8) | cpm_cmd | 1);
+
+	while (in_be16(cpcr) & 1)
+		;
+}
+
+void cpm2_cmd(int op)
+{
+	while (in_be32(cpcr) & 0x10000)
+		;
+
+	out_be32(cpcr, op | cpm_cmd | 0x10000);
+
+	while (in_be32(cpcr) & 0x10000)
+		;
+}
+
+void do_cmd(int op)
+{
+	if (is_cpm2)
+		cpm2_cmd(op);
+	else
+		cpm1_cmd(op);
+}
+
+void disable_port(void)
+{
+	do_cmd(4); /* STOP TX */
+
+	if (smc)
+		out_be16(&smc->smcmr, in_be16(&smc->smcmr) & ~3);
+	else
+		out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) & ~0x30);
+}
+
+void enable_port(void)
+{
+	if (smc)
+		out_be16(&smc->smcmr, in_be16(&smc->smcmr) | 3);
+	else
+		out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) | 0x30);
+
+	do_cmd(6); /* RESTART TX */
+}
+
+static int serial_open(void)
+{
+	int dpaddr = 0x800;
+	disable_port();
+
+	out_8(&param->rfcr, 0x10);
+	out_8(&param->tfcr, 0x10);
+
+	rbdf = (struct cpm_bd *)(dpram_start + dpaddr);
+	rbdf->addr = (u8 *)(rbdf + 2);
+	rbdf->sc = 0xa000;
+	rbdf->len = 1;
+
+	tbdf = rbdf + 1;
+	tbdf->addr = (u8 *)(rbdf + 2) + 1;
+	tbdf->sc = 0x2000;
+	tbdf->len = 1;
+
+	asm volatile("sync" : : : "memory");
+	out_be16(&param->rbase, dpaddr);
+	out_be16(&param->tbase, dpaddr + sizeof(struct cpm_bd));
+
+	do_cmd(0); /* INIT RX AND TX PARAMS */
+
+	enable_port();
+	return 0;
+}
+
+void serial_close(void)
+{
+	/* Disable RX, but leave TX on for early console output. */
+
+	if (smc)
+		out_be16(&smc->smcmr, in_be16(&smc->smcmr) & ~1);
+	else
+		out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) & ~0x20);
+}
+
+void serial_putc(unsigned char c)
+{
+	while (tbdf->sc & 0x8000)
+		asm volatile("" : : : "memory");
+
+	asm volatile("sync" : : : "memory");
+
+	tbdf->addr[0] = c;
+	asm volatile("eieio" : : : "memory");
+	tbdf->sc |= 0x8000;
+}
+
+unsigned char serial_tstc(void)
+{
+	asm volatile("" : : : "memory");
+	return !(rbdf->sc & 0x8000);
+}
+
+unsigned char serial_getc(void)
+{
+	unsigned char c;
+
+	while (!serial_tstc())
+		;
+
+	asm volatile("sync" : : : "memory");
+	c = rbdf->addr[0];
+	asm volatile("eieio" : : : "memory");
+	rbdf->sc |= 0x8000;
+
+	return c;
+}
+
+int cpm_console_init(void *devp, struct serial_console_data *scdp)
+{
+	void *reg_virt[2];
+	int is_smc, n;
+	unsigned long reg_phys;
+	void *parent;
+
+	if (dt_is_compatible(devp, "fsl,cpm-smc-uart"))
+		is_smc = 1;
+	else if (dt_is_compatible(devp, "fsl,cpm-scc-uart"))
+		is_smc = 0;
+	else
+		return -1;
+
+	if (dt_is_compatible(devp, "fsl,cpm2-uart"))
+		is_cpm2 = 1;
+	else if (!dt_is_compatible(devp, "fsl,cpm1-uart"))
+		return -1;
+
+	n = getprop(devp, "fsl,cpm-command", &cpm_cmd, 4);
+	if (n < 4)
+		return -1;
+
+	n = getprop(devp, "virtual-reg", reg_virt, sizeof(reg_virt));
+	if (n < (int)sizeof(reg_virt)) {
+		for (n = 0; n < 2; n++) {
+			if (!dt_xlate_reg(devp, n, &reg_phys, NULL))
+				return -1;
+
+			reg_virt[n] = (void *)reg_phys;
+		}
+	}
+
+	if (is_smc)
+		smc = reg_virt[0];
+	else
+		scc = reg_virt[0];
+
+	param = reg_virt[1];
+
+	parent = get_parent(devp);
+	if (!parent)
+		return -1;
+
+	n = getprop(parent, "virtual-reg", reg_virt, sizeof(reg_virt));
+	if (n < (int)sizeof(reg_virt)) {
+		for (n = 0; n < 2; n++) {
+			if (!dt_xlate_reg(parent, n, &reg_phys, NULL))
+				return -1;
+
+			reg_virt[n] = (void *)reg_phys;
+		}
+	}
+
+	cpcr = reg_virt[0];
+	dpram_start = reg_virt[1];
+
+	scdp->open = serial_open;
+	scdp->close = serial_close;
+	scdp->putc = serial_putc;
+	scdp->getc = serial_getc;
+	scdp->tstc = serial_tstc;
+
+	return 0;
+}
diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h
index c48e8ed..453800e 100644
--- a/arch/powerpc/boot/ops.h
+++ b/arch/powerpc/boot/ops.h
@@ -82,6 +82,7 @@ int ft_init(void *dt_blob, unsigned int max_size, unsigned int max_find_device);
 int serial_console_init(void);
 int ns16550_console_init(void *devp, struct serial_console_data *scdp);
 int mpsc_console_init(void *devp, struct serial_console_data *scdp);
+int cpm_console_init(void *devp, struct serial_console_data *scdp);
 void *simple_alloc_init(char *base, unsigned long heap_size,
 			unsigned long granularity, unsigned long max_allocs);
 extern void flush_cache(void *, unsigned long);
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index 441151f..3d96cd2 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -121,6 +121,8 @@ int serial_console_init(void)
 		rc = ns16550_console_init(devp, &serial_cd);
 	else if (dt_is_compatible(devp, "marvell,mpsc"))
 		rc = mpsc_console_init(devp, &serial_cd);
+	else if (dt_is_compatible(devp, "fsl,cpm-uart"))
+		rc = cpm_console_init(devp, &serial_cd);
 
 	/* Add other serial console driver calls here */
 
-- 
1.5.0.3

[PATCH 17/61] bootwrapper: Add 8xx support.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/Makefile             |    3 +-
 arch/powerpc/boot/cuboot-8xx.c         |   47 ++++++++++++++++++++++++++++++++
 arch/powerpc/platforms/Kconfig.cputype |    1 +
 3 files changed, 50 insertions(+), 1 deletions(-)
 create mode 100644 arch/powerpc/boot/cuboot-8xx.c

diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 997980f..e75c92b 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -48,7 +48,7 @@ src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
 		cpm-serial.c
 src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
 		cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
-		ps3-head.S ps3-hvcall.S ps3.c
+		ps3-head.S ps3-hvcall.S ps3.c cuboot-8xx.c
 src-boot := $(src-wlib) $(src-plat) empty.c
 
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -140,6 +140,7 @@ image-$(CONFIG_PPC_ISERIES)		+= zImage.iseries
 image-$(CONFIG_DEFAULT_UIMAGE)		+= uImage
 
 ifneq ($(CONFIG_DEVICE_TREE),"")
+image-$(CONFIG_PPC_8xx)			+= cuImage.8xx
 image-$(CONFIG_PPC_83xx)		+= cuImage.83xx
 image-$(CONFIG_PPC_85xx)		+= cuImage.85xx
 image-$(CONFIG_EBONY)			+= treeImage.ebony cuImage.ebony
diff --git a/arch/powerpc/boot/cuboot-8xx.c b/arch/powerpc/boot/cuboot-8xx.c
new file mode 100644
index 0000000..35476a0
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-8xx.c
@@ -0,0 +1,47 @@
+/*
+ * Old U-boot compatibility for 8xx
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "cuboot.h"
+
+#define TARGET_8xx
+#define TARGET_HAS_ETH1
+#include "ppcboot.h"
+
+static bd_t bd;
+extern char _end[];
+extern char _dtb_start[], _dtb_end[];
+
+static void platform_fixups(void)
+{
+	void *node;
+
+	dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+	dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
+	dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq);
+
+	node = finddevice("/soc/cpm");
+	if (node) {
+		setprop(node, "clock-frequency", &bd.bi_busfreq, 4);
+		setprop(node, "fsl,brg-frequency", &bd.bi_busfreq, 4);
+	}
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+	CUBOOT_INIT();
+	ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+	serial_console_init();
+	platform_ops.fixups = platform_fixups;
+}
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index b8b5fde..0e865b8 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -36,6 +36,7 @@ config PPC_8xx
 	bool "Freescale 8xx"
 	select FSL_SOC
 	select 8xx
+	select WANT_DEVICE_TREE
 
 config 40x
 	bool "AMCC 40x"
-- 
1.5.0.3

Re: [PATCH 17/61] bootwrapper: Add 8xx support.

[David Gibson]

On Tue, Jul 17, 2007 at 08:33:18PM -0500, Scott Wood wrote:
[snip]
> diff --git a/arch/powerpc/boot/cuboot-8xx.c b/arch/powerpc/boot/cuboot-8xx.c
> new file mode 100644
> index 0000000..35476a0
> --- /dev/null
> +++ b/arch/powerpc/boot/cuboot-8xx.c
> @@ -0,0 +1,47 @@
> +/*
> + * Old U-boot compatibility for 8xx
> + *
> + * Author: Scott Wood <scottwood@freescale.com>
> + *
> + * Copyright (c) 2007 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License version 2 as published
> + * by the Free Software Foundation.
> + */
> +
> +#include "ops.h"
> +#include "stdio.h"
> +#include "cuboot.h"
> +
> +#define TARGET_8xx
> +#define TARGET_HAS_ETH1
           ^^^^^^^^^^^^^^^
Is that really true for all 8xx boards?

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

Re: [PATCH 17/61] bootwrapper: Add 8xx support.

[Scott Wood]

David Gibson wrote:
> On Tue, Jul 17, 2007 at 08:33:18PM -0500, Scott Wood wrote:
> [snip]
> 
>>diff --git a/arch/powerpc/boot/cuboot-8xx.c b/arch/powerpc/boot/cuboot-8xx.c
>>new file mode 100644
>>index 0000000..35476a0
>>--- /dev/null
>>+++ b/arch/powerpc/boot/cuboot-8xx.c
>>@@ -0,0 +1,47 @@
>>+/*
>>+ * Old U-boot compatibility for 8xx
>>+ *
>>+ * Author: Scott Wood <scottwood@freescale.com>
>>+ *
>>+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
>>+ *
>>+ * This program is free software; you can redistribute it and/or modify it
>>+ * under the terms of the GNU General Public License version 2 as published
>>+ * by the Free Software Foundation.
>>+ */
>>+
>>+#include "ops.h"
>>+#include "stdio.h"
>>+#include "cuboot.h"
>>+
>>+#define TARGET_8xx
>>+#define TARGET_HAS_ETH1
> 
>            ^^^^^^^^^^^^^^^
> Is that really true for all 8xx boards?

Well, no.  Even on a given board, it depends on the version of u-boot.

There's nothing after enet1addr that the bootwrapper cares about, 
though, so the only harm is if the device tree has a second network 
interface but u-boot doesn't know about it, and the bootwrapper ends up 
pulling in junk rather than leaving zeroes.

-Scott

Re: [PATCH 17/61] bootwrapper: Add 8xx support.

[David Gibson]

On Wed, Jul 18, 2007 at 11:13:05AM -0500, Scott Wood wrote:
> David Gibson wrote:
> > On Tue, Jul 17, 2007 at 08:33:18PM -0500, Scott Wood wrote:
> > [snip]
> > 
> >>diff --git a/arch/powerpc/boot/cuboot-8xx.c b/arch/powerpc/boot/cuboot-8xx.c
> >>new file mode 100644
> >>index 0000000..35476a0
> >>--- /dev/null
> >>+++ b/arch/powerpc/boot/cuboot-8xx.c
> >>@@ -0,0 +1,47 @@
> >>+/*
> >>+ * Old U-boot compatibility for 8xx
> >>+ *
> >>+ * Author: Scott Wood <scottwood@freescale.com>
> >>+ *
> >>+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
> >>+ *
> >>+ * This program is free software; you can redistribute it and/or modify it
> >>+ * under the terms of the GNU General Public License version 2 as published
> >>+ * by the Free Software Foundation.
> >>+ */
> >>+
> >>+#include "ops.h"
> >>+#include "stdio.h"
> >>+#include "cuboot.h"
> >>+
> >>+#define TARGET_8xx
> >>+#define TARGET_HAS_ETH1
> > 
> >            ^^^^^^^^^^^^^^^
> > Is that really true for all 8xx boards?
> 
> Well, no.  Even on a given board, it depends on the version of u-boot.
> 
> There's nothing after enet1addr that the bootwrapper cares about, 
> though, so the only harm is if the device tree has a second network 
> interface but u-boot doesn't know about it, and the bootwrapper ends up 
> pulling in junk rather than leaving zeroes.

That sounds like a terribly fragile way of handling things.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

Re: [PATCH 17/61] bootwrapper: Add 8xx support.

[Scott Wood]

David Gibson wrote:
> On Wed, Jul 18, 2007 at 11:13:05AM -0500, Scott Wood wrote:
>>Well, no.  Even on a given board, it depends on the version of u-boot.
>>
>>There's nothing after enet1addr that the bootwrapper cares about, 
>>though, so the only harm is if the device tree has a second network 
>>interface but u-boot doesn't know about it, and the bootwrapper ends up 
>>pulling in junk rather than leaving zeroes.
> 
> 
> That sounds like a terribly fragile way of handling things.

Yes, but that's inherent in the way the bd_t is defined.  The robust way 
is to get device tree support into u-boot.

-Scott

[PATCH 18/61] bootwrapper: Add PowerQUICC II (82xx with CPM) support

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/Makefile     |    3 +-
 arch/powerpc/boot/cuboot-pq2.c |  217 ++++++++++++++++++++++++++++++++++++++++
 arch/powerpc/platforms/Kconfig |    1 +
 3 files changed, 220 insertions(+), 1 deletions(-)
 create mode 100644 arch/powerpc/boot/cuboot-pq2.c

diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index e75c92b..4ab5f75 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -48,7 +48,7 @@ src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
 		cpm-serial.c
 src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
 		cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
-		ps3-head.S ps3-hvcall.S ps3.c cuboot-8xx.c
+		ps3-head.S ps3-hvcall.S ps3.c cuboot-8xx.c cuboot-pq2.c
 src-boot := $(src-wlib) $(src-plat) empty.c
 
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -141,6 +141,7 @@ image-$(CONFIG_DEFAULT_UIMAGE)		+= uImage
 
 ifneq ($(CONFIG_DEVICE_TREE),"")
 image-$(CONFIG_PPC_8xx)			+= cuImage.8xx
+image-$(CONFIG_8260)			+= cuImage.pq2
 image-$(CONFIG_PPC_83xx)		+= cuImage.83xx
 image-$(CONFIG_PPC_85xx)		+= cuImage.85xx
 image-$(CONFIG_EBONY)			+= treeImage.ebony cuImage.ebony
diff --git a/arch/powerpc/boot/cuboot-pq2.c b/arch/powerpc/boot/cuboot-pq2.c
new file mode 100644
index 0000000..74f793b
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-pq2.c
@@ -0,0 +1,217 @@
+/*
+ * Old U-boot compatibility for PowerQUICC II
+ * (a.k.a. 82xx with CPM, not the 8240 family of chips)
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "cuboot.h"
+#include "io.h"
+
+#define TARGET_CPM2
+#define TARGET_HAS_ETH1
+#include "ppcboot.h"
+
+static bd_t bd;
+extern char _end[];
+extern char _dtb_start[], _dtb_end[];
+
+struct cs_range {
+	u32 csnum;
+	u32 base; /* must be zero */
+	u32 addr;
+	u32 size;
+};
+
+struct pci_range {
+	u32 flags;
+	u32 pci_addr[2];
+	u32 phys_addr;
+	u32 size[2];
+};
+
+struct cs_range cs_ranges_buf[MAX_PROP_LEN / sizeof(struct cs_range)];
+struct pci_range pci_ranges_buf[MAX_PROP_LEN / sizeof(struct pci_range)];
+
+/* Different versions of u-boot put the BCSR in different places,
+ * so we check the BRx registers and update the ranges property
+ * appropriately.
+ *
+ * #address/#size must be 2/1 for chipselect bus, 1/1 for parent bus.
+ * Ranges must be for whole chip selects. */
+static void update_cs_ranges(void)
+{
+	u32 ctrl_ph;
+	void *ctrl_node, *bus_node;
+	u32 *ctrl_addr;
+	unsigned long ctrl_size;
+	int len;
+	int i;
+
+	bus_node = finddevice("/chipselect");
+	if (!bus_node || !dt_is_compatible(bus_node, "fsl,pq2-chipselect"))
+		return;
+
+	len = getprop(bus_node, "fsl,ctrl", &ctrl_ph, 4);
+	if (len != 4)
+		return;
+
+	ctrl_node = find_node_by_prop_value(NULL, "linux,phandle",
+	                                    (char *)&ctrl_ph, 4);
+	if (!ctrl_node)
+		return;
+
+	if (!dt_is_compatible(ctrl_node, "fsl,pq2-chipselect-ctrl"))
+		return;
+
+	if (!dt_xlate_reg(ctrl_node, 0, (unsigned long *)&ctrl_addr,
+	                  &ctrl_size))
+		return;
+
+	len = getprop(bus_node, "ranges", cs_ranges_buf, sizeof(cs_ranges_buf));
+
+	for (i = 0; i < len / sizeof(struct cs_range); i++) {
+		u32 base, option;
+		int cs = cs_ranges_buf[i].csnum;
+		if (cs >= ctrl_size / 8)
+			continue;
+
+		base = in_be32(&ctrl_addr[cs * 2]);
+
+		/* If CS is already valid, use the existing flags.
+		 * Otherwise, guess a sane default.
+		 */
+		if (base & 1) {
+			base &= 0x7fff;
+			option = in_be32(&ctrl_addr[cs * 2 + 1]);
+		} else {
+			base = 0x1801;
+			option = 0x10;
+		}
+
+		out_be32(&ctrl_addr[cs * 2], 0);
+		out_be32(&ctrl_addr[cs * 2 + 1],
+		         option | ~(cs_ranges_buf[i].size - 1));
+		out_be32(&ctrl_addr[cs * 2], base | cs_ranges_buf[i].addr);
+	}
+}
+
+/* Older u-boots don't set PCI up properly.  Update the hardware
+ * to match the device tree.  The prefetch mem region and non-prefetch
+ * mem region must be contiguous in the host bus.  PCI #addr/#size must
+ * be 3/2.  Parent #address-cells must be 1.  All addresses and sizes
+ * must fit in 32 bits.
+ */
+static void fixup_pci(void)
+{
+	struct pci_range *mem = NULL, *mmio = NULL,
+	                 *io = NULL, *mem_base = NULL;
+	u32 *pci_regs[3];
+	int i, len;
+
+	void *node = finddevice("/soc/pci");
+	if (!node || !dt_is_compatible(node, "fsl,pq2-pci"))
+		return;
+
+	for (i = 0; i < 3; i++)
+		if (!dt_xlate_reg(node, i, (unsigned long *)&pci_regs[i], NULL))
+			return;
+
+	len = getprop(node, "ranges", pci_ranges_buf, sizeof(pci_ranges_buf));
+
+	for (i = 0; i < len / sizeof(struct pci_range); i++) {
+		u32 flags = pci_ranges_buf[i].flags & 0x43000000;
+
+		if (flags == 0x42000000)
+			mem = &pci_ranges_buf[i];
+		else if (flags == 0x02000000)
+			mmio = &pci_ranges_buf[i];
+		else if (flags == 0x01000000)
+			io = &pci_ranges_buf[i];
+	}
+
+	if (!mem || !mmio || !io)
+		return;
+
+	if (mem->phys_addr + mem->size[1] == mmio->phys_addr)
+		mem_base = mem;
+	else if (mmio->phys_addr + mmio->size[1] == mem->phys_addr)
+		mem_base = mmio;
+	else
+		return;
+
+	out_be32(&pci_regs[1][0], mem_base->phys_addr | 1);
+	out_be32(&pci_regs[2][0], ~(mem->size[1] + mmio->size[1] - 1));
+
+	out_be32(&pci_regs[1][1], io->phys_addr | 1);
+	out_be32(&pci_regs[2][1], ~(io->size[1] - 1));
+
+	out_le32(&pci_regs[0][0], mem->pci_addr[1] >> 12);
+	out_le32(&pci_regs[0][2], mem->phys_addr >> 12);
+	out_le32(&pci_regs[0][4], (~(mem->size[1] - 1) >> 12) | 0xa0000000);
+
+	out_le32(&pci_regs[0][6], mmio->pci_addr[1] >> 12);
+	out_le32(&pci_regs[0][8], mmio->phys_addr >> 12);
+	out_le32(&pci_regs[0][10], (~(mmio->size[1] - 1) >> 12) | 0x80000000);
+
+	out_le32(&pci_regs[0][12], io->pci_addr[1] >> 12);
+	out_le32(&pci_regs[0][14], io->phys_addr >> 12);
+	out_le32(&pci_regs[0][16], (~(io->size[1] - 1) >> 12) | 0xc0000000);
+
+	/* Inbound translation */
+	out_le32(&pci_regs[0][58], 0);
+	out_le32(&pci_regs[0][60], 0);
+
+	/* FIXME: non-power-of-two memsizes */
+	out_le32(&pci_regs[0][62], 0xa0000000 | ((~(bd.bi_memsize - 1)) >> 12));
+
+	/* If PCI is disabled, drive RST high to enable. */
+	if (!(in_le32(&pci_regs[0][32]) & 1)) {
+		 /* Tpvrh (Power valid to RST# high) 100 ms */
+		udelay(100000);
+
+		out_le32(&pci_regs[0][32], 1);
+
+		/* Trhfa (RST# high to first cfg access) 2^25 clocks */
+		udelay(1020000);
+	}
+
+	/* Enable bus master and memory access */
+	out_le32(&pci_regs[0][64], 0x80000004);
+	out_le32(&pci_regs[0][65], in_le32(&pci_regs[0][65]) | 6);
+}
+
+static void platform_fixups(void)
+{
+	void *node;
+
+	dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+	dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
+	dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
+
+	node = finddevice("/soc/cpm");
+	if (node) {
+		setprop(node, "clock-frequency", &bd.bi_cpmfreq, 4);
+		setprop(node, "fsl,brg-frequency", &bd.bi_brgfreq, 4);
+	}
+
+	update_cs_ranges();
+	fixup_pci();
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+	CUBOOT_INIT();
+	ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+	serial_console_init();
+	platform_ops.fixups = platform_fixups;
+}
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 33545d3..76b3492 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -19,6 +19,7 @@ config EMBEDDED6xx
 config PPC_82xx
 	bool "Freescale 82xx"
 	depends on 6xx
+	select WANT_DEVICE_TREE
 
 config PPC_83xx
 	bool "Freescale 83xx"
-- 
1.5.0.3

[PATCH 20/61] Add early debug console for CPM serial ports.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/Kconfig.debug       |    9 +++++++
 arch/powerpc/kernel/head_32.S    |   16 +++++++++++++
 arch/powerpc/kernel/udbg.c       |    2 +
 arch/powerpc/sysdev/Makefile     |    1 +
 arch/powerpc/sysdev/cpm_common.c |   44 ++++++++++++++++++++++++++++++++++++++
 arch/powerpc/sysdev/cpm_common.h |    9 +++++++
 include/asm-powerpc/udbg.h       |    1 +
 7 files changed, 82 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/sysdev/cpm_common.c
 create mode 100644 arch/powerpc/sysdev/cpm_common.h

diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 346cd3b..b124e6b 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -211,6 +211,15 @@ config PPC_EARLY_DEBUG_44x
 	  Select this to enable early debugging for IBM 44x chips via the
 	  inbuilt serial port.
 
+config PPC_EARLY_DEBUG_CPM
+	bool "Early serial debugging for Freescale CPM-based serial ports"
+	depends on SERIAL_CPM
+	select PIN_TLB if PPC_8xx
+	help
+	  Select this to enable early debugging for Freescale chips
+	  using a CPM-based serial port.  This assumes that the bootwrapper
+	  has run, and set up the CPM in a particular way.
+
 endchoice
 
 config PPC_EARLY_DEBUG_44x_PHYSLOW
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 7d73a13..e950a75 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -152,6 +152,9 @@ __after_mmu_off:
 #if defined(CONFIG_BOOTX_TEXT)
 	bl	setup_disp_bat
 #endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+	bl	setup_cpm_bat
+#endif
 
 /*
  * Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1248,6 +1251,19 @@ setup_disp_bat:
 	blr
 #endif /* CONFIG_BOOTX_TEXT */
 
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+setup_cpm_bat:
+	lis	r8, 0xf000
+	ori	r8, r8,	0x002a
+	mtspr	SPRN_DBAT1L, r8
+
+	lis	r11, 0xf000
+	ori	r11, r11, (BL_1M << 2) | 2
+	mtspr	SPRN_DBAT1U, r11
+
+	blr
+#endif
+
 #ifdef CONFIG_8260
 /* Jump into the system reset for the rom.
  * We first disable the MMU, and then jump to the ROM reset address.
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index cbca1df..422856c 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -54,6 +54,8 @@ void __init udbg_early_init(void)
 #elif defined(CONFIG_PPC_EARLY_DEBUG_44x)
 	/* PPC44x debug */
 	udbg_init_44x_as1();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_CPM)
+	udbg_init_cpm();
 #endif
 }
 
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index f65078c..7529cf2 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -32,6 +32,7 @@ endif
 
 # Temporary hack until we have migrated to asm-powerpc
 ifeq ($(ARCH),powerpc)
+obj-$(CONFIG_CPM1)$(CONFIG_CPM2) += cpm_common.o
 obj-$(CONFIG_CPM2)		+= cpm2_common.o cpm2_pic.o
 obj-$(CONFIG_8xx)		+= mpc8xx_pic.o commproc.o
 obj-$(CONFIG_UCODE_PATCH)	+= micropatch.o
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
new file mode 100644
index 0000000..92ed644
--- /dev/null
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -0,0 +1,44 @@
+/*
+ * Common CPM code
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <asm/udbg.h>
+#include <asm/io.h>
+#include <asm/system.h>
+#include <mm/mmu_decl.h>
+#include "cpm_common.h"
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+void udbg_putc_cpm(char c)
+{
+	u8 __iomem *txbuf = (u8 __iomem *)in_be32(&cpm_udbg_txdesc[1]);
+
+	if (c == '\n')
+		udbg_putc('\r');
+
+	while (in_be32(&cpm_udbg_txdesc[0]) & 0x80000000)
+		;
+
+	out_8(txbuf, c);
+	out_be32(&cpm_udbg_txdesc[0], 0xa0000001);
+}
+
+void __init udbg_init_cpm(void)
+{
+	if (cpm_udbg_txdesc) {
+#ifdef CONFIG_CPM2
+		setbat(1, 0xf0000000, 0xf0000000, 1024*1024, _PAGE_IO);
+#endif
+		udbg_putc = udbg_putc_cpm;
+	}
+}
+#endif
diff --git a/arch/powerpc/sysdev/cpm_common.h b/arch/powerpc/sysdev/cpm_common.h
new file mode 100644
index 0000000..2b26c6f
--- /dev/null
+++ b/arch/powerpc/sysdev/cpm_common.h
@@ -0,0 +1,9 @@
+#ifndef _POWERPC_SYSDEV_CPM_COMMON_H
+#define _POWERPC_SYSDEV_CPM_COMMON_H
+
+#include <linux/types.h>
+
+/* Board code must define this address if the early console is used. */
+extern u32 __iomem *cpm_udbg_txdesc;
+
+#endif
diff --git a/include/asm-powerpc/udbg.h b/include/asm-powerpc/udbg.h
index ce9d82f..a9e0b0e 100644
--- a/include/asm-powerpc/udbg.h
+++ b/include/asm-powerpc/udbg.h
@@ -48,6 +48,7 @@ extern void __init udbg_init_rtas_console(void);
 extern void __init udbg_init_debug_beat(void);
 extern void __init udbg_init_btext(void);
 extern void __init udbg_init_44x_as1(void);
+extern void __init udbg_init_cpm(void);
 
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_UDBG_H */
-- 
1.5.0.3

[PATCH 21/61] Minor whitespace (space->tab) fixup in irq.c.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/kernel/irq.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 2fc8786..cb1b6c0 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -272,7 +272,7 @@ void do_IRQ(struct pt_regs *regs)
 	struct thread_info *curtp, *irqtp;
 #endif
 
-        irq_enter();
+	irq_enter();
 
 #ifdef CONFIG_DEBUG_STACKOVERFLOW
 	/* Debugging check for stack overflow: is there less than 2KB free? */
@@ -321,7 +321,7 @@ void do_IRQ(struct pt_regs *regs)
 		/* That's not SMP safe ... but who cares ? */
 		ppc_spurious_interrupts++;
 
-        irq_exit();
+	irq_exit();
 	set_irq_regs(old_regs);
 
 #ifdef CONFIG_PPC_ISERIES
-- 
1.5.0.3

[PATCH 22/61] Rename mpc82xx_ads to mpc8272ads.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/platforms/82xx/Kconfig       |    6 +-
 arch/powerpc/platforms/82xx/Makefile      |    2 +-
 arch/powerpc/platforms/82xx/mpc8272ads.c  |  640 +++++++++++++++++++++++++++++
 arch/powerpc/platforms/82xx/mpc82xx_ads.c |  640 -----------------------------
 4 files changed, 644 insertions(+), 644 deletions(-)
 create mode 100644 arch/powerpc/platforms/82xx/mpc8272ads.c
 delete mode 100644 arch/powerpc/platforms/82xx/mpc82xx_ads.c

diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 89fde43..b4af8c2 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,10 +1,10 @@
 choice
 	prompt "82xx Board Type"
 	depends on PPC_82xx
-	default MPC82xx_ADS
+	default MPC8272ADS
 
-config MPC82xx_ADS
-	bool "Freescale MPC82xx ADS"
+config MPC8272ADS
+	bool "Freescale MPC8272ADS"
 	select DEFAULT_UIMAGE
 	select PQ2ADS
 	select 8272
diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index d9fd4c8..881a3f6 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -2,4 +2,4 @@
 # Makefile for the PowerPC 82xx linux kernel.
 #
 obj-$(CONFIG_PPC_82xx) += mpc82xx.o
-obj-$(CONFIG_MPC82xx_ADS) += mpc82xx_ads.o
+obj-$(CONFIG_MPC8272ADS) += mpc8272ads.o
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
new file mode 100644
index 0000000..da20832
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -0,0 +1,640 @@
+/*
+ * MPC82xx_ads setup and early boot code plus other random bits.
+ *
+ * Author: Vitaly Bordug <vbordug@ru.mvista.com>
+ * m82xx_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
+ *
+ * Copyright (c) 2006 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/interrupt.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/initrd.h>
+#include <linux/module.h>
+#include <linux/fsl_devices.h>
+#include <linux/fs_uart_pd.h>
+
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/bootinfo.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpc8260.h>
+#include <asm/irq.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/cpm2.h>
+#include <asm/udbg.h>
+#include <asm/i8259.h>
+#include <linux/fs_enet_pd.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/cpm2_pic.h>
+
+#include "pq2ads.h"
+
+#ifdef CONFIG_PCI
+static uint pci_clk_frq;
+static struct {
+	unsigned long *pci_int_stat_reg;
+	unsigned long *pci_int_mask_reg;
+} pci_regs;
+
+static unsigned long pci_int_base;
+static struct irq_host *pci_pic_host;
+static struct device_node *pci_pic_node;
+#endif
+
+static void __init mpc82xx_ads_pic_init(void)
+{
+	struct device_node *np = of_find_compatible_node(NULL, "cpm-pic", "CPM2");
+	struct resource r;
+	cpm2_map_t *cpm_reg;
+
+	if (np == NULL) {
+		printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
+		return;
+	}
+	if (of_address_to_resource(np, 0, &r)) {
+		printk(KERN_ERR "PIC init: invalid resource\n");
+		of_node_put(np);
+		return;
+	}
+	cpm2_pic_init(np);
+	of_node_put(np);
+
+	/* Initialize the default interrupt mapping priorities,
+	 * in case the boot rom changed something on us.
+	 */
+	cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
+	cpm_reg->im_intctl.ic_siprr = 0x05309770;
+	iounmap(cpm_reg);
+#ifdef CONFIG_PCI
+	/* Initialize stuff for the 82xx CPLD IC and install demux  */
+	m82xx_pci_init_irq();
+#endif
+}
+
+static void init_fcc1_ioports(struct fs_platform_info *fpi)
+{
+	struct io_port *io;
+	u32 tempval;
+	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
+	struct device_node *np;
+	struct resource r;
+	u32 *bcsr;
+
+	np = of_find_node_by_type(NULL, "memory");
+	if (!np) {
+		printk(KERN_INFO "No memory node in device tree\n");
+		return;
+	}
+	if (of_address_to_resource(np, 1, &r)) {
+		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
+		return;
+	}
+	of_node_put(np);
+	bcsr = ioremap(r.start + 4, sizeof(u32));
+	io = &immap->im_ioport;
+
+	/* Enable the PHY */
+	clrbits32(bcsr, BCSR1_FETHIEN);
+	setbits32(bcsr, BCSR1_FETH_RST);
+
+	/* FCC1 pins are on port A/C. */
+	/* Configure port A and C pins for FCC1 Ethernet. */
+
+	tempval = in_be32(&io->iop_pdira);
+	tempval &= ~PA1_DIRA0;
+	tempval |= PA1_DIRA1;
+	out_be32(&io->iop_pdira, tempval);
+
+	tempval = in_be32(&io->iop_psora);
+	tempval &= ~PA1_PSORA0;
+	tempval |= PA1_PSORA1;
+	out_be32(&io->iop_psora, tempval);
+
+	setbits32(&io->iop_ppara, PA1_DIRA0 | PA1_DIRA1);
+
+	/* Alter clocks */
+	tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
+
+	clrbits32(&io->iop_psorc, tempval);
+	clrbits32(&io->iop_pdirc, tempval);
+	setbits32(&io->iop_pparc, tempval);
+
+	cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_rx, CPM_CLK_RX);
+	cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_tx, CPM_CLK_TX);
+
+	iounmap(bcsr);
+	iounmap(immap);
+}
+
+static void init_fcc2_ioports(struct fs_platform_info *fpi)
+{
+	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
+	struct device_node *np;
+	struct resource r;
+	u32 *bcsr;
+
+	struct io_port *io;
+	u32 tempval;
+
+	np = of_find_node_by_type(NULL, "memory");
+	if (!np) {
+		printk(KERN_INFO "No memory node in device tree\n");
+		return;
+	}
+	if (of_address_to_resource(np, 1, &r)) {
+		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
+		return;
+	}
+	of_node_put(np);
+	io = &immap->im_ioport;
+	bcsr = ioremap(r.start + 12, sizeof(u32));
+
+	/* Enable the PHY */
+	clrbits32(bcsr, BCSR3_FETHIEN2);
+	setbits32(bcsr, BCSR3_FETH2_RST);
+
+	/* FCC2 are port B/C. */
+	/* Configure port A and C pins for FCC2 Ethernet. */
+
+	tempval = in_be32(&io->iop_pdirb);
+	tempval &= ~PB2_DIRB0;
+	tempval |= PB2_DIRB1;
+	out_be32(&io->iop_pdirb, tempval);
+
+	tempval = in_be32(&io->iop_psorb);
+	tempval &= ~PB2_PSORB0;
+	tempval |= PB2_PSORB1;
+	out_be32(&io->iop_psorb, tempval);
+
+	setbits32(&io->iop_pparb, PB2_DIRB0 | PB2_DIRB1);
+
+	tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
+
+	/* Alter clocks */
+	clrbits32(&io->iop_psorc, tempval);
+	clrbits32(&io->iop_pdirc, tempval);
+	setbits32(&io->iop_pparc, tempval);
+
+	cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_rx, CPM_CLK_RX);
+	cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_tx, CPM_CLK_TX);
+
+	iounmap(bcsr);
+	iounmap(immap);
+}
+
+void init_fcc_ioports(struct fs_platform_info *fpi)
+{
+	int fcc_no = fs_get_fcc_index(fpi->fs_no);
+
+	switch (fcc_no) {
+	case 0:
+		init_fcc1_ioports(fpi);
+		break;
+	case 1:
+		init_fcc2_ioports(fpi);
+		break;
+	default:
+		printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
+		return;
+	}
+}
+
+static void init_scc1_uart_ioports(struct fs_uart_platform_info *data)
+{
+	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
+
+	/* SCC1 is only on port D */
+	setbits32(&immap->im_ioport.iop_ppard, 0x00000003);
+	clrbits32(&immap->im_ioport.iop_psord, 0x00000001);
+	setbits32(&immap->im_ioport.iop_psord, 0x00000002);
+	clrbits32(&immap->im_ioport.iop_pdird, 0x00000001);
+	setbits32(&immap->im_ioport.iop_pdird, 0x00000002);
+
+	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
+	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
+	setbits32(&immap->im_cpmux.cmx_scr,
+		  ((data->clk_tx - 1) << (4 - data->clk_tx)));
+	setbits32(&immap->im_cpmux.cmx_scr,
+		  ((data->clk_rx - 1) << (4 - data->clk_rx)));
+
+	iounmap(immap);
+}
+
+static void init_scc4_uart_ioports(struct fs_uart_platform_info *data)
+{
+	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
+
+	setbits32(&immap->im_ioport.iop_ppard, 0x00000600);
+	clrbits32(&immap->im_ioport.iop_psord, 0x00000600);
+	clrbits32(&immap->im_ioport.iop_pdird, 0x00000200);
+	setbits32(&immap->im_ioport.iop_pdird, 0x00000400);
+
+	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
+	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
+	setbits32(&immap->im_cpmux.cmx_scr,
+		  ((data->clk_tx - 1) << (4 - data->clk_tx)));
+	setbits32(&immap->im_cpmux.cmx_scr,
+		  ((data->clk_rx - 1) << (4 - data->clk_rx)));
+
+	iounmap(immap);
+}
+
+void init_scc_ioports(struct fs_uart_platform_info *data)
+{
+	int scc_no = fs_get_scc_index(data->fs_no);
+
+	switch (scc_no) {
+	case 0:
+		init_scc1_uart_ioports(data);
+		data->brg = data->clk_rx;
+		break;
+	case 3:
+		init_scc4_uart_ioports(data);
+		data->brg = data->clk_rx;
+		break;
+	default:
+		printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
+		return;
+	}
+}
+
+void __init m82xx_board_setup(void)
+{
+	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
+	struct device_node *np;
+	struct resource r;
+	u32 *bcsr;
+
+	np = of_find_node_by_type(NULL, "memory");
+	if (!np) {
+		printk(KERN_INFO "No memory node in device tree\n");
+		return;
+	}
+	if (of_address_to_resource(np, 1, &r)) {
+		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
+		return;
+	}
+	of_node_put(np);
+	bcsr = ioremap(r.start + 4, sizeof(u32));
+	/* Enable the 2nd UART port */
+	clrbits32(bcsr, BCSR1_RS232_EN2);
+
+#ifdef CONFIG_SERIAL_CPM_SCC1
+	clrbits32((u32 *) & immap->im_scc[0].scc_sccm,
+		  UART_SCCM_TX | UART_SCCM_RX);
+	clrbits32((u32 *) & immap->im_scc[0].scc_gsmrl,
+		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC2
+	clrbits32((u32 *) & immap->im_scc[1].scc_sccm,
+		  UART_SCCM_TX | UART_SCCM_RX);
+	clrbits32((u32 *) & immap->im_scc[1].scc_gsmrl,
+		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC3
+	clrbits32((u32 *) & immap->im_scc[2].scc_sccm,
+		  UART_SCCM_TX | UART_SCCM_RX);
+	clrbits32((u32 *) & immap->im_scc[2].scc_gsmrl,
+		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC4
+	clrbits32((u32 *) & immap->im_scc[3].scc_sccm,
+		  UART_SCCM_TX | UART_SCCM_RX);
+	clrbits32((u32 *) & immap->im_scc[3].scc_gsmrl,
+		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+	iounmap(bcsr);
+	iounmap(immap);
+}
+
+#ifdef CONFIG_PCI
+static void m82xx_pci_mask_irq(unsigned int irq)
+{
+	int bit = irq - pci_int_base;
+
+	*pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
+	return;
+}
+
+static void m82xx_pci_unmask_irq(unsigned int irq)
+{
+	int bit = irq - pci_int_base;
+
+	*pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
+	return;
+}
+
+static void m82xx_pci_mask_and_ack(unsigned int irq)
+{
+	int bit = irq - pci_int_base;
+
+	*pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
+	return;
+}
+
+static void m82xx_pci_end_irq(unsigned int irq)
+{
+	int bit = irq - pci_int_base;
+
+	*pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
+	return;
+}
+
+struct hw_interrupt_type m82xx_pci_ic = {
+	.typename = "MPC82xx ADS PCI",
+	.name = "MPC82xx ADS PCI",
+	.enable = m82xx_pci_unmask_irq,
+	.disable = m82xx_pci_mask_irq,
+	.ack = m82xx_pci_mask_and_ack,
+	.end = m82xx_pci_end_irq,
+	.mask = m82xx_pci_mask_irq,
+	.mask_ack = m82xx_pci_mask_and_ack,
+	.unmask = m82xx_pci_unmask_irq,
+	.eoi = m82xx_pci_end_irq,
+};
+
+static void
+m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
+{
+	unsigned long stat, mask, pend;
+	int bit;
+
+	for (;;) {
+		stat = *pci_regs.pci_int_stat_reg;
+		mask = *pci_regs.pci_int_mask_reg;
+		pend = stat & ~mask & 0xf0000000;
+		if (!pend)
+			break;
+		for (bit = 0; pend != 0; ++bit, pend <<= 1) {
+			if (pend & 0x80000000)
+				__do_IRQ(pci_int_base + bit);
+		}
+	}
+}
+
+static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
+{
+	return node == pci_pic_node;
+}
+
+static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
+			    irq_hw_number_t hw)
+{
+	get_irq_desc(virq)->status |= IRQ_LEVEL;
+	set_irq_chip(virq, &m82xx_pci_ic);
+	return 0;
+}
+
+static void pci_host_unmap(struct irq_host *h, unsigned int virq)
+{
+	/* remove chip and handler */
+	set_irq_chip(virq, NULL);
+}
+
+static struct irq_host_ops pci_pic_host_ops = {
+	.match = pci_pic_host_match,
+	.map = pci_pic_host_map,
+	.unmap = pci_host_unmap,
+};
+
+void m82xx_pci_init_irq(void)
+{
+	int irq;
+	cpm2_map_t *immap;
+	struct device_node *np;
+	struct resource r;
+	const u32 *regs;
+	unsigned int size;
+	const u32 *irq_map;
+	int i;
+	unsigned int irq_max, irq_min;
+
+	if ((np = of_find_node_by_type(NULL, "soc")) == NULL) {
+		printk(KERN_INFO "No SOC node in device tree\n");
+		return;
+	}
+	memset(&r, 0, sizeof(r));
+	if (of_address_to_resource(np, 0, &r)) {
+		printk(KERN_INFO "No SOC reg property in device tree\n");
+		return;
+	}
+	immap = ioremap(r.start, sizeof(*immap));
+	of_node_put(np);
+
+	/* install the demultiplexer for the PCI cascade interrupt */
+	np = of_find_node_by_type(NULL, "pci");
+	if (!np) {
+		printk(KERN_INFO "No pci node on device tree\n");
+		iounmap(immap);
+		return;
+	}
+	irq_map = of_get_property(np, "interrupt-map", &size);
+	if ((!irq_map) || (size <= 7)) {
+		printk(KERN_INFO "No interrupt-map property of pci node\n");
+		iounmap(immap);
+		return;
+	}
+	size /= sizeof(irq_map[0]);
+	for (i = 0, irq_max = 0, irq_min = 512; i < size; i += 7, irq_map += 7) {
+		if (irq_map[5] < irq_min)
+			irq_min = irq_map[5];
+		if (irq_map[5] > irq_max)
+			irq_max = irq_map[5];
+	}
+	pci_int_base = irq_min;
+	irq = irq_of_parse_and_map(np, 0);
+	set_irq_chained_handler(irq, m82xx_pci_irq_demux);
+	of_node_put(np);
+	np = of_find_node_by_type(NULL, "pci-pic");
+	if (!np) {
+		printk(KERN_INFO "No pci pic node on device tree\n");
+		iounmap(immap);
+		return;
+	}
+	pci_pic_node = of_node_get(np);
+	/* PCI interrupt controller registers: status and mask */
+	regs = of_get_property(np, "reg", &size);
+	if ((!regs) || (size <= 2)) {
+		printk(KERN_INFO "No reg property in pci pic node\n");
+		iounmap(immap);
+		return;
+	}
+	pci_regs.pci_int_stat_reg =
+	    ioremap(regs[0], sizeof(*pci_regs.pci_int_stat_reg));
+	pci_regs.pci_int_mask_reg =
+	    ioremap(regs[1], sizeof(*pci_regs.pci_int_mask_reg));
+	of_node_put(np);
+	/* configure chip select for PCI interrupt controller */
+	immap->im_memctl.memc_br3 = regs[0] | 0x00001801;
+	immap->im_memctl.memc_or3 = 0xffff8010;
+	/* make PCI IRQ level sensitive */
+	immap->im_intctl.ic_siexr &= ~(1 << (14 - (irq - SIU_INT_IRQ1)));
+
+	/* mask all PCI interrupts */
+	*pci_regs.pci_int_mask_reg |= 0xfff00000;
+	iounmap(immap);
+	pci_pic_host =
+	    irq_alloc_host(IRQ_HOST_MAP_LINEAR, irq_max - irq_min + 1,
+			   &pci_pic_host_ops, irq_max + 1);
+	return;
+}
+
+static int m82xx_pci_exclude_device(struct pci_controller *hose,
+				    u_char bus, u_char devfn)
+{
+	if (bus == 0 && PCI_SLOT(devfn) == 0)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	else
+		return PCIBIOS_SUCCESSFUL;
+}
+
+static void __init mpc82xx_add_bridge(struct device_node *np)
+{
+	int len;
+	struct pci_controller *hose;
+	struct resource r;
+	const int *bus_range;
+	const uint *ptr;
+
+	memset(&r, 0, sizeof(r));
+	if (of_address_to_resource(np, 0, &r)) {
+		printk(KERN_INFO "No PCI reg property in device tree\n");
+		return;
+	}
+	if (!(ptr = of_get_property(np, "clock-frequency", NULL))) {
+		printk(KERN_INFO "No clock-frequency property in PCI node");
+		return;
+	}
+	pci_clk_frq = *ptr;
+	of_node_put(np);
+	bus_range = of_get_property(np, "bus-range", &len);
+	if (bus_range == NULL || len < 2 * sizeof(int)) {
+		printk(KERN_WARNING "Can't get bus-range for %s, assume"
+		       " bus 0\n", np->full_name);
+	}
+
+	pci_assign_all_buses = 1;
+
+	hose = pcibios_alloc_controller(np);
+
+	if (!hose)
+		return;
+
+	hose->first_busno = bus_range ? bus_range[0] : 0;
+	hose->last_busno = bus_range ? bus_range[1] : 0xff;
+
+	setup_indirect_pci(hose,
+			   r.start + offsetof(pci_cpm2_t, pci_cfg_addr),
+			   r.start + offsetof(pci_cpm2_t, pci_cfg_data));
+
+	pci_process_bridge_OF_ranges(hose, np, 1);
+}
+#endif
+
+/*
+ * Setup the architecture
+ */
+static void __init mpc82xx_ads_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+	struct device_node *np;
+#endif
+
+	if (ppc_md.progress)
+		ppc_md.progress("mpc82xx_ads_setup_arch()", 0);
+	cpm2_reset();
+
+	/* Map I/O region to a 256MB BAT */
+
+	m82xx_board_setup();
+
+#ifdef CONFIG_PCI
+	ppc_md.pci_exclude_device = m82xx_pci_exclude_device;
+	for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
+		mpc82xx_add_bridge(np);
+
+	of_node_put(np);
+#endif
+
+#ifdef  CONFIG_ROOT_NFS
+	ROOT_DEV = Root_NFS;
+#else
+	ROOT_DEV = Root_HDA1;
+#endif
+
+	if (ppc_md.progress)
+		ppc_md.progress("mpc82xx_ads_setup_arch(), finish", 0);
+}
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init mpc82xx_ads_probe(void)
+{
+	/* We always match for now, eventually we should look at
+	 * the flat dev tree to ensure this is the board we are
+	 * supposed to run on
+	 */
+	return 1;
+}
+
+#define RMR_CSRE 0x00000001
+static void m82xx_restart(char *cmd)
+{
+	__volatile__ unsigned char dummy;
+
+	local_irq_disable();
+	((cpm2_map_t *) cpm2_immr)->im_clkrst.car_rmr |= RMR_CSRE;
+
+	/* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
+	mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
+	dummy = ((cpm2_map_t *) cpm2_immr)->im_clkrst.res[0];
+	printk("Restart failed\n");
+	while (1) ;
+}
+
+static void m82xx_halt(void)
+{
+	local_irq_disable();
+	while (1) ;
+}
+
+define_machine(mpc82xx_ads)
+{
+	.name = "MPC82xx ADS",
+	.probe = mpc82xx_ads_probe,
+	.setup_arch =    mpc82xx_ads_setup_arch,
+	.init_IRQ =    mpc82xx_ads_pic_init,
+	.show_cpuinfo =    mpc82xx_ads_show_cpuinfo,
+	.get_irq =    cpm2_get_irq,
+	.calibrate_decr =    m82xx_calibrate_decr,
+	.restart = m82xx_restart,.halt = m82xx_halt,
+};
diff --git a/arch/powerpc/platforms/82xx/mpc82xx_ads.c b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
deleted file mode 100644
index da20832..0000000
--- a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
+++ /dev/null
@@ -1,640 +0,0 @@
-/*
- * MPC82xx_ads setup and early boot code plus other random bits.
- *
- * Author: Vitaly Bordug <vbordug@ru.mvista.com>
- * m82xx_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
- *
- * Copyright (c) 2006 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
-#include <linux/fsl_devices.h>
-#include <linux/fs_uart_pd.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc8260.h>
-#include <asm/irq.h>
-#include <mm/mmu_decl.h>
-#include <asm/prom.h>
-#include <asm/cpm2.h>
-#include <asm/udbg.h>
-#include <asm/i8259.h>
-#include <linux/fs_enet_pd.h>
-
-#include <sysdev/fsl_soc.h>
-#include <sysdev/cpm2_pic.h>
-
-#include "pq2ads.h"
-
-#ifdef CONFIG_PCI
-static uint pci_clk_frq;
-static struct {
-	unsigned long *pci_int_stat_reg;
-	unsigned long *pci_int_mask_reg;
-} pci_regs;
-
-static unsigned long pci_int_base;
-static struct irq_host *pci_pic_host;
-static struct device_node *pci_pic_node;
-#endif
-
-static void __init mpc82xx_ads_pic_init(void)
-{
-	struct device_node *np = of_find_compatible_node(NULL, "cpm-pic", "CPM2");
-	struct resource r;
-	cpm2_map_t *cpm_reg;
-
-	if (np == NULL) {
-		printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
-		return;
-	}
-	if (of_address_to_resource(np, 0, &r)) {
-		printk(KERN_ERR "PIC init: invalid resource\n");
-		of_node_put(np);
-		return;
-	}
-	cpm2_pic_init(np);
-	of_node_put(np);
-
-	/* Initialize the default interrupt mapping priorities,
-	 * in case the boot rom changed something on us.
-	 */
-	cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
-	cpm_reg->im_intctl.ic_siprr = 0x05309770;
-	iounmap(cpm_reg);
-#ifdef CONFIG_PCI
-	/* Initialize stuff for the 82xx CPLD IC and install demux  */
-	m82xx_pci_init_irq();
-#endif
-}
-
-static void init_fcc1_ioports(struct fs_platform_info *fpi)
-{
-	struct io_port *io;
-	u32 tempval;
-	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-	struct device_node *np;
-	struct resource r;
-	u32 *bcsr;
-
-	np = of_find_node_by_type(NULL, "memory");
-	if (!np) {
-		printk(KERN_INFO "No memory node in device tree\n");
-		return;
-	}
-	if (of_address_to_resource(np, 1, &r)) {
-		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
-		return;
-	}
-	of_node_put(np);
-	bcsr = ioremap(r.start + 4, sizeof(u32));
-	io = &immap->im_ioport;
-
-	/* Enable the PHY */
-	clrbits32(bcsr, BCSR1_FETHIEN);
-	setbits32(bcsr, BCSR1_FETH_RST);
-
-	/* FCC1 pins are on port A/C. */
-	/* Configure port A and C pins for FCC1 Ethernet. */
-
-	tempval = in_be32(&io->iop_pdira);
-	tempval &= ~PA1_DIRA0;
-	tempval |= PA1_DIRA1;
-	out_be32(&io->iop_pdira, tempval);
-
-	tempval = in_be32(&io->iop_psora);
-	tempval &= ~PA1_PSORA0;
-	tempval |= PA1_PSORA1;
-	out_be32(&io->iop_psora, tempval);
-
-	setbits32(&io->iop_ppara, PA1_DIRA0 | PA1_DIRA1);
-
-	/* Alter clocks */
-	tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
-
-	clrbits32(&io->iop_psorc, tempval);
-	clrbits32(&io->iop_pdirc, tempval);
-	setbits32(&io->iop_pparc, tempval);
-
-	cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_rx, CPM_CLK_RX);
-	cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_tx, CPM_CLK_TX);
-
-	iounmap(bcsr);
-	iounmap(immap);
-}
-
-static void init_fcc2_ioports(struct fs_platform_info *fpi)
-{
-	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-	struct device_node *np;
-	struct resource r;
-	u32 *bcsr;
-
-	struct io_port *io;
-	u32 tempval;
-
-	np = of_find_node_by_type(NULL, "memory");
-	if (!np) {
-		printk(KERN_INFO "No memory node in device tree\n");
-		return;
-	}
-	if (of_address_to_resource(np, 1, &r)) {
-		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
-		return;
-	}
-	of_node_put(np);
-	io = &immap->im_ioport;
-	bcsr = ioremap(r.start + 12, sizeof(u32));
-
-	/* Enable the PHY */
-	clrbits32(bcsr, BCSR3_FETHIEN2);
-	setbits32(bcsr, BCSR3_FETH2_RST);
-
-	/* FCC2 are port B/C. */
-	/* Configure port A and C pins for FCC2 Ethernet. */
-
-	tempval = in_be32(&io->iop_pdirb);
-	tempval &= ~PB2_DIRB0;
-	tempval |= PB2_DIRB1;
-	out_be32(&io->iop_pdirb, tempval);
-
-	tempval = in_be32(&io->iop_psorb);
-	tempval &= ~PB2_PSORB0;
-	tempval |= PB2_PSORB1;
-	out_be32(&io->iop_psorb, tempval);
-
-	setbits32(&io->iop_pparb, PB2_DIRB0 | PB2_DIRB1);
-
-	tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
-
-	/* Alter clocks */
-	clrbits32(&io->iop_psorc, tempval);
-	clrbits32(&io->iop_pdirc, tempval);
-	setbits32(&io->iop_pparc, tempval);
-
-	cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_rx, CPM_CLK_RX);
-	cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_tx, CPM_CLK_TX);
-
-	iounmap(bcsr);
-	iounmap(immap);
-}
-
-void init_fcc_ioports(struct fs_platform_info *fpi)
-{
-	int fcc_no = fs_get_fcc_index(fpi->fs_no);
-
-	switch (fcc_no) {
-	case 0:
-		init_fcc1_ioports(fpi);
-		break;
-	case 1:
-		init_fcc2_ioports(fpi);
-		break;
-	default:
-		printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
-		return;
-	}
-}
-
-static void init_scc1_uart_ioports(struct fs_uart_platform_info *data)
-{
-	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-
-	/* SCC1 is only on port D */
-	setbits32(&immap->im_ioport.iop_ppard, 0x00000003);
-	clrbits32(&immap->im_ioport.iop_psord, 0x00000001);
-	setbits32(&immap->im_ioport.iop_psord, 0x00000002);
-	clrbits32(&immap->im_ioport.iop_pdird, 0x00000001);
-	setbits32(&immap->im_ioport.iop_pdird, 0x00000002);
-
-	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
-	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
-	setbits32(&immap->im_cpmux.cmx_scr,
-		  ((data->clk_tx - 1) << (4 - data->clk_tx)));
-	setbits32(&immap->im_cpmux.cmx_scr,
-		  ((data->clk_rx - 1) << (4 - data->clk_rx)));
-
-	iounmap(immap);
-}
-
-static void init_scc4_uart_ioports(struct fs_uart_platform_info *data)
-{
-	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-
-	setbits32(&immap->im_ioport.iop_ppard, 0x00000600);
-	clrbits32(&immap->im_ioport.iop_psord, 0x00000600);
-	clrbits32(&immap->im_ioport.iop_pdird, 0x00000200);
-	setbits32(&immap->im_ioport.iop_pdird, 0x00000400);
-
-	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
-	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
-	setbits32(&immap->im_cpmux.cmx_scr,
-		  ((data->clk_tx - 1) << (4 - data->clk_tx)));
-	setbits32(&immap->im_cpmux.cmx_scr,
-		  ((data->clk_rx - 1) << (4 - data->clk_rx)));
-
-	iounmap(immap);
-}
-
-void init_scc_ioports(struct fs_uart_platform_info *data)
-{
-	int scc_no = fs_get_scc_index(data->fs_no);
-
-	switch (scc_no) {
-	case 0:
-		init_scc1_uart_ioports(data);
-		data->brg = data->clk_rx;
-		break;
-	case 3:
-		init_scc4_uart_ioports(data);
-		data->brg = data->clk_rx;
-		break;
-	default:
-		printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
-		return;
-	}
-}
-
-void __init m82xx_board_setup(void)
-{
-	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-	struct device_node *np;
-	struct resource r;
-	u32 *bcsr;
-
-	np = of_find_node_by_type(NULL, "memory");
-	if (!np) {
-		printk(KERN_INFO "No memory node in device tree\n");
-		return;
-	}
-	if (of_address_to_resource(np, 1, &r)) {
-		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
-		return;
-	}
-	of_node_put(np);
-	bcsr = ioremap(r.start + 4, sizeof(u32));
-	/* Enable the 2nd UART port */
-	clrbits32(bcsr, BCSR1_RS232_EN2);
-
-#ifdef CONFIG_SERIAL_CPM_SCC1
-	clrbits32((u32 *) & immap->im_scc[0].scc_sccm,
-		  UART_SCCM_TX | UART_SCCM_RX);
-	clrbits32((u32 *) & immap->im_scc[0].scc_gsmrl,
-		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC2
-	clrbits32((u32 *) & immap->im_scc[1].scc_sccm,
-		  UART_SCCM_TX | UART_SCCM_RX);
-	clrbits32((u32 *) & immap->im_scc[1].scc_gsmrl,
-		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC3
-	clrbits32((u32 *) & immap->im_scc[2].scc_sccm,
-		  UART_SCCM_TX | UART_SCCM_RX);
-	clrbits32((u32 *) & immap->im_scc[2].scc_gsmrl,
-		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC4
-	clrbits32((u32 *) & immap->im_scc[3].scc_sccm,
-		  UART_SCCM_TX | UART_SCCM_RX);
-	clrbits32((u32 *) & immap->im_scc[3].scc_gsmrl,
-		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-	iounmap(bcsr);
-	iounmap(immap);
-}
-
-#ifdef CONFIG_PCI
-static void m82xx_pci_mask_irq(unsigned int irq)
-{
-	int bit = irq - pci_int_base;
-
-	*pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
-	return;
-}
-
-static void m82xx_pci_unmask_irq(unsigned int irq)
-{
-	int bit = irq - pci_int_base;
-
-	*pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
-	return;
-}
-
-static void m82xx_pci_mask_and_ack(unsigned int irq)
-{
-	int bit = irq - pci_int_base;
-
-	*pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
-	return;
-}
-
-static void m82xx_pci_end_irq(unsigned int irq)
-{
-	int bit = irq - pci_int_base;
-
-	*pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
-	return;
-}
-
-struct hw_interrupt_type m82xx_pci_ic = {
-	.typename = "MPC82xx ADS PCI",
-	.name = "MPC82xx ADS PCI",
-	.enable = m82xx_pci_unmask_irq,
-	.disable = m82xx_pci_mask_irq,
-	.ack = m82xx_pci_mask_and_ack,
-	.end = m82xx_pci_end_irq,
-	.mask = m82xx_pci_mask_irq,
-	.mask_ack = m82xx_pci_mask_and_ack,
-	.unmask = m82xx_pci_unmask_irq,
-	.eoi = m82xx_pci_end_irq,
-};
-
-static void
-m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
-{
-	unsigned long stat, mask, pend;
-	int bit;
-
-	for (;;) {
-		stat = *pci_regs.pci_int_stat_reg;
-		mask = *pci_regs.pci_int_mask_reg;
-		pend = stat & ~mask & 0xf0000000;
-		if (!pend)
-			break;
-		for (bit = 0; pend != 0; ++bit, pend <<= 1) {
-			if (pend & 0x80000000)
-				__do_IRQ(pci_int_base + bit);
-		}
-	}
-}
-
-static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
-{
-	return node == pci_pic_node;
-}
-
-static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
-			    irq_hw_number_t hw)
-{
-	get_irq_desc(virq)->status |= IRQ_LEVEL;
-	set_irq_chip(virq, &m82xx_pci_ic);
-	return 0;
-}
-
-static void pci_host_unmap(struct irq_host *h, unsigned int virq)
-{
-	/* remove chip and handler */
-	set_irq_chip(virq, NULL);
-}
-
-static struct irq_host_ops pci_pic_host_ops = {
-	.match = pci_pic_host_match,
-	.map = pci_pic_host_map,
-	.unmap = pci_host_unmap,
-};
-
-void m82xx_pci_init_irq(void)
-{
-	int irq;
-	cpm2_map_t *immap;
-	struct device_node *np;
-	struct resource r;
-	const u32 *regs;
-	unsigned int size;
-	const u32 *irq_map;
-	int i;
-	unsigned int irq_max, irq_min;
-
-	if ((np = of_find_node_by_type(NULL, "soc")) == NULL) {
-		printk(KERN_INFO "No SOC node in device tree\n");
-		return;
-	}
-	memset(&r, 0, sizeof(r));
-	if (of_address_to_resource(np, 0, &r)) {
-		printk(KERN_INFO "No SOC reg property in device tree\n");
-		return;
-	}
-	immap = ioremap(r.start, sizeof(*immap));
-	of_node_put(np);
-
-	/* install the demultiplexer for the PCI cascade interrupt */
-	np = of_find_node_by_type(NULL, "pci");
-	if (!np) {
-		printk(KERN_INFO "No pci node on device tree\n");
-		iounmap(immap);
-		return;
-	}
-	irq_map = of_get_property(np, "interrupt-map", &size);
-	if ((!irq_map) || (size <= 7)) {
-		printk(KERN_INFO "No interrupt-map property of pci node\n");
-		iounmap(immap);
-		return;
-	}
-	size /= sizeof(irq_map[0]);
-	for (i = 0, irq_max = 0, irq_min = 512; i < size; i += 7, irq_map += 7) {
-		if (irq_map[5] < irq_min)
-			irq_min = irq_map[5];
-		if (irq_map[5] > irq_max)
-			irq_max = irq_map[5];
-	}
-	pci_int_base = irq_min;
-	irq = irq_of_parse_and_map(np, 0);
-	set_irq_chained_handler(irq, m82xx_pci_irq_demux);
-	of_node_put(np);
-	np = of_find_node_by_type(NULL, "pci-pic");
-	if (!np) {
-		printk(KERN_INFO "No pci pic node on device tree\n");
-		iounmap(immap);
-		return;
-	}
-	pci_pic_node = of_node_get(np);
-	/* PCI interrupt controller registers: status and mask */
-	regs = of_get_property(np, "reg", &size);
-	if ((!regs) || (size <= 2)) {
-		printk(KERN_INFO "No reg property in pci pic node\n");
-		iounmap(immap);
-		return;
-	}
-	pci_regs.pci_int_stat_reg =
-	    ioremap(regs[0], sizeof(*pci_regs.pci_int_stat_reg));
-	pci_regs.pci_int_mask_reg =
-	    ioremap(regs[1], sizeof(*pci_regs.pci_int_mask_reg));
-	of_node_put(np);
-	/* configure chip select for PCI interrupt controller */
-	immap->im_memctl.memc_br3 = regs[0] | 0x00001801;
-	immap->im_memctl.memc_or3 = 0xffff8010;
-	/* make PCI IRQ level sensitive */
-	immap->im_intctl.ic_siexr &= ~(1 << (14 - (irq - SIU_INT_IRQ1)));
-
-	/* mask all PCI interrupts */
-	*pci_regs.pci_int_mask_reg |= 0xfff00000;
-	iounmap(immap);
-	pci_pic_host =
-	    irq_alloc_host(IRQ_HOST_MAP_LINEAR, irq_max - irq_min + 1,
-			   &pci_pic_host_ops, irq_max + 1);
-	return;
-}
-
-static int m82xx_pci_exclude_device(struct pci_controller *hose,
-				    u_char bus, u_char devfn)
-{
-	if (bus == 0 && PCI_SLOT(devfn) == 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	else
-		return PCIBIOS_SUCCESSFUL;
-}
-
-static void __init mpc82xx_add_bridge(struct device_node *np)
-{
-	int len;
-	struct pci_controller *hose;
-	struct resource r;
-	const int *bus_range;
-	const uint *ptr;
-
-	memset(&r, 0, sizeof(r));
-	if (of_address_to_resource(np, 0, &r)) {
-		printk(KERN_INFO "No PCI reg property in device tree\n");
-		return;
-	}
-	if (!(ptr = of_get_property(np, "clock-frequency", NULL))) {
-		printk(KERN_INFO "No clock-frequency property in PCI node");
-		return;
-	}
-	pci_clk_frq = *ptr;
-	of_node_put(np);
-	bus_range = of_get_property(np, "bus-range", &len);
-	if (bus_range == NULL || len < 2 * sizeof(int)) {
-		printk(KERN_WARNING "Can't get bus-range for %s, assume"
-		       " bus 0\n", np->full_name);
-	}
-
-	pci_assign_all_buses = 1;
-
-	hose = pcibios_alloc_controller(np);
-
-	if (!hose)
-		return;
-
-	hose->first_busno = bus_range ? bus_range[0] : 0;
-	hose->last_busno = bus_range ? bus_range[1] : 0xff;
-
-	setup_indirect_pci(hose,
-			   r.start + offsetof(pci_cpm2_t, pci_cfg_addr),
-			   r.start + offsetof(pci_cpm2_t, pci_cfg_data));
-
-	pci_process_bridge_OF_ranges(hose, np, 1);
-}
-#endif
-
-/*
- * Setup the architecture
- */
-static void __init mpc82xx_ads_setup_arch(void)
-{
-#ifdef CONFIG_PCI
-	struct device_node *np;
-#endif
-
-	if (ppc_md.progress)
-		ppc_md.progress("mpc82xx_ads_setup_arch()", 0);
-	cpm2_reset();
-
-	/* Map I/O region to a 256MB BAT */
-
-	m82xx_board_setup();
-
-#ifdef CONFIG_PCI
-	ppc_md.pci_exclude_device = m82xx_pci_exclude_device;
-	for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
-		mpc82xx_add_bridge(np);
-
-	of_node_put(np);
-#endif
-
-#ifdef  CONFIG_ROOT_NFS
-	ROOT_DEV = Root_NFS;
-#else
-	ROOT_DEV = Root_HDA1;
-#endif
-
-	if (ppc_md.progress)
-		ppc_md.progress("mpc82xx_ads_setup_arch(), finish", 0);
-}
-
-/*
- * Called very early, device-tree isn't unflattened
- */
-static int __init mpc82xx_ads_probe(void)
-{
-	/* We always match for now, eventually we should look at
-	 * the flat dev tree to ensure this is the board we are
-	 * supposed to run on
-	 */
-	return 1;
-}
-
-#define RMR_CSRE 0x00000001
-static void m82xx_restart(char *cmd)
-{
-	__volatile__ unsigned char dummy;
-
-	local_irq_disable();
-	((cpm2_map_t *) cpm2_immr)->im_clkrst.car_rmr |= RMR_CSRE;
-
-	/* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
-	mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
-	dummy = ((cpm2_map_t *) cpm2_immr)->im_clkrst.res[0];
-	printk("Restart failed\n");
-	while (1) ;
-}
-
-static void m82xx_halt(void)
-{
-	local_irq_disable();
-	while (1) ;
-}
-
-define_machine(mpc82xx_ads)
-{
-	.name = "MPC82xx ADS",
-	.probe = mpc82xx_ads_probe,
-	.setup_arch =    mpc82xx_ads_setup_arch,
-	.init_IRQ =    mpc82xx_ads_pic_init,
-	.show_cpuinfo =    mpc82xx_ads_show_cpuinfo,
-	.get_irq =    cpm2_get_irq,
-	.calibrate_decr =    m82xx_calibrate_decr,
-	.restart = m82xx_restart,.halt = m82xx_halt,
-};
-- 
1.5.0.3

Re: [PATCH 22/61] Rename mpc82xx_ads to mpc8272ads.

[Mark Zhan]

Scott,

It seems the old name "mpc82xx ads" is still used in your code.
It will be nice that your file name match your code name, you know, less
confusion.

Thanks
Mark Zhan
On Tue, 2007-07-17 at 20:35 -0500, Scott Wood wrote:
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
>  arch/powerpc/platforms/82xx/Kconfig       |    6 +-
>  arch/powerpc/platforms/82xx/Makefile      |    2 +-
>  arch/powerpc/platforms/82xx/mpc8272ads.c  |  640 +++++++++++++++++++++++++++++
>  arch/powerpc/platforms/82xx/mpc82xx_ads.c |  640 -----------------------------
>  4 files changed, 644 insertions(+), 644 deletions(-)
>  create mode 100644 arch/powerpc/platforms/82xx/mpc8272ads.c
>  delete mode 100644 arch/powerpc/platforms/82xx/mpc82xx_ads.c
> 
> diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
> index 89fde43..b4af8c2 100644
> --- a/arch/powerpc/platforms/82xx/Kconfig
> +++ b/arch/powerpc/platforms/82xx/Kconfig
> @@ -1,10 +1,10 @@
>  choice
>  	prompt "82xx Board Type"
>  	depends on PPC_82xx
> -	default MPC82xx_ADS
> +	default MPC8272ADS
>  
> -config MPC82xx_ADS
> -	bool "Freescale MPC82xx ADS"
> +config MPC8272ADS
> +	bool "Freescale MPC8272ADS"
>  	select DEFAULT_UIMAGE
>  	select PQ2ADS
>  	select 8272
> diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
> index d9fd4c8..881a3f6 100644
> --- a/arch/powerpc/platforms/82xx/Makefile
> +++ b/arch/powerpc/platforms/82xx/Makefile
> @@ -2,4 +2,4 @@
>  # Makefile for the PowerPC 82xx linux kernel.
>  #
>  obj-$(CONFIG_PPC_82xx) += mpc82xx.o
> -obj-$(CONFIG_MPC82xx_ADS) += mpc82xx_ads.o
> +obj-$(CONFIG_MPC8272ADS) += mpc8272ads.o
> diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
> new file mode 100644
> index 0000000..da20832
> --- /dev/null
> +++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
> @@ -0,0 +1,640 @@
> +/*
> + * MPC82xx_ads setup and early boot code plus other random bits.
> + *
> + * Author: Vitaly Bordug <vbordug@ru.mvista.com>
> + * m82xx_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
> + *
> + * Copyright (c) 2006 MontaVista Software, Inc.
> + *
> + * This program is free software; you can redistribute  it and/or modify it
> + * under  the terms of  the GNU General  Public License as published by the
> + * Free Software Foundation;  either version 2 of the  License, or (at your
> + * option) any later version.
> + */
> +
> +#include <linux/stddef.h>
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/errno.h>
> +#include <linux/reboot.h>
> +#include <linux/pci.h>
> +#include <linux/interrupt.h>
> +#include <linux/kdev_t.h>
> +#include <linux/major.h>
> +#include <linux/console.h>
> +#include <linux/delay.h>
> +#include <linux/seq_file.h>
> +#include <linux/root_dev.h>
> +#include <linux/initrd.h>
> +#include <linux/module.h>
> +#include <linux/fsl_devices.h>
> +#include <linux/fs_uart_pd.h>
> +
> +#include <asm/system.h>
> +#include <asm/pgtable.h>
> +#include <asm/page.h>
> +#include <asm/atomic.h>
> +#include <asm/time.h>
> +#include <asm/io.h>
> +#include <asm/machdep.h>
> +#include <asm/bootinfo.h>
> +#include <asm/pci-bridge.h>
> +#include <asm/mpc8260.h>
> +#include <asm/irq.h>
> +#include <mm/mmu_decl.h>
> +#include <asm/prom.h>
> +#include <asm/cpm2.h>
> +#include <asm/udbg.h>
> +#include <asm/i8259.h>
> +#include <linux/fs_enet_pd.h>
> +
> +#include <sysdev/fsl_soc.h>
> +#include <sysdev/cpm2_pic.h>
> +
> +#include "pq2ads.h"
> +
> +#ifdef CONFIG_PCI
> +static uint pci_clk_frq;
> +static struct {
> +	unsigned long *pci_int_stat_reg;
> +	unsigned long *pci_int_mask_reg;
> +} pci_regs;
> +
> +static unsigned long pci_int_base;
> +static struct irq_host *pci_pic_host;
> +static struct device_node *pci_pic_node;
> +#endif
> +
> +static void __init mpc82xx_ads_pic_init(void)
> +{
> +	struct device_node *np = of_find_compatible_node(NULL, "cpm-pic", "CPM2");
> +	struct resource r;
> +	cpm2_map_t *cpm_reg;
> +
> +	if (np == NULL) {
> +		printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
> +		return;
> +	}
> +	if (of_address_to_resource(np, 0, &r)) {
> +		printk(KERN_ERR "PIC init: invalid resource\n");
> +		of_node_put(np);
> +		return;
> +	}
> +	cpm2_pic_init(np);
> +	of_node_put(np);
> +
> +	/* Initialize the default interrupt mapping priorities,
> +	 * in case the boot rom changed something on us.
> +	 */
> +	cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
> +	cpm_reg->im_intctl.ic_siprr = 0x05309770;
> +	iounmap(cpm_reg);
> +#ifdef CONFIG_PCI
> +	/* Initialize stuff for the 82xx CPLD IC and install demux  */
> +	m82xx_pci_init_irq();
> +#endif
> +}
> +
> +static void init_fcc1_ioports(struct fs_platform_info *fpi)
> +{
> +	struct io_port *io;
> +	u32 tempval;
> +	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
> +	struct device_node *np;
> +	struct resource r;
> +	u32 *bcsr;
> +
> +	np = of_find_node_by_type(NULL, "memory");
> +	if (!np) {
> +		printk(KERN_INFO "No memory node in device tree\n");
> +		return;
> +	}
> +	if (of_address_to_resource(np, 1, &r)) {
> +		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
> +		return;
> +	}
> +	of_node_put(np);
> +	bcsr = ioremap(r.start + 4, sizeof(u32));
> +	io = &immap->im_ioport;
> +
> +	/* Enable the PHY */
> +	clrbits32(bcsr, BCSR1_FETHIEN);
> +	setbits32(bcsr, BCSR1_FETH_RST);
> +
> +	/* FCC1 pins are on port A/C. */
> +	/* Configure port A and C pins for FCC1 Ethernet. */
> +
> +	tempval = in_be32(&io->iop_pdira);
> +	tempval &= ~PA1_DIRA0;
> +	tempval |= PA1_DIRA1;
> +	out_be32(&io->iop_pdira, tempval);
> +
> +	tempval = in_be32(&io->iop_psora);
> +	tempval &= ~PA1_PSORA0;
> +	tempval |= PA1_PSORA1;
> +	out_be32(&io->iop_psora, tempval);
> +
> +	setbits32(&io->iop_ppara, PA1_DIRA0 | PA1_DIRA1);
> +
> +	/* Alter clocks */
> +	tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
> +
> +	clrbits32(&io->iop_psorc, tempval);
> +	clrbits32(&io->iop_pdirc, tempval);
> +	setbits32(&io->iop_pparc, tempval);
> +
> +	cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_rx, CPM_CLK_RX);
> +	cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_tx, CPM_CLK_TX);
> +
> +	iounmap(bcsr);
> +	iounmap(immap);
> +}
> +
> +static void init_fcc2_ioports(struct fs_platform_info *fpi)
> +{
> +	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
> +	struct device_node *np;
> +	struct resource r;
> +	u32 *bcsr;
> +
> +	struct io_port *io;
> +	u32 tempval;
> +
> +	np = of_find_node_by_type(NULL, "memory");
> +	if (!np) {
> +		printk(KERN_INFO "No memory node in device tree\n");
> +		return;
> +	}
> +	if (of_address_to_resource(np, 1, &r)) {
> +		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
> +		return;
> +	}
> +	of_node_put(np);
> +	io = &immap->im_ioport;
> +	bcsr = ioremap(r.start + 12, sizeof(u32));
> +
> +	/* Enable the PHY */
> +	clrbits32(bcsr, BCSR3_FETHIEN2);
> +	setbits32(bcsr, BCSR3_FETH2_RST);
> +
> +	/* FCC2 are port B/C. */
> +	/* Configure port A and C pins for FCC2 Ethernet. */
> +
> +	tempval = in_be32(&io->iop_pdirb);
> +	tempval &= ~PB2_DIRB0;
> +	tempval |= PB2_DIRB1;
> +	out_be32(&io->iop_pdirb, tempval);
> +
> +	tempval = in_be32(&io->iop_psorb);
> +	tempval &= ~PB2_PSORB0;
> +	tempval |= PB2_PSORB1;
> +	out_be32(&io->iop_psorb, tempval);
> +
> +	setbits32(&io->iop_pparb, PB2_DIRB0 | PB2_DIRB1);
> +
> +	tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
> +
> +	/* Alter clocks */
> +	clrbits32(&io->iop_psorc, tempval);
> +	clrbits32(&io->iop_pdirc, tempval);
> +	setbits32(&io->iop_pparc, tempval);
> +
> +	cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_rx, CPM_CLK_RX);
> +	cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_tx, CPM_CLK_TX);
> +
> +	iounmap(bcsr);
> +	iounmap(immap);
> +}
> +
> +void init_fcc_ioports(struct fs_platform_info *fpi)
> +{
> +	int fcc_no = fs_get_fcc_index(fpi->fs_no);
> +
> +	switch (fcc_no) {
> +	case 0:
> +		init_fcc1_ioports(fpi);
> +		break;
> +	case 1:
> +		init_fcc2_ioports(fpi);
> +		break;
> +	default:
> +		printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
> +		return;
> +	}
> +}
> +
> +static void init_scc1_uart_ioports(struct fs_uart_platform_info *data)
> +{
> +	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
> +
> +	/* SCC1 is only on port D */
> +	setbits32(&immap->im_ioport.iop_ppard, 0x00000003);
> +	clrbits32(&immap->im_ioport.iop_psord, 0x00000001);
> +	setbits32(&immap->im_ioport.iop_psord, 0x00000002);
> +	clrbits32(&immap->im_ioport.iop_pdird, 0x00000001);
> +	setbits32(&immap->im_ioport.iop_pdird, 0x00000002);
> +
> +	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
> +	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
> +	setbits32(&immap->im_cpmux.cmx_scr,
> +		  ((data->clk_tx - 1) << (4 - data->clk_tx)));
> +	setbits32(&immap->im_cpmux.cmx_scr,
> +		  ((data->clk_rx - 1) << (4 - data->clk_rx)));
> +
> +	iounmap(immap);
> +}
> +
> +static void init_scc4_uart_ioports(struct fs_uart_platform_info *data)
> +{
> +	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
> +
> +	setbits32(&immap->im_ioport.iop_ppard, 0x00000600);
> +	clrbits32(&immap->im_ioport.iop_psord, 0x00000600);
> +	clrbits32(&immap->im_ioport.iop_pdird, 0x00000200);
> +	setbits32(&immap->im_ioport.iop_pdird, 0x00000400);
> +
> +	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
> +	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
> +	setbits32(&immap->im_cpmux.cmx_scr,
> +		  ((data->clk_tx - 1) << (4 - data->clk_tx)));
> +	setbits32(&immap->im_cpmux.cmx_scr,
> +		  ((data->clk_rx - 1) << (4 - data->clk_rx)));
> +
> +	iounmap(immap);
> +}
> +
> +void init_scc_ioports(struct fs_uart_platform_info *data)
> +{
> +	int scc_no = fs_get_scc_index(data->fs_no);
> +
> +	switch (scc_no) {
> +	case 0:
> +		init_scc1_uart_ioports(data);
> +		data->brg = data->clk_rx;
> +		break;
> +	case 3:
> +		init_scc4_uart_ioports(data);
> +		data->brg = data->clk_rx;
> +		break;
> +	default:
> +		printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
> +		return;
> +	}
> +}
> +
> +void __init m82xx_board_setup(void)
> +{
> +	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
> +	struct device_node *np;
> +	struct resource r;
> +	u32 *bcsr;
> +
> +	np = of_find_node_by_type(NULL, "memory");
> +	if (!np) {
> +		printk(KERN_INFO "No memory node in device tree\n");
> +		return;
> +	}
> +	if (of_address_to_resource(np, 1, &r)) {
> +		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
> +		return;
> +	}
> +	of_node_put(np);
> +	bcsr = ioremap(r.start + 4, sizeof(u32));
> +	/* Enable the 2nd UART port */
> +	clrbits32(bcsr, BCSR1_RS232_EN2);
> +
> +#ifdef CONFIG_SERIAL_CPM_SCC1
> +	clrbits32((u32 *) & immap->im_scc[0].scc_sccm,
> +		  UART_SCCM_TX | UART_SCCM_RX);
> +	clrbits32((u32 *) & immap->im_scc[0].scc_gsmrl,
> +		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
> +#endif
> +
> +#ifdef CONFIG_SERIAL_CPM_SCC2
> +	clrbits32((u32 *) & immap->im_scc[1].scc_sccm,
> +		  UART_SCCM_TX | UART_SCCM_RX);
> +	clrbits32((u32 *) & immap->im_scc[1].scc_gsmrl,
> +		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
> +#endif
> +
> +#ifdef CONFIG_SERIAL_CPM_SCC3
> +	clrbits32((u32 *) & immap->im_scc[2].scc_sccm,
> +		  UART_SCCM_TX | UART_SCCM_RX);
> +	clrbits32((u32 *) & immap->im_scc[2].scc_gsmrl,
> +		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
> +#endif
> +
> +#ifdef CONFIG_SERIAL_CPM_SCC4
> +	clrbits32((u32 *) & immap->im_scc[3].scc_sccm,
> +		  UART_SCCM_TX | UART_SCCM_RX);
> +	clrbits32((u32 *) & immap->im_scc[3].scc_gsmrl,
> +		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
> +#endif
> +
> +	iounmap(bcsr);
> +	iounmap(immap);
> +}
> +
> +#ifdef CONFIG_PCI
> +static void m82xx_pci_mask_irq(unsigned int irq)
> +{
> +	int bit = irq - pci_int_base;
> +
> +	*pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
> +	return;
> +}
> +
> +static void m82xx_pci_unmask_irq(unsigned int irq)
> +{
> +	int bit = irq - pci_int_base;
> +
> +	*pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
> +	return;
> +}
> +
> +static void m82xx_pci_mask_and_ack(unsigned int irq)
> +{
> +	int bit = irq - pci_int_base;
> +
> +	*pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
> +	return;
> +}
> +
> +static void m82xx_pci_end_irq(unsigned int irq)
> +{
> +	int bit = irq - pci_int_base;
> +
> +	*pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
> +	return;
> +}
> +
> +struct hw_interrupt_type m82xx_pci_ic = {
> +	.typename = "MPC82xx ADS PCI",
> +	.name = "MPC82xx ADS PCI",
> +	.enable = m82xx_pci_unmask_irq,
> +	.disable = m82xx_pci_mask_irq,
> +	.ack = m82xx_pci_mask_and_ack,
> +	.end = m82xx_pci_end_irq,
> +	.mask = m82xx_pci_mask_irq,
> +	.mask_ack = m82xx_pci_mask_and_ack,
> +	.unmask = m82xx_pci_unmask_irq,
> +	.eoi = m82xx_pci_end_irq,
> +};
> +
> +static void
> +m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
> +{
> +	unsigned long stat, mask, pend;
> +	int bit;
> +
> +	for (;;) {
> +		stat = *pci_regs.pci_int_stat_reg;
> +		mask = *pci_regs.pci_int_mask_reg;
> +		pend = stat & ~mask & 0xf0000000;
> +		if (!pend)
> +			break;
> +		for (bit = 0; pend != 0; ++bit, pend <<= 1) {
> +			if (pend & 0x80000000)
> +				__do_IRQ(pci_int_base + bit);
> +		}
> +	}
> +}
> +
> +static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
> +{
> +	return node == pci_pic_node;
> +}
> +
> +static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
> +			    irq_hw_number_t hw)
> +{
> +	get_irq_desc(virq)->status |= IRQ_LEVEL;
> +	set_irq_chip(virq, &m82xx_pci_ic);
> +	return 0;
> +}
> +
> +static void pci_host_unmap(struct irq_host *h, unsigned int virq)
> +{
> +	/* remove chip and handler */
> +	set_irq_chip(virq, NULL);
> +}
> +
> +static struct irq_host_ops pci_pic_host_ops = {
> +	.match = pci_pic_host_match,
> +	.map = pci_pic_host_map,
> +	.unmap = pci_host_unmap,
> +};
> +
> +void m82xx_pci_init_irq(void)
> +{
> +	int irq;
> +	cpm2_map_t *immap;
> +	struct device_node *np;
> +	struct resource r;
> +	const u32 *regs;
> +	unsigned int size;
> +	const u32 *irq_map;
> +	int i;
> +	unsigned int irq_max, irq_min;
> +
> +	if ((np = of_find_node_by_type(NULL, "soc")) == NULL) {
> +		printk(KERN_INFO "No SOC node in device tree\n");
> +		return;
> +	}
> +	memset(&r, 0, sizeof(r));
> +	if (of_address_to_resource(np, 0, &r)) {
> +		printk(KERN_INFO "No SOC reg property in device tree\n");
> +		return;
> +	}
> +	immap = ioremap(r.start, sizeof(*immap));
> +	of_node_put(np);
> +
> +	/* install the demultiplexer for the PCI cascade interrupt */
> +	np = of_find_node_by_type(NULL, "pci");
> +	if (!np) {
> +		printk(KERN_INFO "No pci node on device tree\n");
> +		iounmap(immap);
> +		return;
> +	}
> +	irq_map = of_get_property(np, "interrupt-map", &size);
> +	if ((!irq_map) || (size <= 7)) {
> +		printk(KERN_INFO "No interrupt-map property of pci node\n");
> +		iounmap(immap);
> +		return;
> +	}
> +	size /= sizeof(irq_map[0]);
> +	for (i = 0, irq_max = 0, irq_min = 512; i < size; i += 7, irq_map += 7) {
> +		if (irq_map[5] < irq_min)
> +			irq_min = irq_map[5];
> +		if (irq_map[5] > irq_max)
> +			irq_max = irq_map[5];
> +	}
> +	pci_int_base = irq_min;
> +	irq = irq_of_parse_and_map(np, 0);
> +	set_irq_chained_handler(irq, m82xx_pci_irq_demux);
> +	of_node_put(np);
> +	np = of_find_node_by_type(NULL, "pci-pic");
> +	if (!np) {
> +		printk(KERN_INFO "No pci pic node on device tree\n");
> +		iounmap(immap);
> +		return;
> +	}
> +	pci_pic_node = of_node_get(np);
> +	/* PCI interrupt controller registers: status and mask */
> +	regs = of_get_property(np, "reg", &size);
> +	if ((!regs) || (size <= 2)) {
> +		printk(KERN_INFO "No reg property in pci pic node\n");
> +		iounmap(immap);
> +		return;
> +	}
> +	pci_regs.pci_int_stat_reg =
> +	    ioremap(regs[0], sizeof(*pci_regs.pci_int_stat_reg));
> +	pci_regs.pci_int_mask_reg =
> +	    ioremap(regs[1], sizeof(*pci_regs.pci_int_mask_reg));
> +	of_node_put(np);
> +	/* configure chip select for PCI interrupt controller */
> +	immap->im_memctl.memc_br3 = regs[0] | 0x00001801;
> +	immap->im_memctl.memc_or3 = 0xffff8010;
> +	/* make PCI IRQ level sensitive */
> +	immap->im_intctl.ic_siexr &= ~(1 << (14 - (irq - SIU_INT_IRQ1)));
> +
> +	/* mask all PCI interrupts */
> +	*pci_regs.pci_int_mask_reg |= 0xfff00000;
> +	iounmap(immap);
> +	pci_pic_host =
> +	    irq_alloc_host(IRQ_HOST_MAP_LINEAR, irq_max - irq_min + 1,
> +			   &pci_pic_host_ops, irq_max + 1);
> +	return;
> +}
> +
> +static int m82xx_pci_exclude_device(struct pci_controller *hose,
> +				    u_char bus, u_char devfn)
> +{
> +	if (bus == 0 && PCI_SLOT(devfn) == 0)
> +		return PCIBIOS_DEVICE_NOT_FOUND;
> +	else
> +		return PCIBIOS_SUCCESSFUL;
> +}
> +
> +static void __init mpc82xx_add_bridge(struct device_node *np)
> +{
> +	int len;
> +	struct pci_controller *hose;
> +	struct resource r;
> +	const int *bus_range;
> +	const uint *ptr;
> +
> +	memset(&r, 0, sizeof(r));
> +	if (of_address_to_resource(np, 0, &r)) {
> +		printk(KERN_INFO "No PCI reg property in device tree\n");
> +		return;
> +	}
> +	if (!(ptr = of_get_property(np, "clock-frequency", NULL))) {
> +		printk(KERN_INFO "No clock-frequency property in PCI node");
> +		return;
> +	}
> +	pci_clk_frq = *ptr;
> +	of_node_put(np);
> +	bus_range = of_get_property(np, "bus-range", &len);
> +	if (bus_range == NULL || len < 2 * sizeof(int)) {
> +		printk(KERN_WARNING "Can't get bus-range for %s, assume"
> +		       " bus 0\n", np->full_name);
> +	}
> +
> +	pci_assign_all_buses = 1;
> +
> +	hose = pcibios_alloc_controller(np);
> +
> +	if (!hose)
> +		return;
> +
> +	hose->first_busno = bus_range ? bus_range[0] : 0;
> +	hose->last_busno = bus_range ? bus_range[1] : 0xff;
> +
> +	setup_indirect_pci(hose,
> +			   r.start + offsetof(pci_cpm2_t, pci_cfg_addr),
> +			   r.start + offsetof(pci_cpm2_t, pci_cfg_data));
> +
> +	pci_process_bridge_OF_ranges(hose, np, 1);
> +}
> +#endif
> +
> +/*
> + * Setup the architecture
> + */
> +static void __init mpc82xx_ads_setup_arch(void)
> +{
> +#ifdef CONFIG_PCI
> +	struct device_node *np;
> +#endif
> +
> +	if (ppc_md.progress)
> +		ppc_md.progress("mpc82xx_ads_setup_arch()", 0);
> +	cpm2_reset();
> +
> +	/* Map I/O region to a 256MB BAT */
> +
> +	m82xx_board_setup();
> +
> +#ifdef CONFIG_PCI
> +	ppc_md.pci_exclude_device = m82xx_pci_exclude_device;
> +	for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
> +		mpc82xx_add_bridge(np);
> +
> +	of_node_put(np);
> +#endif
> +
> +#ifdef  CONFIG_ROOT_NFS
> +	ROOT_DEV = Root_NFS;
> +#else
> +	ROOT_DEV = Root_HDA1;
> +#endif
> +
> +	if (ppc_md.progress)
> +		ppc_md.progress("mpc82xx_ads_setup_arch(), finish", 0);
> +}
> +
> +/*
> + * Called very early, device-tree isn't unflattened
> + */
> +static int __init mpc82xx_ads_probe(void)
> +{
> +	/* We always match for now, eventually we should look at
> +	 * the flat dev tree to ensure this is the board we are
> +	 * supposed to run on
> +	 */
> +	return 1;
> +}
> +
> +#define RMR_CSRE 0x00000001
> +static void m82xx_restart(char *cmd)
> +{
> +	__volatile__ unsigned char dummy;
> +
> +	local_irq_disable();
> +	((cpm2_map_t *) cpm2_immr)->im_clkrst.car_rmr |= RMR_CSRE;
> +
> +	/* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
> +	mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
> +	dummy = ((cpm2_map_t *) cpm2_immr)->im_clkrst.res[0];
> +	printk("Restart failed\n");
> +	while (1) ;
> +}
> +
> +static void m82xx_halt(void)
> +{
> +	local_irq_disable();
> +	while (1) ;
> +}
> +
> +define_machine(mpc82xx_ads)
> +{
> +	.name = "MPC82xx ADS",
> +	.probe = mpc82xx_ads_probe,
> +	.setup_arch =    mpc82xx_ads_setup_arch,
> +	.init_IRQ =    mpc82xx_ads_pic_init,
> +	.show_cpuinfo =    mpc82xx_ads_show_cpuinfo,
> +	.get_irq =    cpm2_get_irq,
> +	.calibrate_decr =    m82xx_calibrate_decr,
> +	.restart = m82xx_restart,.halt = m82xx_halt,
> +};
> diff --git a/arch/powerpc/platforms/82xx/mpc82xx_ads.c b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
> deleted file mode 100644
> index da20832..0000000
> --- a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
> +++ /dev/null
> @@ -1,640 +0,0 @@
> -/*
> - * MPC82xx_ads setup and early boot code plus other random bits.
> - *
> - * Author: Vitaly Bordug <vbordug@ru.mvista.com>
> - * m82xx_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
> - *
> - * Copyright (c) 2006 MontaVista Software, Inc.
> - *
> - * This program is free software; you can redistribute  it and/or modify it
> - * under  the terms of  the GNU General  Public License as published by the
> - * Free Software Foundation;  either version 2 of the  License, or (at your
> - * option) any later version.
> - */
> -
> -#include <linux/stddef.h>
> -#include <linux/kernel.h>
> -#include <linux/init.h>
> -#include <linux/errno.h>
> -#include <linux/reboot.h>
> -#include <linux/pci.h>
> -#include <linux/interrupt.h>
> -#include <linux/kdev_t.h>
> -#include <linux/major.h>
> -#include <linux/console.h>
> -#include <linux/delay.h>
> -#include <linux/seq_file.h>
> -#include <linux/root_dev.h>
> -#include <linux/initrd.h>
> -#include <linux/module.h>
> -#include <linux/fsl_devices.h>
> -#include <linux/fs_uart_pd.h>
> -
> -#include <asm/system.h>
> -#include <asm/pgtable.h>
> -#include <asm/page.h>
> -#include <asm/atomic.h>
> -#include <asm/time.h>
> -#include <asm/io.h>
> -#include <asm/machdep.h>
> -#include <asm/bootinfo.h>
> -#include <asm/pci-bridge.h>
> -#include <asm/mpc8260.h>
> -#include <asm/irq.h>
> -#include <mm/mmu_decl.h>
> -#include <asm/prom.h>
> -#include <asm/cpm2.h>
> -#include <asm/udbg.h>
> -#include <asm/i8259.h>
> -#include <linux/fs_enet_pd.h>
> -
> -#include <sysdev/fsl_soc.h>
> -#include <sysdev/cpm2_pic.h>
> -
> -#include "pq2ads.h"
> -
> -#ifdef CONFIG_PCI
> -static uint pci_clk_frq;
> -static struct {
> -	unsigned long *pci_int_stat_reg;
> -	unsigned long *pci_int_mask_reg;
> -} pci_regs;
> -
> -static unsigned long pci_int_base;
> -static struct irq_host *pci_pic_host;
> -static struct device_node *pci_pic_node;
> -#endif
> -
> -static void __init mpc82xx_ads_pic_init(void)
> -{
> -	struct device_node *np = of_find_compatible_node(NULL, "cpm-pic", "CPM2");
> -	struct resource r;
> -	cpm2_map_t *cpm_reg;
> -
> -	if (np == NULL) {
> -		printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
> -		return;
> -	}
> -	if (of_address_to_resource(np, 0, &r)) {
> -		printk(KERN_ERR "PIC init: invalid resource\n");
> -		of_node_put(np);
> -		return;
> -	}
> -	cpm2_pic_init(np);
> -	of_node_put(np);
> -
> -	/* Initialize the default interrupt mapping priorities,
> -	 * in case the boot rom changed something on us.
> -	 */
> -	cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
> -	cpm_reg->im_intctl.ic_siprr = 0x05309770;
> -	iounmap(cpm_reg);
> -#ifdef CONFIG_PCI
> -	/* Initialize stuff for the 82xx CPLD IC and install demux  */
> -	m82xx_pci_init_irq();
> -#endif
> -}
> -
> -static void init_fcc1_ioports(struct fs_platform_info *fpi)
> -{
> -	struct io_port *io;
> -	u32 tempval;
> -	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
> -	struct device_node *np;
> -	struct resource r;
> -	u32 *bcsr;
> -
> -	np = of_find_node_by_type(NULL, "memory");
> -	if (!np) {
> -		printk(KERN_INFO "No memory node in device tree\n");
> -		return;
> -	}
> -	if (of_address_to_resource(np, 1, &r)) {
> -		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
> -		return;
> -	}
> -	of_node_put(np);
> -	bcsr = ioremap(r.start + 4, sizeof(u32));
> -	io = &immap->im_ioport;
> -
> -	/* Enable the PHY */
> -	clrbits32(bcsr, BCSR1_FETHIEN);
> -	setbits32(bcsr, BCSR1_FETH_RST);
> -
> -	/* FCC1 pins are on port A/C. */
> -	/* Configure port A and C pins for FCC1 Ethernet. */
> -
> -	tempval = in_be32(&io->iop_pdira);
> -	tempval &= ~PA1_DIRA0;
> -	tempval |= PA1_DIRA1;
> -	out_be32(&io->iop_pdira, tempval);
> -
> -	tempval = in_be32(&io->iop_psora);
> -	tempval &= ~PA1_PSORA0;
> -	tempval |= PA1_PSORA1;
> -	out_be32(&io->iop_psora, tempval);
> -
> -	setbits32(&io->iop_ppara, PA1_DIRA0 | PA1_DIRA1);
> -
> -	/* Alter clocks */
> -	tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
> -
> -	clrbits32(&io->iop_psorc, tempval);
> -	clrbits32(&io->iop_pdirc, tempval);
> -	setbits32(&io->iop_pparc, tempval);
> -
> -	cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_rx, CPM_CLK_RX);
> -	cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_tx, CPM_CLK_TX);
> -
> -	iounmap(bcsr);
> -	iounmap(immap);
> -}
> -
> -static void init_fcc2_ioports(struct fs_platform_info *fpi)
> -{
> -	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
> -	struct device_node *np;
> -	struct resource r;
> -	u32 *bcsr;
> -
> -	struct io_port *io;
> -	u32 tempval;
> -
> -	np = of_find_node_by_type(NULL, "memory");
> -	if (!np) {
> -		printk(KERN_INFO "No memory node in device tree\n");
> -		return;
> -	}
> -	if (of_address_to_resource(np, 1, &r)) {
> -		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
> -		return;
> -	}
> -	of_node_put(np);
> -	io = &immap->im_ioport;
> -	bcsr = ioremap(r.start + 12, sizeof(u32));
> -
> -	/* Enable the PHY */
> -	clrbits32(bcsr, BCSR3_FETHIEN2);
> -	setbits32(bcsr, BCSR3_FETH2_RST);
> -
> -	/* FCC2 are port B/C. */
> -	/* Configure port A and C pins for FCC2 Ethernet. */
> -
> -	tempval = in_be32(&io->iop_pdirb);
> -	tempval &= ~PB2_DIRB0;
> -	tempval |= PB2_DIRB1;
> -	out_be32(&io->iop_pdirb, tempval);
> -
> -	tempval = in_be32(&io->iop_psorb);
> -	tempval &= ~PB2_PSORB0;
> -	tempval |= PB2_PSORB1;
> -	out_be32(&io->iop_psorb, tempval);
> -
> -	setbits32(&io->iop_pparb, PB2_DIRB0 | PB2_DIRB1);
> -
> -	tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
> -
> -	/* Alter clocks */
> -	clrbits32(&io->iop_psorc, tempval);
> -	clrbits32(&io->iop_pdirc, tempval);
> -	setbits32(&io->iop_pparc, tempval);
> -
> -	cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_rx, CPM_CLK_RX);
> -	cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_tx, CPM_CLK_TX);
> -
> -	iounmap(bcsr);
> -	iounmap(immap);
> -}
> -
> -void init_fcc_ioports(struct fs_platform_info *fpi)
> -{
> -	int fcc_no = fs_get_fcc_index(fpi->fs_no);
> -
> -	switch (fcc_no) {
> -	case 0:
> -		init_fcc1_ioports(fpi);
> -		break;
> -	case 1:
> -		init_fcc2_ioports(fpi);
> -		break;
> -	default:
> -		printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
> -		return;
> -	}
> -}
> -
> -static void init_scc1_uart_ioports(struct fs_uart_platform_info *data)
> -{
> -	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
> -
> -	/* SCC1 is only on port D */
> -	setbits32(&immap->im_ioport.iop_ppard, 0x00000003);
> -	clrbits32(&immap->im_ioport.iop_psord, 0x00000001);
> -	setbits32(&immap->im_ioport.iop_psord, 0x00000002);
> -	clrbits32(&immap->im_ioport.iop_pdird, 0x00000001);
> -	setbits32(&immap->im_ioport.iop_pdird, 0x00000002);
> -
> -	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
> -	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
> -	setbits32(&immap->im_cpmux.cmx_scr,
> -		  ((data->clk_tx - 1) << (4 - data->clk_tx)));
> -	setbits32(&immap->im_cpmux.cmx_scr,
> -		  ((data->clk_rx - 1) << (4 - data->clk_rx)));
> -
> -	iounmap(immap);
> -}
> -
> -static void init_scc4_uart_ioports(struct fs_uart_platform_info *data)
> -{
> -	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
> -
> -	setbits32(&immap->im_ioport.iop_ppard, 0x00000600);
> -	clrbits32(&immap->im_ioport.iop_psord, 0x00000600);
> -	clrbits32(&immap->im_ioport.iop_pdird, 0x00000200);
> -	setbits32(&immap->im_ioport.iop_pdird, 0x00000400);
> -
> -	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
> -	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
> -	setbits32(&immap->im_cpmux.cmx_scr,
> -		  ((data->clk_tx - 1) << (4 - data->clk_tx)));
> -	setbits32(&immap->im_cpmux.cmx_scr,
> -		  ((data->clk_rx - 1) << (4 - data->clk_rx)));
> -
> -	iounmap(immap);
> -}
> -
> -void init_scc_ioports(struct fs_uart_platform_info *data)
> -{
> -	int scc_no = fs_get_scc_index(data->fs_no);
> -
> -	switch (scc_no) {
> -	case 0:
> -		init_scc1_uart_ioports(data);
> -		data->brg = data->clk_rx;
> -		break;
> -	case 3:
> -		init_scc4_uart_ioports(data);
> -		data->brg = data->clk_rx;
> -		break;
> -	default:
> -		printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
> -		return;
> -	}
> -}
> -
> -void __init m82xx_board_setup(void)
> -{
> -	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
> -	struct device_node *np;
> -	struct resource r;
> -	u32 *bcsr;
> -
> -	np = of_find_node_by_type(NULL, "memory");
> -	if (!np) {
> -		printk(KERN_INFO "No memory node in device tree\n");
> -		return;
> -	}
> -	if (of_address_to_resource(np, 1, &r)) {
> -		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
> -		return;
> -	}
> -	of_node_put(np);
> -	bcsr = ioremap(r.start + 4, sizeof(u32));
> -	/* Enable the 2nd UART port */
> -	clrbits32(bcsr, BCSR1_RS232_EN2);
> -
> -#ifdef CONFIG_SERIAL_CPM_SCC1
> -	clrbits32((u32 *) & immap->im_scc[0].scc_sccm,
> -		  UART_SCCM_TX | UART_SCCM_RX);
> -	clrbits32((u32 *) & immap->im_scc[0].scc_gsmrl,
> -		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
> -#endif
> -
> -#ifdef CONFIG_SERIAL_CPM_SCC2
> -	clrbits32((u32 *) & immap->im_scc[1].scc_sccm,
> -		  UART_SCCM_TX | UART_SCCM_RX);
> -	clrbits32((u32 *) & immap->im_scc[1].scc_gsmrl,
> -		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
> -#endif
> -
> -#ifdef CONFIG_SERIAL_CPM_SCC3
> -	clrbits32((u32 *) & immap->im_scc[2].scc_sccm,
> -		  UART_SCCM_TX | UART_SCCM_RX);
> -	clrbits32((u32 *) & immap->im_scc[2].scc_gsmrl,
> -		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
> -#endif
> -
> -#ifdef CONFIG_SERIAL_CPM_SCC4
> -	clrbits32((u32 *) & immap->im_scc[3].scc_sccm,
> -		  UART_SCCM_TX | UART_SCCM_RX);
> -	clrbits32((u32 *) & immap->im_scc[3].scc_gsmrl,
> -		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
> -#endif
> -
> -	iounmap(bcsr);
> -	iounmap(immap);
> -}
> -
> -#ifdef CONFIG_PCI
> -static void m82xx_pci_mask_irq(unsigned int irq)
> -{
> -	int bit = irq - pci_int_base;
> -
> -	*pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
> -	return;
> -}
> -
> -static void m82xx_pci_unmask_irq(unsigned int irq)
> -{
> -	int bit = irq - pci_int_base;
> -
> -	*pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
> -	return;
> -}
> -
> -static void m82xx_pci_mask_and_ack(unsigned int irq)
> -{
> -	int bit = irq - pci_int_base;
> -
> -	*pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
> -	return;
> -}
> -
> -static void m82xx_pci_end_irq(unsigned int irq)
> -{
> -	int bit = irq - pci_int_base;
> -
> -	*pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
> -	return;
> -}
> -
> -struct hw_interrupt_type m82xx_pci_ic = {
> -	.typename = "MPC82xx ADS PCI",
> -	.name = "MPC82xx ADS PCI",
> -	.enable = m82xx_pci_unmask_irq,
> -	.disable = m82xx_pci_mask_irq,
> -	.ack = m82xx_pci_mask_and_ack,
> -	.end = m82xx_pci_end_irq,
> -	.mask = m82xx_pci_mask_irq,
> -	.mask_ack = m82xx_pci_mask_and_ack,
> -	.unmask = m82xx_pci_unmask_irq,
> -	.eoi = m82xx_pci_end_irq,
> -};
> -
> -static void
> -m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
> -{
> -	unsigned long stat, mask, pend;
> -	int bit;
> -
> -	for (;;) {
> -		stat = *pci_regs.pci_int_stat_reg;
> -		mask = *pci_regs.pci_int_mask_reg;
> -		pend = stat & ~mask & 0xf0000000;
> -		if (!pend)
> -			break;
> -		for (bit = 0; pend != 0; ++bit, pend <<= 1) {
> -			if (pend & 0x80000000)
> -				__do_IRQ(pci_int_base + bit);
> -		}
> -	}
> -}
> -
> -static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
> -{
> -	return node == pci_pic_node;
> -}
> -
> -static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
> -			    irq_hw_number_t hw)
> -{
> -	get_irq_desc(virq)->status |= IRQ_LEVEL;
> -	set_irq_chip(virq, &m82xx_pci_ic);
> -	return 0;
> -}
> -
> -static void pci_host_unmap(struct irq_host *h, unsigned int virq)
> -{
> -	/* remove chip and handler */
> -	set_irq_chip(virq, NULL);
> -}
> -
> -static struct irq_host_ops pci_pic_host_ops = {
> -	.match = pci_pic_host_match,
> -	.map = pci_pic_host_map,
> -	.unmap = pci_host_unmap,
> -};
> -
> -void m82xx_pci_init_irq(void)
> -{
> -	int irq;
> -	cpm2_map_t *immap;
> -	struct device_node *np;
> -	struct resource r;
> -	const u32 *regs;
> -	unsigned int size;
> -	const u32 *irq_map;
> -	int i;
> -	unsigned int irq_max, irq_min;
> -
> -	if ((np = of_find_node_by_type(NULL, "soc")) == NULL) {
> -		printk(KERN_INFO "No SOC node in device tree\n");
> -		return;
> -	}
> -	memset(&r, 0, sizeof(r));
> -	if (of_address_to_resource(np, 0, &r)) {
> -		printk(KERN_INFO "No SOC reg property in device tree\n");
> -		return;
> -	}
> -	immap = ioremap(r.start, sizeof(*immap));
> -	of_node_put(np);
> -
> -	/* install the demultiplexer for the PCI cascade interrupt */
> -	np = of_find_node_by_type(NULL, "pci");
> -	if (!np) {
> -		printk(KERN_INFO "No pci node on device tree\n");
> -		iounmap(immap);
> -		return;
> -	}
> -	irq_map = of_get_property(np, "interrupt-map", &size);
> -	if ((!irq_map) || (size <= 7)) {
> -		printk(KERN_INFO "No interrupt-map property of pci node\n");
> -		iounmap(immap);
> -		return;
> -	}
> -	size /= sizeof(irq_map[0]);
> -	for (i = 0, irq_max = 0, irq_min = 512; i < size; i += 7, irq_map += 7) {
> -		if (irq_map[5] < irq_min)
> -			irq_min = irq_map[5];
> -		if (irq_map[5] > irq_max)
> -			irq_max = irq_map[5];
> -	}
> -	pci_int_base = irq_min;
> -	irq = irq_of_parse_and_map(np, 0);
> -	set_irq_chained_handler(irq, m82xx_pci_irq_demux);
> -	of_node_put(np);
> -	np = of_find_node_by_type(NULL, "pci-pic");
> -	if (!np) {
> -		printk(KERN_INFO "No pci pic node on device tree\n");
> -		iounmap(immap);
> -		return;
> -	}
> -	pci_pic_node = of_node_get(np);
> -	/* PCI interrupt controller registers: status and mask */
> -	regs = of_get_property(np, "reg", &size);
> -	if ((!regs) || (size <= 2)) {
> -		printk(KERN_INFO "No reg property in pci pic node\n");
> -		iounmap(immap);
> -		return;
> -	}
> -	pci_regs.pci_int_stat_reg =
> -	    ioremap(regs[0], sizeof(*pci_regs.pci_int_stat_reg));
> -	pci_regs.pci_int_mask_reg =
> -	    ioremap(regs[1], sizeof(*pci_regs.pci_int_mask_reg));
> -	of_node_put(np);
> -	/* configure chip select for PCI interrupt controller */
> -	immap->im_memctl.memc_br3 = regs[0] | 0x00001801;
> -	immap->im_memctl.memc_or3 = 0xffff8010;
> -	/* make PCI IRQ level sensitive */
> -	immap->im_intctl.ic_siexr &= ~(1 << (14 - (irq - SIU_INT_IRQ1)));
> -
> -	/* mask all PCI interrupts */
> -	*pci_regs.pci_int_mask_reg |= 0xfff00000;
> -	iounmap(immap);
> -	pci_pic_host =
> -	    irq_alloc_host(IRQ_HOST_MAP_LINEAR, irq_max - irq_min + 1,
> -			   &pci_pic_host_ops, irq_max + 1);
> -	return;
> -}
> -
> -static int m82xx_pci_exclude_device(struct pci_controller *hose,
> -				    u_char bus, u_char devfn)
> -{
> -	if (bus == 0 && PCI_SLOT(devfn) == 0)
> -		return PCIBIOS_DEVICE_NOT_FOUND;
> -	else
> -		return PCIBIOS_SUCCESSFUL;
> -}
> -
> -static void __init mpc82xx_add_bridge(struct device_node *np)
> -{
> -	int len;
> -	struct pci_controller *hose;
> -	struct resource r;
> -	const int *bus_range;
> -	const uint *ptr;
> -
> -	memset(&r, 0, sizeof(r));
> -	if (of_address_to_resource(np, 0, &r)) {
> -		printk(KERN_INFO "No PCI reg property in device tree\n");
> -		return;
> -	}
> -	if (!(ptr = of_get_property(np, "clock-frequency", NULL))) {
> -		printk(KERN_INFO "No clock-frequency property in PCI node");
> -		return;
> -	}
> -	pci_clk_frq = *ptr;
> -	of_node_put(np);
> -	bus_range = of_get_property(np, "bus-range", &len);
> -	if (bus_range == NULL || len < 2 * sizeof(int)) {
> -		printk(KERN_WARNING "Can't get bus-range for %s, assume"
> -		       " bus 0\n", np->full_name);
> -	}
> -
> -	pci_assign_all_buses = 1;
> -
> -	hose = pcibios_alloc_controller(np);
> -
> -	if (!hose)
> -		return;
> -
> -	hose->first_busno = bus_range ? bus_range[0] : 0;
> -	hose->last_busno = bus_range ? bus_range[1] : 0xff;
> -
> -	setup_indirect_pci(hose,
> -			   r.start + offsetof(pci_cpm2_t, pci_cfg_addr),
> -			   r.start + offsetof(pci_cpm2_t, pci_cfg_data));
> -
> -	pci_process_bridge_OF_ranges(hose, np, 1);
> -}
> -#endif
> -
> -/*
> - * Setup the architecture
> - */
> -static void __init mpc82xx_ads_setup_arch(void)
> -{
> -#ifdef CONFIG_PCI
> -	struct device_node *np;
> -#endif
> -
> -	if (ppc_md.progress)
> -		ppc_md.progress("mpc82xx_ads_setup_arch()", 0);
> -	cpm2_reset();
> -
> -	/* Map I/O region to a 256MB BAT */
> -
> -	m82xx_board_setup();
> -
> -#ifdef CONFIG_PCI
> -	ppc_md.pci_exclude_device = m82xx_pci_exclude_device;
> -	for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
> -		mpc82xx_add_bridge(np);
> -
> -	of_node_put(np);
> -#endif
> -
> -#ifdef  CONFIG_ROOT_NFS
> -	ROOT_DEV = Root_NFS;
> -#else
> -	ROOT_DEV = Root_HDA1;
> -#endif
> -
> -	if (ppc_md.progress)
> -		ppc_md.progress("mpc82xx_ads_setup_arch(), finish", 0);
> -}
> -
> -/*
> - * Called very early, device-tree isn't unflattened
> - */
> -static int __init mpc82xx_ads_probe(void)
> -{
> -	/* We always match for now, eventually we should look at
> -	 * the flat dev tree to ensure this is the board we are
> -	 * supposed to run on
> -	 */
> -	return 1;
> -}
> -
> -#define RMR_CSRE 0x00000001
> -static void m82xx_restart(char *cmd)
> -{
> -	__volatile__ unsigned char dummy;
> -
> -	local_irq_disable();
> -	((cpm2_map_t *) cpm2_immr)->im_clkrst.car_rmr |= RMR_CSRE;
> -
> -	/* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
> -	mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
> -	dummy = ((cpm2_map_t *) cpm2_immr)->im_clkrst.res[0];
> -	printk("Restart failed\n");
> -	while (1) ;
> -}
> -
> -static void m82xx_halt(void)
> -{
> -	local_irq_disable();
> -	while (1) ;
> -}
> -
> -define_machine(mpc82xx_ads)
> -{
> -	.name = "MPC82xx ADS",
> -	.probe = mpc82xx_ads_probe,
> -	.setup_arch =    mpc82xx_ads_setup_arch,
> -	.init_IRQ =    mpc82xx_ads_pic_init,
> -	.show_cpuinfo =    mpc82xx_ads_show_cpuinfo,
> -	.get_irq =    cpm2_get_irq,
> -	.calibrate_decr =    m82xx_calibrate_decr,
> -	.restart = m82xx_restart,.halt = m82xx_halt,
> -};

Re: [PATCH 22/61] Rename mpc82xx_ads to mpc8272ads.

[Scott Wood]

Mark Zhan wrote:
> Scott,
> 
> It seems the old name "mpc82xx ads" is still used in your code.
> It will be nice that your file name match your code name, you know, less
> confusion.

See patch 24.

AIUI, it's generally preferred when moving large chunks of code to first 
have a patch that just moves it, and then a subsequent one that makes 
changes.  I was also under the impression that git would generate a one 
line file rename in the diff, but for some reason that didn't happen.

-Scott

Re: [PATCH 22/61] Rename mpc82xx_ads to mpc8272ads.

[Kumar Gala]

On Jul 17, 2007, at 8:35 PM, Scott Wood wrote:

> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
>  arch/powerpc/platforms/82xx/Kconfig       |    6 +-
>  arch/powerpc/platforms/82xx/Makefile      |    2 +-
>  arch/powerpc/platforms/82xx/mpc8272ads.c  |  640 ++++++++++++++++++ 
> +++++++++++

can we use mpc8272_ads.c to follow the naming we have elsewhere in  
other 8xxx land.

>  arch/powerpc/platforms/82xx/mpc82xx_ads.c |  640  
> -----------------------------
>  4 files changed, 644 insertions(+), 644 deletions(-)
>  create mode 100644 arch/powerpc/platforms/82xx/mpc8272ads.c
>  delete mode 100644 arch/powerpc/platforms/82xx/mpc82xx_ads.c
>
> diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/ 
> platforms/82xx/Kconfig
> index 89fde43..b4af8c2 100644
> --- a/arch/powerpc/platforms/82xx/Kconfig
> +++ b/arch/powerpc/platforms/82xx/Kconfig
> @@ -1,10 +1,10 @@
>  choice
>  	prompt "82xx Board Type"
>  	depends on PPC_82xx
> -	default MPC82xx_ADS
> +	default MPC8272ADS
>
> -config MPC82xx_ADS
> -	bool "Freescale MPC82xx ADS"
> +config MPC8272ADS
> +	bool "Freescale MPC8272ADS"
>  	select DEFAULT_UIMAGE
>  	select PQ2ADS
>  	select 8272

Similar comments about using underscore in Kconfig vars.

[snip].

- k

[PATCH 23/61] Rename mpc82xx_ads_show_cpuinfo to m82xx_show_cpuinfo.

[Scott Wood]

Vendor and machine are removed; any such information should go in
ppc_md.name.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/platforms/82xx/mpc8272ads.c |    4 ++--
 arch/powerpc/platforms/82xx/mpc82xx.c    |    4 +---
 arch/powerpc/platforms/82xx/pq2ads.h     |    2 +-
 3 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index da20832..1945522 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -629,11 +629,11 @@ static void m82xx_halt(void)
 
 define_machine(mpc82xx_ads)
 {
-	.name = "MPC82xx ADS",
+	.name = "Freescale MPC8272ADS",
 	.probe = mpc82xx_ads_probe,
 	.setup_arch =    mpc82xx_ads_setup_arch,
 	.init_IRQ =    mpc82xx_ads_pic_init,
-	.show_cpuinfo =    mpc82xx_ads_show_cpuinfo,
+	.show_cpuinfo =    m82xx_show_cpuinfo,
 	.get_irq =    cpm2_get_irq,
 	.calibrate_decr =    m82xx_calibrate_decr,
 	.restart = m82xx_restart,.halt = m82xx_halt,
diff --git a/arch/powerpc/platforms/82xx/mpc82xx.c b/arch/powerpc/platforms/82xx/mpc82xx.c
index cc9900d..a2a9c8d 100644
--- a/arch/powerpc/platforms/82xx/mpc82xx.c
+++ b/arch/powerpc/platforms/82xx/mpc82xx.c
@@ -88,7 +88,7 @@ void __init m82xx_calibrate_decr(void)
 				"(not found)\n");
 }
 
-void mpc82xx_ads_show_cpuinfo(struct seq_file *m)
+void m82xx_show_cpuinfo(struct seq_file *m)
 {
 	uint pvid, svid, phid1;
 	uint memsize = total_memory;
@@ -96,8 +96,6 @@ void mpc82xx_ads_show_cpuinfo(struct seq_file *m)
 	pvid = mfspr(SPRN_PVR);
 	svid = mfspr(SPRN_SVR);
 
-	seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
-	seq_printf(m, "Machine\t\t: %s\n", CPUINFO_MACHINE);
 	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 
diff --git a/arch/powerpc/platforms/82xx/pq2ads.h b/arch/powerpc/platforms/82xx/pq2ads.h
index 5b5cca6..4802292 100644
--- a/arch/powerpc/platforms/82xx/pq2ads.h
+++ b/arch/powerpc/platforms/82xx/pq2ads.h
@@ -59,7 +59,7 @@
 #define SIU_INT_SCC4		((uint)0x2b+CPM_IRQ_OFFSET)
 
 void m82xx_pci_init_irq(void);
-void mpc82xx_ads_show_cpuinfo(struct seq_file*);
+void m82xx_show_cpuinfo(struct seq_file *);
 void m82xx_calibrate_decr(void);
 
 #endif /* __MACH_ADS8260_DEFS */
-- 
1.5.0.3

Re: [PATCH 23/61] Rename mpc82xx_ads_show_cpuinfo to m82xx_show_cpuinfo.

[Kumar Gala]

On Jul 17, 2007, at 8:35 PM, Scott Wood wrote:

> Vendor and machine are removed; any such information should go in
> ppc_md.name.
>
> Signed-off-by: Scott Wood <scottwood@freescale.com>

Do we really need a 82xx specific show_cpuinfo or can we just use the  
generic one?

I just get SVR, PLL, and memory size.  It seems like memory size is  
available elsewhere, PLL can be computed from clock freq & time base  
freq.

While SVR would be nice, but we kinda now it from the name.  Plus I'd  
rather we just maybe export that as a sysfs property or something.

- k

[PATCH 24/61] Change references from 82xx_ADS to 8272ADS.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/platforms/82xx/mpc8272ads.c |   33 +++++++++++++++--------------
 1 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index 1945522..29c2932 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -1,5 +1,5 @@
 /*
- * MPC82xx_ads setup and early boot code plus other random bits.
+ * MPC8272ADS setup and early boot code plus other random bits.
  *
  * Author: Vitaly Bordug <vbordug@ru.mvista.com>
  * m82xx_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
@@ -65,7 +65,7 @@ static struct irq_host *pci_pic_host;
 static struct device_node *pci_pic_node;
 #endif
 
-static void __init mpc82xx_ads_pic_init(void)
+static void __init mpc8272ads_pic_init(void)
 {
 	struct device_node *np = of_find_compatible_node(NULL, "cpm-pic", "CPM2");
 	struct resource r;
@@ -282,7 +282,7 @@ void init_scc_ioports(struct fs_uart_platform_info *data)
 	}
 }
 
-void __init m82xx_board_setup(void)
+void __init mpc8272ads_board_setup(void)
 {
 	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
 	struct device_node *np;
@@ -562,19 +562,19 @@ static void __init mpc82xx_add_bridge(struct device_node *np)
 /*
  * Setup the architecture
  */
-static void __init mpc82xx_ads_setup_arch(void)
+static void __init mpc8272ads_setup_arch(void)
 {
 #ifdef CONFIG_PCI
 	struct device_node *np;
 #endif
 
 	if (ppc_md.progress)
-		ppc_md.progress("mpc82xx_ads_setup_arch()", 0);
+		ppc_md.progress("mpc8272ads_setup_arch()", 0);
 	cpm2_reset();
 
 	/* Map I/O region to a 256MB BAT */
 
-	m82xx_board_setup();
+	mpc8272ads_board_setup();
 
 #ifdef CONFIG_PCI
 	ppc_md.pci_exclude_device = m82xx_pci_exclude_device;
@@ -591,13 +591,13 @@ static void __init mpc82xx_ads_setup_arch(void)
 #endif
 
 	if (ppc_md.progress)
-		ppc_md.progress("mpc82xx_ads_setup_arch(), finish", 0);
+		ppc_md.progress("mpc8272ads_setup_arch(), finish", 0);
 }
 
 /*
  * Called very early, device-tree isn't unflattened
  */
-static int __init mpc82xx_ads_probe(void)
+static int __init mpc8272ads_probe(void)
 {
 	/* We always match for now, eventually we should look at
 	 * the flat dev tree to ensure this is the board we are
@@ -627,14 +627,15 @@ static void m82xx_halt(void)
 	while (1) ;
 }
 
-define_machine(mpc82xx_ads)
+define_machine(mpc8272ads)
 {
 	.name = "Freescale MPC8272ADS",
-	.probe = mpc82xx_ads_probe,
-	.setup_arch =    mpc82xx_ads_setup_arch,
-	.init_IRQ =    mpc82xx_ads_pic_init,
-	.show_cpuinfo =    m82xx_show_cpuinfo,
-	.get_irq =    cpm2_get_irq,
-	.calibrate_decr =    m82xx_calibrate_decr,
-	.restart = m82xx_restart,.halt = m82xx_halt,
+	.probe = mpc8272ads_probe,
+	.setup_arch = mpc8272ads_setup_arch,
+	.init_IRQ = mpc8272ads_pic_init,
+	.show_cpuinfo = m82xx_show_cpuinfo,
+	.get_irq = cpm2_get_irq,
+	.calibrate_decr = m82xx_calibrate_decr,
+	.restart = m82xx_restart,
+	.halt = m82xx_halt,
 };
-- 
1.5.0.3

[PATCH 25/61] Fix off-by-one error in CPM2 setbrg().

[Scott Wood]

The hardware adds one to the BRG value to get the divider, so it must
be subtracted by software.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/cpm2_common.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index 9244129..daf7497 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -102,7 +102,7 @@ cpm_setbrg(uint brg, uint rate)
 		brg -= 4;
 	}
 	bp += brg;
-	*bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
+	*bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN;
 
 	cpm2_unmap(bp);
 }
-- 
1.5.0.3

[PATCH 26/61] cpm2: Add SCCs to cpm2_clk_setup().

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/cpm2_common.c |   42 ++++++++++++++++++++++++++++++++----
 1 files changed, 37 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index daf7497..4e840bd 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -138,7 +138,7 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
 	cpmux_t *im_cpmux;
 	u32 *reg;
 	u32 mask = 7;
-	u8 clk_map [24][3] = {
+	u8 clk_map[][3] = {
 		{CPM_CLK_FCC1, CPM_BRG5, 0},
 		{CPM_CLK_FCC1, CPM_BRG6, 1},
 		{CPM_CLK_FCC1, CPM_BRG7, 2},
@@ -162,8 +162,40 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
 		{CPM_CLK_FCC3, CPM_CLK13, 4},
 		{CPM_CLK_FCC3, CPM_CLK14, 5},
 		{CPM_CLK_FCC3, CPM_CLK15, 6},
-		{CPM_CLK_FCC3, CPM_CLK16, 7}
-		};
+		{CPM_CLK_FCC3, CPM_CLK16, 7},
+		{CPM_CLK_SCC1, CPM_BRG1, 0},
+		{CPM_CLK_SCC1, CPM_BRG2, 1},
+		{CPM_CLK_SCC1, CPM_BRG3, 2},
+		{CPM_CLK_SCC1, CPM_BRG4, 3},
+		{CPM_CLK_SCC1, CPM_CLK11, 4},
+		{CPM_CLK_SCC1, CPM_CLK12, 5},
+		{CPM_CLK_SCC1, CPM_CLK3, 6},
+		{CPM_CLK_SCC1, CPM_CLK4, 7},
+		{CPM_CLK_SCC2, CPM_BRG1, 0},
+		{CPM_CLK_SCC2, CPM_BRG2, 1},
+		{CPM_CLK_SCC2, CPM_BRG3, 2},
+		{CPM_CLK_SCC2, CPM_BRG4, 3},
+		{CPM_CLK_SCC2, CPM_CLK11, 4},
+		{CPM_CLK_SCC2, CPM_CLK12, 5},
+		{CPM_CLK_SCC2, CPM_CLK3, 6},
+		{CPM_CLK_SCC2, CPM_CLK4, 7},
+		{CPM_CLK_SCC3, CPM_BRG1, 0},
+		{CPM_CLK_SCC3, CPM_BRG2, 1},
+		{CPM_CLK_SCC3, CPM_BRG3, 2},
+		{CPM_CLK_SCC3, CPM_BRG4, 3},
+		{CPM_CLK_SCC3, CPM_CLK5, 4},
+		{CPM_CLK_SCC3, CPM_CLK6, 5},
+		{CPM_CLK_SCC3, CPM_CLK7, 6},
+		{CPM_CLK_SCC3, CPM_CLK8, 7},
+		{CPM_CLK_SCC4, CPM_BRG1, 0},
+		{CPM_CLK_SCC4, CPM_BRG2, 1},
+		{CPM_CLK_SCC4, CPM_BRG3, 2},
+		{CPM_CLK_SCC4, CPM_BRG4, 3},
+		{CPM_CLK_SCC4, CPM_CLK5, 4},
+		{CPM_CLK_SCC4, CPM_CLK6, 5},
+		{CPM_CLK_SCC4, CPM_CLK7, 6},
+		{CPM_CLK_SCC4, CPM_CLK8, 7},
+	};
 
 	im_cpmux = cpm2_map(im_cpmux);
 
@@ -203,13 +235,13 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
 	if (mode == CPM_CLK_RX)
 		shift +=3;
 
-	for (i=0; i<24; i++) {
+	for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
 		if (clk_map[i][0] == target && clk_map[i][1] == clock) {
 			bits = clk_map[i][2];
 			break;
 		}
 	}
-	if (i == sizeof(clk_map)/3)
+	if (i == ARRAY_SIZE(clk_map))
 	    ret = -EINVAL;
 
 	bits <<= shift;
-- 
1.5.0.3

[PATCH 27/61] cpm2: Fix whitespace in cpm2_clk_setup().

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/cpm2_common.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index 4e840bd..7e3a983 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -233,7 +233,7 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
 	}
 
 	if (mode == CPM_CLK_RX)
-		shift +=3;
+		shift += 3;
 
 	for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
 		if (clk_map[i][0] == target && clk_map[i][1] == clock) {
-- 
1.5.0.3

Re: [PATCH 27/61] cpm2: Fix whitespace in cpm2_clk_setup().

[Arnd Bergmann]

On Wednesday 18 July 2007, Scott Wood wrote:
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> =A0arch/powerpc/sysdev/cpm2_common.c | =A0 =A02 +-
> =A01 files changed, 1 insertions(+), 1 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2=
_common.c
> index 4e840bd..7e3a983 100644
> --- a/arch/powerpc/sysdev/cpm2_common.c
> +++ b/arch/powerpc/sysdev/cpm2_common.c
> @@ -233,7 +233,7 @@ int cpm2_clk_setup(enum cpm_clk_target target, int cl=
ock, int mode)
> =A0=A0=A0=A0=A0=A0=A0=A0}
> =A0
> =A0=A0=A0=A0=A0=A0=A0=A0if (mode =3D=3D CPM_CLK_RX)
> -=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0shift +=3D3;
> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0shift +=3D 3;
> =A0
> =A0=A0=A0=A0=A0=A0=A0=A0for (i =3D 0; i < ARRAY_SIZE(clk_map); i++) {
> =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0if (clk_map[i][0] =3D=3D =
target && clk_map[i][1] =3D=3D clock) {

While all your 61 patches look really good to me in general, I think you're=
 driving
the 'one patch per logical change' mantra a little too far. E.g. a number o=
f them
could simply have been consolidated under 'fix obvious coding style violati=
ons in
arch/powerpc'.

Having patches that fix a single whitespace bug only causes extra work for =
both
the author and the reviewer without much benefit.

	Arnd <><

[PATCH 28/61] Add cpm2_set_pin().

[Scott Wood]

This provides a generic way for board code to set up CPM pins, rather
than directly poking magic values into registers.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/cpm2_common.c |   28 ++++++++++++++++++++++++++++
 include/asm-ppc/cpm2.h            |    8 ++++++++
 2 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index 7e3a983..0a62df7 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -338,3 +338,31 @@ void *cpm_dpram_addr(unsigned long offset)
 	return (void *)(im_dprambase + offset);
 }
 EXPORT_SYMBOL(cpm_dpram_addr);
+
+struct cpm2_ioports {
+	u32	dir, par, sor, odr, dat;
+	u32	res[3];
+};
+
+void cpm2_set_pin(int port, int pin, int flags)
+{
+	struct cpm2_ioports __iomem *iop =
+		(struct cpm_ioports __iomem *)&cpm2_immr->im_ioport;
+
+	pin = 1 << (31 - pin);
+
+	if (flags & CPM_PIN_OUTPUT)
+		setbits32(&iop[port].dir, pin);
+	else
+		clrbits32(&iop[port].dir, pin);
+
+	if (!(flags & CPM_PIN_GPIO))
+		setbits32(&iop[port].par, pin);
+	else
+		clrbits32(&iop[port].par, pin);
+
+	if (flags & CPM_PIN_SECONDARY)
+		setbits32(&iop[port].sor, pin);
+	else
+		clrbits32(&iop[port].sor, pin);
+}
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index 12a2860..0e7ffb6 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -1244,5 +1244,13 @@ enum cpm_clk {
 
 extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);
 
+#define CPM_PIN_INPUT     0
+#define CPM_PIN_OUTPUT    1
+#define CPM_PIN_PRIMARY   0
+#define CPM_PIN_SECONDARY 2
+#define CPM_PIN_GPIO      4
+
+void cpm2_set_pin(int port, int pin, int flags);
+
 #endif /* __CPM2__ */
 #endif /* __KERNEL__ */
-- 
1.5.0.3

Re: [PATCH 28/61] Add cpm2_set_pin().

[Kumar Gala]

On Jul 17, 2007, at 8:35 PM, Scott Wood wrote:

> This provides a generic way for board code to set up CPM pins, rather
> than directly poking magic values into registers.
>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
>  arch/powerpc/sysdev/cpm2_common.c |   28 ++++++++++++++++++++++++++++
>  include/asm-ppc/cpm2.h            |    8 ++++++++
>  2 files changed, 36 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/ 
> sysdev/cpm2_common.c
> index 7e3a983..0a62df7 100644
> --- a/arch/powerpc/sysdev/cpm2_common.c
> +++ b/arch/powerpc/sysdev/cpm2_common.c
> @@ -338,3 +338,31 @@ void *cpm_dpram_addr(unsigned long offset)
>  	return (void *)(im_dprambase + offset);
>  }
>  EXPORT_SYMBOL(cpm_dpram_addr);
> +
> +struct cpm2_ioports {
> +	u32	dir, par, sor, odr, dat;

__be32?

> +	u32	res[3];
> +};
> +
> +void cpm2_set_pin(int port, int pin, int flags)

Can we make the function take a pointer to the port directly?

> +{
> +	struct cpm2_ioports __iomem *iop =
> +		(struct cpm_ioports __iomem *)&cpm2_immr->im_ioport;
> +
> +	pin = 1 << (31 - pin);
> +
> +	if (flags & CPM_PIN_OUTPUT)
> +		setbits32(&iop[port].dir, pin);
> +	else
> +		clrbits32(&iop[port].dir, pin);
> +
> +	if (!(flags & CPM_PIN_GPIO))
> +		setbits32(&iop[port].par, pin);
> +	else
> +		clrbits32(&iop[port].par, pin);
> +
> +	if (flags & CPM_PIN_SECONDARY)
> +		setbits32(&iop[port].sor, pin);
> +	else
> +		clrbits32(&iop[port].sor, pin);

should we only do this if !(flags & CPM_PIN_GPIO)?

Any reason we don't also set odr here?

> +}
> diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
> index 12a2860..0e7ffb6 100644
> --- a/include/asm-ppc/cpm2.h
> +++ b/include/asm-ppc/cpm2.h
> @@ -1244,5 +1244,13 @@ enum cpm_clk {
>
>  extern int cpm2_clk_setup(enum cpm_clk_target target, int clock,  
> int mode);
>
> +#define CPM_PIN_INPUT     0
> +#define CPM_PIN_OUTPUT    1
> +#define CPM_PIN_PRIMARY   0
> +#define CPM_PIN_SECONDARY 2
> +#define CPM_PIN_GPIO      4
> +
> +void cpm2_set_pin(int port, int pin, int flags);
> +
>  #endif /* __CPM2__ */
>  #endif /* __KERNEL__ */
> -- 
> 1.5.0.3
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

Re: [PATCH 28/61] Add cpm2_set_pin().

[Scott Wood]

Kumar Gala wrote:
> On Jul 17, 2007, at 8:35 PM, Scott Wood wrote:
>> +
>> +struct cpm2_ioports {
>> +    u32    dir, par, sor, odr, dat;
> 
> __be32?

OK.

>> +    u32    res[3];
>> +};
>> +
>> +void cpm2_set_pin(int port, int pin, int flags)
> 
> 
> Can we make the function take a pointer to the port directly?

I'd rather not -- it'd require the caller to use the immr struct 
directly, and either have no type checking, or different functions for 
different types of ports (on 8xx).

>> +{
>> +    struct cpm2_ioports __iomem *iop =
>> +        (struct cpm_ioports __iomem *)&cpm2_immr->im_ioport;
>> +
>> +    pin = 1 << (31 - pin);
>> +
>> +    if (flags & CPM_PIN_OUTPUT)
>> +        setbits32(&iop[port].dir, pin);
>> +    else
>> +        clrbits32(&iop[port].dir, pin);
>> +
>> +    if (!(flags & CPM_PIN_GPIO))
>> +        setbits32(&iop[port].par, pin);
>> +    else
>> +        clrbits32(&iop[port].par, pin);
>> +
>> +    if (flags & CPM_PIN_SECONDARY)
>> +        setbits32(&iop[port].sor, pin);
>> +    else
>> +        clrbits32(&iop[port].sor, pin);
> 
> 
> should we only do this if !(flags & CPM_PIN_GPIO)?

I don't think it matters.

> Any reason we don't also set odr here?

It wasn't clear to me when we need to set it.  I can add a flag for it, 
though.

-Scott

[PATCH 29/61] fsl_soc: Fix get_immrbase() to use ranges, rather than reg.

[Scott Wood]

It is not always the case that the SoC's first reg property points
to the beginning of the entire SoC block.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/fsl_soc.c |   15 ++++++++++++---
 1 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index c0ddc80..a837742 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -52,10 +52,19 @@ phys_addr_t get_immrbase(void)
 	soc = of_find_node_by_type(NULL, "soc");
 	if (soc) {
 		unsigned int size;
-		const void *prop = of_get_property(soc, "reg", &size);
+		u32 naddr;
+		const u32 *prop = of_get_property(soc, "#address-cells", &size);
+
+		if (prop && size == 4)
+			naddr = *prop;
+		else
+			naddr = 2;
+
+		prop = of_get_property(soc, "ranges", &size);
+
+		if (prop && size >= 12)
+			immrbase = of_translate_address(soc, prop + naddr);
 
-		if (prop)
-			immrbase = of_translate_address(soc, prop);
 		of_node_put(soc);
 	};
 
-- 
1.5.0.3

[PATCH 30/61] fsl_soc: Update the way get_brgfreq() finds things in the device tree.

[Scott Wood]

It now uses names that are less namespace polluting.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/dts/mpc8272ads.dts |    5 ++---
 arch/powerpc/boot/dts/mpc8560ads.dts |    5 ++---
 arch/powerpc/boot/dts/mpc866ads.dts  |    5 ++---
 arch/powerpc/boot/dts/mpc885ads.dts  |    5 ++---
 arch/powerpc/sysdev/fsl_soc.c        |   10 +++++-----
 5 files changed, 13 insertions(+), 17 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 4d09dca..16a77f4 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -119,12 +119,11 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			#interrupt-cells = <2>;
-			device_type = "cpm";
-			model = "CPM2";
+			compatible = "fsl,mpc8272-cpm", "fsl,cpm2", "fsl,cpm";
 			ranges = <00000000 00000000 20000>;
 			reg = <0 20000>;
 			command-proc = <119c0>;
-			brg-frequency = <17D7840>;
+			fsl,brg-frequency = <d#25000000>;
 			cpm_clk = <BEBC200>;
 
 			scc@11a00 {
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 21ccaaa..1626587 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -235,12 +235,11 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			#interrupt-cells = <2>;
-			device_type = "cpm";
-			model = "CPM2";
+			compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "fsl,cpm";
 			ranges = <0 0 c0000>;
 			reg = <80000 40000>;
 			command-proc = <919c0>;
-			brg-frequency = <9d5b340>;
+			fsl,brg-frequency = <d#165000000>;
 
 			cpmpic: pic@90c00 {
 				interrupt-controller;
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index e5e7726..b3dbfe8 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -87,12 +87,11 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			#interrupt-cells = <2>;
-			device_type = "cpm";
-			model = "CPM";
+			compatible = "fsl,mpc866-cpm", "fsl,cpm1", "fsl,cpm";
 			ranges = <0 0 4000>;
 			reg = <860 f0>;
 			command-proc = <9c0>;
-			brg-frequency = <0>;
+			fsl,brg-frequency = <0>;
 			interrupts = <0 2>;	// cpm error interrupt
 			interrupt-parent = <&Cpm_pic>;
 
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index dc7ab9c..8372469 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -118,12 +118,11 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			#interrupt-cells = <2>;
-			device_type = "cpm";
-			model = "CPM";
+			compatible = "fsl,mpc885-cpm", "fsl,cpm1", "fsl,cpm";
 			ranges = <0 0 4000>;
 			reg = <860 f0>;
 			command-proc = <9c0>;
-			brg-frequency = <0>;
+			fsl,brg-frequency = <0>;
 			interrupts = <0 2>;	// cpm error interrupt
 			interrupt-parent = <&Cpm_pic>;
 
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index a837742..ff70d62 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -84,16 +84,16 @@ u32 get_brgfreq(void)
 	if (brgfreq != -1)
 		return brgfreq;
 
-	node = of_find_node_by_type(NULL, "cpm");
+	node = of_find_compatible_node(NULL, NULL, "fsl,cpm");
 	if (node) {
 		unsigned int size;
-		const unsigned int *prop = of_get_property(node,
-					"brg-frequency", &size);
+		const unsigned int *prop =
+			of_get_property(node, "fsl,brg-frequency", &size);
 
-		if (prop)
+		if (prop && size == 4)
 			brgfreq = *prop;
 		of_node_put(node);
-	};
+	}
 
 	return brgfreq;
 }
-- 
1.5.0.3

Re: [PATCH 30/61] fsl_soc: Update the way get_brgfreq() finds things in the device tree.

[Kumar Gala]

On Jul 17, 2007, at 8:35 PM, Scott Wood wrote:

> It now uses names that are less namespace polluting.
>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
>  arch/powerpc/boot/dts/mpc8272ads.dts |    5 ++---
>  arch/powerpc/boot/dts/mpc8560ads.dts |    5 ++---
>  arch/powerpc/boot/dts/mpc866ads.dts  |    5 ++---
>  arch/powerpc/boot/dts/mpc885ads.dts  |    5 ++---
>  arch/powerpc/sysdev/fsl_soc.c        |   10 +++++-----
>  5 files changed, 13 insertions(+), 17 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/ 
> boot/dts/mpc8272ads.dts
> index 4d09dca..16a77f4 100644
> --- a/arch/powerpc/boot/dts/mpc8272ads.dts
> +++ b/arch/powerpc/boot/dts/mpc8272ads.dts
> @@ -119,12 +119,11 @@
>  			#address-cells = <1>;
>  			#size-cells = <1>;
>  			#interrupt-cells = <2>;
> -			device_type = "cpm";
> -			model = "CPM2";
> +			compatible = "fsl,mpc8272-cpm", "fsl,cpm2", "fsl,cpm";

Does 'fsl,cpm' really mean anything useful?

>  			ranges = <00000000 00000000 20000>;
>  			reg = <0 20000>;
>  			command-proc = <119c0>;
> -			brg-frequency = <17D7840>;
> +			fsl,brg-frequency = <d#25000000>;

Leave brg-frequency, and make a note about it being deprecated.

>  			cpm_clk = <BEBC200>;
>
>  			scc@11a00 {


> diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/ 
> fsl_soc.c
> index a837742..ff70d62 100644
> --- a/arch/powerpc/sysdev/fsl_soc.c
> +++ b/arch/powerpc/sysdev/fsl_soc.c
> @@ -84,16 +84,16 @@ u32 get_brgfreq(void)
>  	if (brgfreq != -1)
>  		return brgfreq;
>
> -	node = of_find_node_by_type(NULL, "cpm");
> +	node = of_find_compatible_node(NULL, NULL, "fsl,cpm");
>  	if (node) {
>  		unsigned int size;
> -		const unsigned int *prop = of_get_property(node,
> -					"brg-frequency", &size);
> +		const unsigned int *prop =
> +			of_get_property(node, "fsl,brg-frequency", &size);

We need to support both "brg-frequency" and "fsl,brg-frequency" for  
some period of time.

Also, take a look at QE it has a similar concept.

>
> -		if (prop)
> +		if (prop && size == 4)
>  			brgfreq = *prop;
>  		of_node_put(node);
> -	};
> +	}
>
>  	return brgfreq;
>  }
> -- 
> 1.5.0.3
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

Re: [PATCH 30/61] fsl_soc: Update the way get_brgfreq() finds things in the device tree.

[Scott Wood]

Kumar Gala wrote:
>> diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/ 
>> boot/dts/mpc8272ads.dts
>> index 4d09dca..16a77f4 100644
>> --- a/arch/powerpc/boot/dts/mpc8272ads.dts
>> +++ b/arch/powerpc/boot/dts/mpc8272ads.dts
>> @@ -119,12 +119,11 @@
>>              #address-cells = <1>;
>>              #size-cells = <1>;
>>              #interrupt-cells = <2>;
>> -            device_type = "cpm";
>> -            model = "CPM2";
>> +            compatible = "fsl,mpc8272-cpm", "fsl,cpm2", "fsl,cpm";
> 
> Does 'fsl,cpm' really mean anything useful?

Yes.  It's can't be used on its own to show the complete programming 
model, but there are lots of common things that it does indicate.

get_brgfreq() uses it to locate nodes which have an fsl,brg-frequency 
property.

>>              ranges = <00000000 00000000 20000>;
>>              reg = <0 20000>;
>>              command-proc = <119c0>;
>> -            brg-frequency = <17D7840>;
>> +            fsl,brg-frequency = <d#25000000>;
> 
> Leave brg-frequency, and make a note about it being deprecated.

The CPM binding is changed in so many other ways that are much harder to 
make backward compatible that I don't really see much point in doing so 
here.

> Also, take a look at QE it has a similar concept.

It'd be nice to extend this binding to include QE (and at some point 
down the road, merge the code)...  I just didn't have time this time around.

-Scott

Re: [PATCH 30/61] fsl_soc: Update the way get_brgfreq() finds things in the device tree.

[Kumar Gala]

On Jul 18, 2007, at 11:32 AM, Scott Wood wrote:

> Kumar Gala wrote:
>>> diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/  
>>> boot/dts/mpc8272ads.dts
>>> index 4d09dca..16a77f4 100644
>>> --- a/arch/powerpc/boot/dts/mpc8272ads.dts
>>> +++ b/arch/powerpc/boot/dts/mpc8272ads.dts
>>> @@ -119,12 +119,11 @@
>>>              #address-cells = <1>;
>>>              #size-cells = <1>;
>>>              #interrupt-cells = <2>;
>>> -            device_type = "cpm";
>>> -            model = "CPM2";
>>> +            compatible = "fsl,mpc8272-cpm", "fsl,cpm2", "fsl,cpm";
>> Does 'fsl,cpm' really mean anything useful?
>
> Yes.  It's can't be used on its own to show the complete  
> programming model, but there are lots of common things that it does  
> indicate.
>
> get_brgfreq() uses it to locate nodes which have an fsl,brg- 
> frequency property.

I think we should introduce 'fsl,cpm' in a second pass once its clear  
what all the common points are.  We can than also see if QE fits into  
it at that point.

>
>>>              ranges = <00000000 00000000 20000>;
>>>              reg = <0 20000>;
>>>              command-proc = <119c0>;
>>> -            brg-frequency = <17D7840>;
>>> +            fsl,brg-frequency = <d#25000000>;
>> Leave brg-frequency, and make a note about it being deprecated.
>
> The CPM binding is changed in so many other ways that are much  
> harder to make backward compatible that I don't really see much  
> point in doing so here.

Can you enumerate some of the other changes.

>> Also, take a look at QE it has a similar concept.
>
> It'd be nice to extend this binding to include QE (and at some  
> point down the road, merge the code)...  I just didn't have time  
> this time around.

Understand.

As I stated above, I think we should drop 'fsl,cpm' for now until we  
can come up with a good defn. of what it means rather than a  
convenience to mean (fsl-cpm2 and fsl-cpm1).

- k

Re: [PATCH 30/61] fsl_soc: Update the way get_brgfreq() finds things in the device tree.

[Scott Wood]

Kumar Gala wrote:
> On Jul 18, 2007, at 11:32 AM, Scott Wood wrote:
>> Kumar Gala wrote:
>>> Does 'fsl,cpm' really mean anything useful?
>>
>> Yes.  It's can't be used on its own to show the complete  programming 
>> model, but there are lots of common things that it does  indicate.
>>
>> get_brgfreq() uses it to locate nodes which have an fsl,brg- frequency 
>> property.
> 
> I think we should introduce 'fsl,cpm' in a second pass once its clear  
> what all the common points are.  We can than also see if QE fits into  
> it at that point.

Upon further thought (and upon being clearly outvoted), I agree -- 
what's common among CPMs today may not be among future CPMs/QEs.  In the 
absence of a commitment from marketing to call it something else if 
certain things change, it's no more meaningful than "xx"-type names.

>> The CPM binding is changed in so many other ways that are much  harder 
>> to make backward compatible that I don't really see much  point in 
>> doing so here.
> 
> Can you enumerate some of the other changes.

The hardest would probably be the PCI node, whose reg property 
definition changed (the previous tree was including other things, such 
as DMA controllers, in the PCI register resource).  The CPM node also 
had its reg property changed, though I don't think anything was using it 
yet.  The old way of specifying the 8272ads BCSR (in the /memory node) 
is just too broken to leave in the device tree.

The old compatible names and custom properties could be left in for a 
little while for existing boards, though.

-Scott

Re: [PATCH 30/61] fsl_soc: Update the way get_brgfreq() finds things in the device tree.

[Segher Boessenkool]

>>> -            device_type = "cpm";
>>> -            model = "CPM2";
>>> +            compatible = "fsl,mpc8272-cpm", "fsl,cpm2", "fsl,cpm";
>>
>> Does 'fsl,cpm' really mean anything useful?
>
> Yes.  It's can't be used on its own to show the complete programming
> model,

So please remove it.

> but there are lots of common things that it does indicate.

These common things can be detected differently; if all else
fails, just look for a few different "compatible" entries.

> The CPM binding is changed in so many other ways that are much  
> harder to
> make backward compatible that I don't really see much point in  
> doing so
> here.
>
>> Also, take a look at QE it has a similar concept.
>
> It'd be nice to extend this binding to include QE (and at some point
> down the road, merge the code)...  I just didn't have time this  
> time around.

If you think you'll have to seriously revise the binding again,
please mark that clearly in the documentation (there _is_
documentation, right?), so no one can complain if you break
compatibility later.


Segher

[PATCH 31/61] mpc8272ads: Check the board in the probe function.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/dts/mpc8272ads.dts     |    2 +-
 arch/powerpc/platforms/82xx/mpc8272ads.c |    7 ++-----
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 16a77f4..8c69cd0 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -11,7 +11,7 @@
 
 / {
 	model = "MPC8272ADS";
-	compatible = "MPC8260ADS";
+	compatible = "fsl,mpc8272ads";
 	#address-cells = <1>;
 	#size-cells = <1>;
 
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index 29c2932..fbf9c67 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -599,11 +599,8 @@ static void __init mpc8272ads_setup_arch(void)
  */
 static int __init mpc8272ads_probe(void)
 {
-	/* We always match for now, eventually we should look at
-	 * the flat dev tree to ensure this is the board we are
-	 * supposed to run on
-	 */
-	return 1;
+	unsigned long root = of_get_flat_dt_root();
+	return of_flat_dt_is_compatible(root, "fsl,mpc8272ads");
 }
 
 #define RMR_CSRE 0x00000001
-- 
1.5.0.3

Re: [PATCH 31/61] mpc8272ads: Check the board in the probe function.

[David Gibson]

On Tue, Jul 17, 2007 at 08:35:39PM -0500, Scott Wood wrote:
> Signed-off-by: Scott Wood <scottwood@freescale.com>

Acked-by: David Gibson <david@gibson.dropbear.id.au>

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

[PATCH 32/61] mpc82xx: Move PQ2 restart and halt functions out of mpc8272-specific code.

[Scott Wood]

I renamed it from m82xx to pq2 because it won't work on the Integrated
Host Processor line of 82xx chips (i.e. 8240, 8245, and such).

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/platforms/82xx/Makefile     |    1 +
 arch/powerpc/platforms/82xx/mpc8272ads.c |   27 ++----------------
 arch/powerpc/platforms/82xx/pq2.c        |   44 ++++++++++++++++++++++++++++++
 arch/powerpc/platforms/82xx/pq2.h        |    7 +++++
 include/asm-ppc/immap_cpm2.h             |    2 +
 5 files changed, 57 insertions(+), 24 deletions(-)
 create mode 100644 arch/powerpc/platforms/82xx/pq2.c
 create mode 100644 arch/powerpc/platforms/82xx/pq2.h

diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index 881a3f6..6049640 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -3,3 +3,4 @@
 #
 obj-$(CONFIG_PPC_82xx) += mpc82xx.o
 obj-$(CONFIG_MPC8272ADS) += mpc8272ads.o
+obj-$(CONFIG_CPM2) += pq2.o
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index fbf9c67..cd14a48 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -2,7 +2,6 @@
  * MPC8272ADS setup and early boot code plus other random bits.
  *
  * Author: Vitaly Bordug <vbordug@ru.mvista.com>
- * m82xx_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
  *
  * Copyright (c) 2006 MontaVista Software, Inc.
  *
@@ -42,6 +41,7 @@
 #include <asm/mpc8260.h>
 #include <asm/irq.h>
 #include <mm/mmu_decl.h>
+#include <platforms/82xx/pq2.h>
 #include <asm/prom.h>
 #include <asm/cpm2.h>
 #include <asm/udbg.h>
@@ -603,27 +603,6 @@ static int __init mpc8272ads_probe(void)
 	return of_flat_dt_is_compatible(root, "fsl,mpc8272ads");
 }
 
-#define RMR_CSRE 0x00000001
-static void m82xx_restart(char *cmd)
-{
-	__volatile__ unsigned char dummy;
-
-	local_irq_disable();
-	((cpm2_map_t *) cpm2_immr)->im_clkrst.car_rmr |= RMR_CSRE;
-
-	/* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
-	mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
-	dummy = ((cpm2_map_t *) cpm2_immr)->im_clkrst.res[0];
-	printk("Restart failed\n");
-	while (1) ;
-}
-
-static void m82xx_halt(void)
-{
-	local_irq_disable();
-	while (1) ;
-}
-
 define_machine(mpc8272ads)
 {
 	.name = "Freescale MPC8272ADS",
@@ -633,6 +612,6 @@ define_machine(mpc8272ads)
 	.show_cpuinfo = m82xx_show_cpuinfo,
 	.get_irq = cpm2_get_irq,
 	.calibrate_decr = m82xx_calibrate_decr,
-	.restart = m82xx_restart,
-	.halt = m82xx_halt,
+	.restart = pq2_restart,
+	.halt = pq2_halt,
 };
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
new file mode 100644
index 0000000..e58980d
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -0,0 +1,44 @@
+/*
+ * Common PowerQUICC II code.
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ * Copyright (c) 2007 Freescale Semiconductor
+ *
+ * Based on code by Vitaly Bordug <vbordug@ru.mvista.com>
+ * pq2_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
+ * Copyright (c) 2006 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <asm/cpm2.h>
+#include <asm/io.h>
+#include <asm/system.h>
+
+#include <platforms/82xx/pq2.h>
+
+#define RMR_CSRE 0x00000001
+
+void pq2_restart(char *cmd)
+{
+	local_irq_disable();
+	cpm2_immr->im_clkrst.car_rmr |= RMR_CSRE;
+
+	/* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
+	mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
+	in_8(&cpm2_immr->im_clkrst.res[0]);
+
+	printk("Restart failed\n");
+	while (1)
+		;
+}
+
+void pq2_halt(void)
+{
+	local_irq_disable();
+	while (1)
+		;
+}
diff --git a/arch/powerpc/platforms/82xx/pq2.h b/arch/powerpc/platforms/82xx/pq2.h
new file mode 100644
index 0000000..3c9620f
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/pq2.h
@@ -0,0 +1,7 @@
+#ifndef _PQ2_H
+#define _PQ2_H
+
+void pq2_restart(char *cmd);
+void pq2_halt(void);
+
+#endif
diff --git a/include/asm-ppc/immap_cpm2.h b/include/asm-ppc/immap_cpm2.h
index 3c23d9c..8795bcc 100644
--- a/include/asm-ppc/immap_cpm2.h
+++ b/include/asm-ppc/immap_cpm2.h
@@ -10,6 +10,8 @@
 #ifndef __IMMAP_CPM2__
 #define __IMMAP_CPM2__
 
+#include <linux/types.h>
+
 /* System configuration registers.
 */
 typedef	struct sys_82xx_conf {
-- 
1.5.0.3

Re: [PATCH 32/61] mpc82xx: Move PQ2 restart and halt functions out of mpc8272-specific code.

[Kumar Gala]

On Jul 17, 2007, at 8:35 PM, Scott Wood wrote:

> I renamed it from m82xx to pq2 because it won't work on the Integrated
> Host Processor line of 82xx chips (i.e. 8240, 8245, and such).
>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
>  arch/powerpc/platforms/82xx/Makefile     |    1 +
>  arch/powerpc/platforms/82xx/mpc8272ads.c |   27 ++----------------
>  arch/powerpc/platforms/82xx/pq2.c        |   44 +++++++++++++++++++ 
> +++++++++++
>  arch/powerpc/platforms/82xx/pq2.h        |    7 +++++
>  include/asm-ppc/immap_cpm2.h             |    2 +
>  5 files changed, 57 insertions(+), 24 deletions(-)
>  create mode 100644 arch/powerpc/platforms/82xx/pq2.c
>  create mode 100644 arch/powerpc/platforms/82xx/pq2.h
>
> diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/ 
> platforms/82xx/Makefile
> index 881a3f6..6049640 100644
> --- a/arch/powerpc/platforms/82xx/Makefile
> +++ b/arch/powerpc/platforms/82xx/Makefile
> @@ -3,3 +3,4 @@
>  #
>  obj-$(CONFIG_PPC_82xx) += mpc82xx.o
>  obj-$(CONFIG_MPC8272ADS) += mpc8272ads.o
> +obj-$(CONFIG_CPM2) += pq2.o
> diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/ 
> powerpc/platforms/82xx/mpc8272ads.c
> index fbf9c67..cd14a48 100644
> --- a/arch/powerpc/platforms/82xx/mpc8272ads.c
> +++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
> @@ -2,7 +2,6 @@
>   * MPC8272ADS setup and early boot code plus other random bits.
>   *
>   * Author: Vitaly Bordug <vbordug@ru.mvista.com>
> - * m82xx_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
>   *
>   * Copyright (c) 2006 MontaVista Software, Inc.
>   *
> @@ -42,6 +41,7 @@
>  #include <asm/mpc8260.h>
>  #include <asm/irq.h>
>  #include <mm/mmu_decl.h>
> +#include <platforms/82xx/pq2.h>
>  #include <asm/prom.h>
>  #include <asm/cpm2.h>
>  #include <asm/udbg.h>
> @@ -603,27 +603,6 @@ static int __init mpc8272ads_probe(void)
>  	return of_flat_dt_is_compatible(root, "fsl,mpc8272ads");
>  }
>
> -#define RMR_CSRE 0x00000001
> -static void m82xx_restart(char *cmd)
> -{
> -	__volatile__ unsigned char dummy;
> -
> -	local_irq_disable();
> -	((cpm2_map_t *) cpm2_immr)->im_clkrst.car_rmr |= RMR_CSRE;
> -
> -	/* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
> -	mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
> -	dummy = ((cpm2_map_t *) cpm2_immr)->im_clkrst.res[0];
> -	printk("Restart failed\n");
> -	while (1) ;
> -}
> -
> -static void m82xx_halt(void)
> -{
> -	local_irq_disable();
> -	while (1) ;
> -}
> -
>  define_machine(mpc8272ads)
>  {
>  	.name = "Freescale MPC8272ADS",
> @@ -633,6 +612,6 @@ define_machine(mpc8272ads)
>  	.show_cpuinfo = m82xx_show_cpuinfo,
>  	.get_irq = cpm2_get_irq,
>  	.calibrate_decr = m82xx_calibrate_decr,
> -	.restart = m82xx_restart,
> -	.halt = m82xx_halt,
> +	.restart = pq2_restart,
> +	.halt = pq2_halt,
>  };
> diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/ 
> platforms/82xx/pq2.c
> new file mode 100644
> index 0000000..e58980d
> --- /dev/null
> +++ b/arch/powerpc/platforms/82xx/pq2.c
> @@ -0,0 +1,44 @@
> +/*
> + * Common PowerQUICC II code.
> + *
> + * Author: Scott Wood <scottwood@freescale.com>
> + * Copyright (c) 2007 Freescale Semiconductor
> + *
> + * Based on code by Vitaly Bordug <vbordug@ru.mvista.com>
> + * pq2_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
> + * Copyright (c) 2006 MontaVista Software, Inc.
> + *
> + * This program is free software; you can redistribute  it and/or  
> modify it
> + * under  the terms of  the GNU General  Public License as  
> published by the
> + * Free Software Foundation;  either version 2 of the  License, or  
> (at your
> + * option) any later version.
> + */
> +
> +#include <asm/cpm2.h>
> +#include <asm/io.h>
> +#include <asm/system.h>
> +
> +#include <platforms/82xx/pq2.h>
> +
> +#define RMR_CSRE 0x00000001
> +
> +void pq2_restart(char *cmd)
> +{
> +	local_irq_disable();
> +	cpm2_immr->im_clkrst.car_rmr |= RMR_CSRE;
> +
> +	/* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
> +	mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
> +	in_8(&cpm2_immr->im_clkrst.res[0]);
> +
> +	printk("Restart failed\n");
> +	while (1)
> +		;
> +}
> +
> +void pq2_halt(void)
> +{
> +	local_irq_disable();
> +	while (1)
> +		;
> +}

Kill pq2_halt, if this is all it does just dont set ppc_md.halt() and  
get the generic behavior which is the same.

> diff --git a/arch/powerpc/platforms/82xx/pq2.h b/arch/powerpc/ 
> platforms/82xx/pq2.h
> new file mode 100644
> index 0000000..3c9620f
> --- /dev/null
> +++ b/arch/powerpc/platforms/82xx/pq2.h
> @@ -0,0 +1,7 @@
> +#ifndef _PQ2_H
> +#define _PQ2_H
> +
> +void pq2_restart(char *cmd);
> +void pq2_halt(void);
> +
> +#endif
> diff --git a/include/asm-ppc/immap_cpm2.h b/include/asm-ppc/ 
> immap_cpm2.h
> index 3c23d9c..8795bcc 100644
> --- a/include/asm-ppc/immap_cpm2.h
> +++ b/include/asm-ppc/immap_cpm2.h
> @@ -10,6 +10,8 @@
>  #ifndef __IMMAP_CPM2__
>  #define __IMMAP_CPM2__
>
> +#include <linux/types.h>
> +

Why was this needed all of a sudden?

>  /* System configuration registers.
>  */
>  typedef	struct sys_82xx_conf {

- k

Re: [PATCH 32/61] mpc82xx: Move PQ2 restart and halt functions out of mpc8272-specific code.

[Scott Wood]

Kumar Gala wrote:
> Kill pq2_halt, if this is all it does just dont set ppc_md.halt() and  
> get the generic behavior which is the same.

OK.

>> diff --git a/include/asm-ppc/immap_cpm2.h b/include/asm-ppc/ immap_cpm2.h
>> index 3c23d9c..8795bcc 100644
>> --- a/include/asm-ppc/immap_cpm2.h
>> +++ b/include/asm-ppc/immap_cpm2.h
>> @@ -10,6 +10,8 @@
>>  #ifndef __IMMAP_CPM2__
>>  #define __IMMAP_CPM2__
>>
>> +#include <linux/types.h>
>> +
> 
> 
> Why was this needed all of a sudden?

It uses types without including any headers.  It's always been needed, 
we just got away with it before because the file including immap_cpm2.h 
included other stuff earlier.

-Scott

[PATCH 33/61] mpc82xx: Remove a bunch of cruft that duplicates generic functionality.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/platforms/82xx/mpc8272ads.c |   37 ++------------
 arch/powerpc/platforms/82xx/mpc82xx.c    |   76 +-----------------------------
 arch/powerpc/platforms/82xx/pq2ads.h     |    5 --
 3 files changed, 7 insertions(+), 111 deletions(-)

diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index cd14a48..b23fa73 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -11,42 +11,21 @@
  * option) any later version.
  */
 
-#include <linux/stddef.h>
-#include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
 #include <linux/interrupt.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
 #include <linux/fsl_devices.h>
 #include <linux/fs_uart_pd.h>
+#include <linux/fs_enet_pd.h>
 
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
 #include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/bootinfo.h>
 #include <asm/pci-bridge.h>
 #include <asm/mpc8260.h>
-#include <asm/irq.h>
-#include <mm/mmu_decl.h>
-#include <platforms/82xx/pq2.h>
-#include <asm/prom.h>
 #include <asm/cpm2.h>
 #include <asm/udbg.h>
 #include <asm/i8259.h>
-#include <linux/fs_enet_pd.h>
+#include <asm/time.h>
+
+#include <platforms/82xx/pq2.h>
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/cpm2_pic.h>
@@ -584,12 +563,6 @@ static void __init mpc8272ads_setup_arch(void)
 	of_node_put(np);
 #endif
 
-#ifdef  CONFIG_ROOT_NFS
-	ROOT_DEV = Root_NFS;
-#else
-	ROOT_DEV = Root_HDA1;
-#endif
-
 	if (ppc_md.progress)
 		ppc_md.progress("mpc8272ads_setup_arch(), finish", 0);
 }
@@ -611,7 +584,7 @@ define_machine(mpc8272ads)
 	.init_IRQ = mpc8272ads_pic_init,
 	.show_cpuinfo = m82xx_show_cpuinfo,
 	.get_irq = cpm2_get_irq,
-	.calibrate_decr = m82xx_calibrate_decr,
+	.calibrate_decr = generic_calibrate_decr,
 	.restart = pq2_restart,
 	.halt = pq2_halt,
 };
diff --git a/arch/powerpc/platforms/82xx/mpc82xx.c b/arch/powerpc/platforms/82xx/mpc82xx.c
index a2a9c8d..1d3d0e9 100644
--- a/arch/powerpc/platforms/82xx/mpc82xx.c
+++ b/arch/powerpc/platforms/82xx/mpc82xx.c
@@ -11,82 +11,10 @@
  * option) any later version.
  */
 
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
 #include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
-#include <linux/fsl_devices.h>
-#include <linux/fs_uart_pd.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc8260.h>
-#include <asm/irq.h>
 #include <mm/mmu_decl.h>
-#include <asm/prom.h>
-#include <asm/cpm2.h>
-#include <asm/udbg.h>
-#include <asm/i8259.h>
-#include <linux/fs_enet_pd.h>
-
-#include <sysdev/fsl_soc.h>
-#include <sysdev/cpm2_pic.h>
-
-#include "pq2ads.h"
-
-static int __init get_freq(char *name, unsigned long *val)
-{
-	struct device_node *cpu;
-	const unsigned int *fp;
-	int found = 0;
-
-	/* The cpu node should have timebase and clock frequency properties */
-	cpu = of_find_node_by_type(NULL, "cpu");
-
-	if (cpu) {
-		fp = of_get_property(cpu, name, NULL);
-		if (fp) {
-			found = 1;
-			*val = *fp;
-		}
-
-		of_node_put(cpu);
-	}
-
-	return found;
-}
-
-void __init m82xx_calibrate_decr(void)
-{
-	ppc_tb_freq = 125000000;
-	if (!get_freq("bus-frequency", &ppc_tb_freq)) {
-		printk(KERN_ERR "WARNING: Estimating decrementer frequency "
-				"(not found)\n");
-	}
-	ppc_tb_freq /= 4;
-	ppc_proc_freq = 1000000000;
-	if (!get_freq("clock-frequency", &ppc_proc_freq))
-		printk(KERN_ERR "WARNING: Estimating processor frequency"
-				"(not found)\n");
-}
+#include <asm/machdep.h>
+#include <asm/system.h>
 
 void m82xx_show_cpuinfo(struct seq_file *m)
 {
diff --git a/arch/powerpc/platforms/82xx/pq2ads.h b/arch/powerpc/platforms/82xx/pq2ads.h
index 4802292..4546ce6 100644
--- a/arch/powerpc/platforms/82xx/pq2ads.h
+++ b/arch/powerpc/platforms/82xx/pq2ads.h
@@ -25,10 +25,6 @@
 #include <linux/seq_file.h>
 #include <asm/ppcboot.h>
 
-/* For our show_cpuinfo hooks. */
-#define CPUINFO_VENDOR		"Freescale Semiconductor"
-#define CPUINFO_MACHINE		"PQ2 ADS PowerPC"
-
 /* Backword-compatibility stuff for the drivers */
 #define CPM_MAP_ADDR		((uint)0xf0000000)
 #define CPM_IRQ_OFFSET 0
@@ -60,7 +56,6 @@
 
 void m82xx_pci_init_irq(void);
 void m82xx_show_cpuinfo(struct seq_file *);
-void m82xx_calibrate_decr(void);
 
 #endif /* __MACH_ADS8260_DEFS */
 #endif /* __KERNEL__ */
-- 
1.5.0.3

[PATCH 34/61] cpm2: Use the global cpm2_immr rather than ioremapping() all over the place.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 include/asm-powerpc/fs_pd.h |   19 +++----------------
 1 files changed, 3 insertions(+), 16 deletions(-)

diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h
index c624915..2179a5a 100644
--- a/include/asm-powerpc/fs_pd.h
+++ b/include/asm-powerpc/fs_pd.h
@@ -23,22 +23,9 @@
 #include <asm/mpc85xx.h>
 #endif
 
-#define cpm2_map(member)						\
-({									\
-	u32 offset = offsetof(cpm2_map_t, member);			\
-	void *addr = ioremap (CPM_MAP_ADDR + offset,			\
-			      sizeof( ((cpm2_map_t*)0)->member));	\
-	addr;								\
-})
-
-#define cpm2_map_size(member, size)					\
-({									\
-	u32 offset = offsetof(cpm2_map_t, member);			\
-	void *addr = ioremap (CPM_MAP_ADDR + offset, size);		\
-	addr;								\
-})
-
-#define cpm2_unmap(addr)	iounmap(addr)
+#define cpm2_map(member) (&cpm2_immr->member)
+#define cpm2_map_size(member, size) (&cpm2_immr->member)
+#define cpm2_unmap(addr) do {} while(0)
 #endif
 
 #ifdef CONFIG_8xx
-- 
1.5.0.3

[PATCH 35/61] 82xx: Factor PCI PIC out of 8272ads code.

[Scott Wood]

The same PIC exists on other boards, such as the PQ2FADS.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/Kconfig                         |    2 +-
 arch/powerpc/platforms/82xx/Kconfig          |    4 +
 arch/powerpc/platforms/82xx/Makefile         |    1 +
 arch/powerpc/platforms/82xx/mpc8272ads.c     |  190 +------------------------
 arch/powerpc/platforms/82xx/pq2.h            |    9 ++
 arch/powerpc/platforms/82xx/pq2ads-pci-pic.c |  200 ++++++++++++++++++++++++++
 6 files changed, 218 insertions(+), 188 deletions(-)
 create mode 100644 arch/powerpc/platforms/82xx/pq2ads-pci-pic.c

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index cbfbd98..1a96260 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -458,7 +458,7 @@ config PCI_8260
 
 config 8260_PCI9
 	bool "Enable workaround for MPC826x erratum PCI 9"
-	depends on PCI_8260 && !ADS8272
+	depends on PCI_8260 && !8272
 	default y
 
 choice
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index b4af8c2..428e1e5 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -10,6 +10,7 @@ config MPC8272ADS
 	select 8272
 	select 8260
 	select FSL_SOC
+	select PQ2_ADS_PCI_PIC if PCI
 	help
 	This option enables support for the MPC8272 ADS board
 
@@ -34,3 +35,6 @@ config 8272
 	help
 	  The MPC8272 CPM has a different internal dpram setup than other CPM2
 	  devices
+
+config PQ2_ADS_PCI_PIC
+	bool
diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index 6049640..57c9e1d 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -4,3 +4,4 @@
 obj-$(CONFIG_PPC_82xx) += mpc82xx.o
 obj-$(CONFIG_MPC8272ADS) += mpc8272ads.o
 obj-$(CONFIG_CPM2) += pq2.o
+obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index b23fa73..e5b7a0f 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -31,18 +31,7 @@
 #include <sysdev/cpm2_pic.h>
 
 #include "pq2ads.h"
-
-#ifdef CONFIG_PCI
-static uint pci_clk_frq;
-static struct {
-	unsigned long *pci_int_stat_reg;
-	unsigned long *pci_int_mask_reg;
-} pci_regs;
-
-static unsigned long pci_int_base;
-static struct irq_host *pci_pic_host;
-static struct device_node *pci_pic_node;
-#endif
+#include "pq2.h"
 
 static void __init mpc8272ads_pic_init(void)
 {
@@ -68,10 +57,9 @@ static void __init mpc8272ads_pic_init(void)
 	cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
 	cpm_reg->im_intctl.ic_siprr = 0x05309770;
 	iounmap(cpm_reg);
-#ifdef CONFIG_PCI
+
 	/* Initialize stuff for the 82xx CPLD IC and install demux  */
-	m82xx_pci_init_irq();
-#endif
+	pq2ads_pci_init_irq();
 }
 
 static void init_fcc1_ioports(struct fs_platform_info *fpi)
@@ -315,177 +303,6 @@ void __init mpc8272ads_board_setup(void)
 }
 
 #ifdef CONFIG_PCI
-static void m82xx_pci_mask_irq(unsigned int irq)
-{
-	int bit = irq - pci_int_base;
-
-	*pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
-	return;
-}
-
-static void m82xx_pci_unmask_irq(unsigned int irq)
-{
-	int bit = irq - pci_int_base;
-
-	*pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
-	return;
-}
-
-static void m82xx_pci_mask_and_ack(unsigned int irq)
-{
-	int bit = irq - pci_int_base;
-
-	*pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
-	return;
-}
-
-static void m82xx_pci_end_irq(unsigned int irq)
-{
-	int bit = irq - pci_int_base;
-
-	*pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
-	return;
-}
-
-struct hw_interrupt_type m82xx_pci_ic = {
-	.typename = "MPC82xx ADS PCI",
-	.name = "MPC82xx ADS PCI",
-	.enable = m82xx_pci_unmask_irq,
-	.disable = m82xx_pci_mask_irq,
-	.ack = m82xx_pci_mask_and_ack,
-	.end = m82xx_pci_end_irq,
-	.mask = m82xx_pci_mask_irq,
-	.mask_ack = m82xx_pci_mask_and_ack,
-	.unmask = m82xx_pci_unmask_irq,
-	.eoi = m82xx_pci_end_irq,
-};
-
-static void
-m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
-{
-	unsigned long stat, mask, pend;
-	int bit;
-
-	for (;;) {
-		stat = *pci_regs.pci_int_stat_reg;
-		mask = *pci_regs.pci_int_mask_reg;
-		pend = stat & ~mask & 0xf0000000;
-		if (!pend)
-			break;
-		for (bit = 0; pend != 0; ++bit, pend <<= 1) {
-			if (pend & 0x80000000)
-				__do_IRQ(pci_int_base + bit);
-		}
-	}
-}
-
-static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
-{
-	return node == pci_pic_node;
-}
-
-static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
-			    irq_hw_number_t hw)
-{
-	get_irq_desc(virq)->status |= IRQ_LEVEL;
-	set_irq_chip(virq, &m82xx_pci_ic);
-	return 0;
-}
-
-static void pci_host_unmap(struct irq_host *h, unsigned int virq)
-{
-	/* remove chip and handler */
-	set_irq_chip(virq, NULL);
-}
-
-static struct irq_host_ops pci_pic_host_ops = {
-	.match = pci_pic_host_match,
-	.map = pci_pic_host_map,
-	.unmap = pci_host_unmap,
-};
-
-void m82xx_pci_init_irq(void)
-{
-	int irq;
-	cpm2_map_t *immap;
-	struct device_node *np;
-	struct resource r;
-	const u32 *regs;
-	unsigned int size;
-	const u32 *irq_map;
-	int i;
-	unsigned int irq_max, irq_min;
-
-	if ((np = of_find_node_by_type(NULL, "soc")) == NULL) {
-		printk(KERN_INFO "No SOC node in device tree\n");
-		return;
-	}
-	memset(&r, 0, sizeof(r));
-	if (of_address_to_resource(np, 0, &r)) {
-		printk(KERN_INFO "No SOC reg property in device tree\n");
-		return;
-	}
-	immap = ioremap(r.start, sizeof(*immap));
-	of_node_put(np);
-
-	/* install the demultiplexer for the PCI cascade interrupt */
-	np = of_find_node_by_type(NULL, "pci");
-	if (!np) {
-		printk(KERN_INFO "No pci node on device tree\n");
-		iounmap(immap);
-		return;
-	}
-	irq_map = of_get_property(np, "interrupt-map", &size);
-	if ((!irq_map) || (size <= 7)) {
-		printk(KERN_INFO "No interrupt-map property of pci node\n");
-		iounmap(immap);
-		return;
-	}
-	size /= sizeof(irq_map[0]);
-	for (i = 0, irq_max = 0, irq_min = 512; i < size; i += 7, irq_map += 7) {
-		if (irq_map[5] < irq_min)
-			irq_min = irq_map[5];
-		if (irq_map[5] > irq_max)
-			irq_max = irq_map[5];
-	}
-	pci_int_base = irq_min;
-	irq = irq_of_parse_and_map(np, 0);
-	set_irq_chained_handler(irq, m82xx_pci_irq_demux);
-	of_node_put(np);
-	np = of_find_node_by_type(NULL, "pci-pic");
-	if (!np) {
-		printk(KERN_INFO "No pci pic node on device tree\n");
-		iounmap(immap);
-		return;
-	}
-	pci_pic_node = of_node_get(np);
-	/* PCI interrupt controller registers: status and mask */
-	regs = of_get_property(np, "reg", &size);
-	if ((!regs) || (size <= 2)) {
-		printk(KERN_INFO "No reg property in pci pic node\n");
-		iounmap(immap);
-		return;
-	}
-	pci_regs.pci_int_stat_reg =
-	    ioremap(regs[0], sizeof(*pci_regs.pci_int_stat_reg));
-	pci_regs.pci_int_mask_reg =
-	    ioremap(regs[1], sizeof(*pci_regs.pci_int_mask_reg));
-	of_node_put(np);
-	/* configure chip select for PCI interrupt controller */
-	immap->im_memctl.memc_br3 = regs[0] | 0x00001801;
-	immap->im_memctl.memc_or3 = 0xffff8010;
-	/* make PCI IRQ level sensitive */
-	immap->im_intctl.ic_siexr &= ~(1 << (14 - (irq - SIU_INT_IRQ1)));
-
-	/* mask all PCI interrupts */
-	*pci_regs.pci_int_mask_reg |= 0xfff00000;
-	iounmap(immap);
-	pci_pic_host =
-	    irq_alloc_host(IRQ_HOST_MAP_LINEAR, irq_max - irq_min + 1,
-			   &pci_pic_host_ops, irq_max + 1);
-	return;
-}
-
 static int m82xx_pci_exclude_device(struct pci_controller *hose,
 				    u_char bus, u_char devfn)
 {
@@ -512,7 +329,6 @@ static void __init mpc82xx_add_bridge(struct device_node *np)
 		printk(KERN_INFO "No clock-frequency property in PCI node");
 		return;
 	}
-	pci_clk_frq = *ptr;
 	of_node_put(np);
 	bus_range = of_get_property(np, "bus-range", &len);
 	if (bus_range == NULL || len < 2 * sizeof(int)) {
diff --git a/arch/powerpc/platforms/82xx/pq2.h b/arch/powerpc/platforms/82xx/pq2.h
index 3c9620f..6bce391 100644
--- a/arch/powerpc/platforms/82xx/pq2.h
+++ b/arch/powerpc/platforms/82xx/pq2.h
@@ -4,4 +4,13 @@
 void pq2_restart(char *cmd);
 void pq2_halt(void);
 
+#ifdef CONFIG_PCI
+int pq2ads_pci_init_irq(void);
+#else
+static inline int pq2ads_pci_init_irq(void)
+{
+	return 0;
+}
+#endif
+
 #endif
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
new file mode 100644
index 0000000..cb77858
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -0,0 +1,200 @@
+/*
+ * PQ2 ADS-style PCI interrupt controller
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Loosely based on mpc82xx ADS support by Vitaly Bordug <vbordug@ru.mvista.com>
+ * Copyright (c) 2006 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/bootmem.h>
+
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/cpm2.h>
+
+static DEFINE_SPINLOCK(pci_pic_lock);
+
+struct pq2ads_pci_pic {
+	struct device_node *node;
+	struct irq_host *host;
+
+	struct {
+		u32 stat;
+		u32 mask;
+	} __iomem *regs;
+};
+
+#define NUM_IRQS 32
+
+static void pq2ads_pci_mask_irq(unsigned int virq)
+{
+	struct pq2ads_pci_pic *priv = get_irq_chip_data(virq);
+	int irq = NUM_IRQS - virq_to_hw(virq) - 1;
+
+	if (irq != -1) {
+		unsigned long flags;
+		spin_lock_irqsave(&pci_pic_lock, flags);
+
+		setbits32(&priv->regs->mask, 1 << irq);
+		mb();
+
+		spin_unlock_irqrestore(&pci_pic_lock, flags);
+	}
+}
+
+static void pq2ads_pci_unmask_irq(unsigned int virq)
+{
+	struct pq2ads_pci_pic *priv = get_irq_chip_data(virq);
+	int irq = NUM_IRQS - virq_to_hw(virq) - 1;
+
+	if (irq != -1) {
+		unsigned long flags;
+
+		spin_lock_irqsave(&pci_pic_lock, flags);
+		clrbits32(&priv->regs->mask, 1 << irq);
+		spin_unlock_irqrestore(&pci_pic_lock, flags);
+	}
+}
+
+struct irq_chip pq2ads_pci_ic = {
+	.typename = "PQ2 ADS PCI",
+	.name = "PQ2 ADS PCI",
+	.end = pq2ads_pci_unmask_irq,
+	.mask = pq2ads_pci_mask_irq,
+	.mask_ack = pq2ads_pci_mask_irq,
+	.ack = pq2ads_pci_mask_irq,
+	.unmask = pq2ads_pci_unmask_irq,
+	.enable = pq2ads_pci_unmask_irq,
+	.disable = pq2ads_pci_mask_irq
+};
+
+static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
+{
+	struct pq2ads_pci_pic *priv = desc->handler_data;
+	u32 stat, mask, pend;
+	int bit;
+
+	for (;;) {
+		stat = in_be32(&priv->regs->stat);
+		mask = in_be32(&priv->regs->mask);
+
+		pend = stat & ~mask;
+
+		if (!pend)
+			break;
+
+		for (bit = 0; pend != 0; ++bit, pend <<= 1) {
+			if (pend & 0x80000000) {
+				int irq = irq_linear_revmap(priv->host, bit);
+				generic_handle_irq(irq);
+			}
+		}
+	}
+}
+
+static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
+{
+	struct pq2ads_pci_pic *priv = h->host_data;
+	return node == priv->node;
+}
+
+static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
+			    irq_hw_number_t hw)
+{
+	get_irq_desc(virq)->status |= IRQ_LEVEL;
+	set_irq_chip_data(virq, h->host_data);
+	set_irq_chip(virq, &pq2ads_pci_ic);
+	return 0;
+}
+
+static void pci_host_unmap(struct irq_host *h, unsigned int virq)
+{
+	/* remove chip and handler */
+	set_irq_chip_data(virq, NULL);
+	set_irq_chip(virq, NULL);
+}
+
+static struct irq_host_ops pci_pic_host_ops = {
+	.match = pci_pic_host_match,
+	.map = pci_pic_host_map,
+	.unmap = pci_host_unmap,
+};
+
+int __init pq2ads_pci_init_irq(void)
+{
+	struct pq2ads_pci_pic *priv;
+	struct irq_host *host;
+	struct device_node *np;
+	int ret = -ENODEV;
+	int irq;
+
+	np = of_find_compatible_node(NULL, NULL, "fsl,pq2ads-pci-pic");
+	if (!np) {
+		printk(KERN_ERR "No pci pic node in device tree.\n");
+		of_node_put(np);
+		goto out;
+	}
+
+	irq = irq_of_parse_and_map(np, 0);
+	if (irq == NO_IRQ) {
+		printk(KERN_ERR "No interrupt in pci pic node.\n");
+		of_node_put(np);
+		goto out;
+	}
+
+	priv = alloc_bootmem(sizeof(struct pq2ads_pci_pic));
+	if (!priv) {
+		of_node_put(np);
+		ret = -ENOMEM;
+		goto out_unmap_irq;
+	}
+
+	priv->node = np;
+	of_node_put(np);
+
+	/* PCI interrupt controller registers: status and mask */
+	priv->regs = of_iomap(priv->node, 0);
+	if (!priv->regs) {
+		printk(KERN_ERR "Cannot map PCI PIC registers.\n");
+		goto out_free_bootmem;
+	}
+
+	/* mask all PCI interrupts */
+	out_be32(&priv->regs->mask, ~0);
+	mb();
+
+	host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, NUM_IRQS,
+	                      &pci_pic_host_ops, NUM_IRQS);
+	if (!host) {
+		ret = -ENOMEM;
+		goto out_unmap_regs;
+	}
+
+	host->host_data = priv;
+
+	priv->host = host;
+	host->host_data = priv;
+	set_irq_data(irq, priv);
+	set_irq_chained_handler(irq, pq2ads_pci_irq_demux);
+	return 0;
+
+out_unmap_regs:
+	iounmap(priv->regs);
+out_free_bootmem:
+	free_bootmem((unsigned long)priv,
+	             sizeof(sizeof(struct pq2ads_pci_pic)));
+out_unmap_irq:
+	irq_dispose_mapping(irq);
+out:
+	return ret;
+}
-- 
1.5.0.3

[PATCH 36/61] mpc82xx: Factor PCI init out of mpc8272ads.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/dts/mpc8272ads.dts     |    3 +-
 arch/powerpc/boot/dts/mpc8560ads.dts     |    2 +-
 arch/powerpc/platforms/82xx/mpc8272ads.c |   86 ++---------------------------
 arch/powerpc/platforms/82xx/pq2.c        |   44 +++++++++++++++
 arch/powerpc/platforms/82xx/pq2.h        |    7 +++
 arch/powerpc/platforms/82xx/pq2ads.h     |    1 -
 6 files changed, 59 insertions(+), 84 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 8c69cd0..ae52ada 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -161,8 +161,7 @@
 			interrupt-controller;
 			reg = <10c00 80>;
 			built-in;
-			device_type = "cpm-pic";
-			compatible = "CPM2";
+			compatible = "fsl,pq2-pic";
 		};
 
 		pci@0500 {
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 1626587..847a095 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -249,7 +249,7 @@
 				interrupt-parent = <&mpic>;
 				reg = <90c00 80>;
 				built-in;
-				device_type = "cpm-pic";
+				compatible = "fsl,pq2-pic";
 			};
 
 			scc@91a00 {
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index e5b7a0f..388b090 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -18,11 +18,12 @@
 #include <linux/fs_enet_pd.h>
 
 #include <asm/io.h>
-#include <asm/pci-bridge.h>
 #include <asm/mpc8260.h>
 #include <asm/cpm2.h>
 #include <asm/udbg.h>
 #include <asm/i8259.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
 #include <asm/time.h>
 
 #include <platforms/82xx/pq2.h>
@@ -35,29 +36,15 @@
 
 static void __init mpc8272ads_pic_init(void)
 {
-	struct device_node *np = of_find_compatible_node(NULL, "cpm-pic", "CPM2");
-	struct resource r;
-	cpm2_map_t *cpm_reg;
-
-	if (np == NULL) {
+	struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
+	if (!np) {
 		printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
 		return;
 	}
-	if (of_address_to_resource(np, 0, &r)) {
-		printk(KERN_ERR "PIC init: invalid resource\n");
-		of_node_put(np);
-		return;
-	}
+
 	cpm2_pic_init(np);
 	of_node_put(np);
 
-	/* Initialize the default interrupt mapping priorities,
-	 * in case the boot rom changed something on us.
-	 */
-	cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
-	cpm_reg->im_intctl.ic_siprr = 0x05309770;
-	iounmap(cpm_reg);
-
 	/* Initialize stuff for the 82xx CPLD IC and install demux  */
 	pq2ads_pci_init_irq();
 }
@@ -302,67 +289,12 @@ void __init mpc8272ads_board_setup(void)
 	iounmap(immap);
 }
 
-#ifdef CONFIG_PCI
-static int m82xx_pci_exclude_device(struct pci_controller *hose,
-				    u_char bus, u_char devfn)
-{
-	if (bus == 0 && PCI_SLOT(devfn) == 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	else
-		return PCIBIOS_SUCCESSFUL;
-}
-
-static void __init mpc82xx_add_bridge(struct device_node *np)
-{
-	int len;
-	struct pci_controller *hose;
-	struct resource r;
-	const int *bus_range;
-	const uint *ptr;
-
-	memset(&r, 0, sizeof(r));
-	if (of_address_to_resource(np, 0, &r)) {
-		printk(KERN_INFO "No PCI reg property in device tree\n");
-		return;
-	}
-	if (!(ptr = of_get_property(np, "clock-frequency", NULL))) {
-		printk(KERN_INFO "No clock-frequency property in PCI node");
-		return;
-	}
-	of_node_put(np);
-	bus_range = of_get_property(np, "bus-range", &len);
-	if (bus_range == NULL || len < 2 * sizeof(int)) {
-		printk(KERN_WARNING "Can't get bus-range for %s, assume"
-		       " bus 0\n", np->full_name);
-	}
-
-	pci_assign_all_buses = 1;
-
-	hose = pcibios_alloc_controller(np);
-
-	if (!hose)
-		return;
-
-	hose->first_busno = bus_range ? bus_range[0] : 0;
-	hose->last_busno = bus_range ? bus_range[1] : 0xff;
-
-	setup_indirect_pci(hose,
-			   r.start + offsetof(pci_cpm2_t, pci_cfg_addr),
-			   r.start + offsetof(pci_cpm2_t, pci_cfg_data));
-
-	pci_process_bridge_OF_ranges(hose, np, 1);
-}
-#endif
 
 /*
  * Setup the architecture
  */
 static void __init mpc8272ads_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-	struct device_node *np;
-#endif
-
 	if (ppc_md.progress)
 		ppc_md.progress("mpc8272ads_setup_arch()", 0);
 	cpm2_reset();
@@ -371,13 +303,7 @@ static void __init mpc8272ads_setup_arch(void)
 
 	mpc8272ads_board_setup();
 
-#ifdef CONFIG_PCI
-	ppc_md.pci_exclude_device = m82xx_pci_exclude_device;
-	for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
-		mpc82xx_add_bridge(np);
-
-	of_node_put(np);
-#endif
+	pq2_init_pci();
 
 	if (ppc_md.progress)
 		ppc_md.progress("mpc8272ads_setup_arch(), finish", 0);
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
index e58980d..76df8d7 100644
--- a/arch/powerpc/platforms/82xx/pq2.c
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -16,6 +16,7 @@
 
 #include <asm/cpm2.h>
 #include <asm/io.h>
+#include <asm/pci-bridge.h>
 #include <asm/system.h>
 
 #include <platforms/82xx/pq2.h>
@@ -42,3 +43,46 @@ void pq2_halt(void)
 	while (1)
 		;
 }
+
+#ifdef CONFIG_PCI
+static int pq2_pci_exclude_device(struct pci_controller *hose,
+                                  u_char bus, u8 devfn)
+{
+	if (bus == 0 && PCI_SLOT(devfn) == 0)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	else
+		return PCIBIOS_SUCCESSFUL;
+}
+
+static void __init pq2_pci_add_bridge(struct device_node *np)
+{
+	struct pci_controller *hose;
+	struct resource r;
+
+	if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b) {
+		printk(KERN_ERR "No valid PCI reg property in device tree\n");
+		return;
+	}
+
+	pci_assign_all_buses = 1;
+
+	hose = pcibios_alloc_controller(np);
+	if (!hose)
+		return;
+
+	hose->arch_data = np;
+
+	setup_indirect_pci(hose, r.start + 0x100, r.start + 0x104);
+	pci_process_bridge_OF_ranges(hose, np, 1);
+}
+
+void __init pq2_init_pci(void)
+{
+	struct device_node *np = NULL;
+
+	ppc_md.pci_exclude_device = pq2_pci_exclude_device;
+
+	while ((np = of_find_compatible_node(np, NULL, "fsl,pq2-pci")))
+		pq2_pci_add_bridge(np);
+}
+#endif
diff --git a/arch/powerpc/platforms/82xx/pq2.h b/arch/powerpc/platforms/82xx/pq2.h
index 6bce391..4de5b06 100644
--- a/arch/powerpc/platforms/82xx/pq2.h
+++ b/arch/powerpc/platforms/82xx/pq2.h
@@ -3,14 +3,21 @@
 
 void pq2_restart(char *cmd);
 void pq2_halt(void);
+int pq2ads_pci_init_irq(void);
+void pq2_init_pci(void);
 
 #ifdef CONFIG_PCI
 int pq2ads_pci_init_irq(void);
+void pq2_init_pci(void);
 #else
 static inline int pq2ads_pci_init_irq(void)
 {
 	return 0;
 }
+
+static inline void pq2_init_pci(void)
+{
+}
 #endif
 
 #endif
diff --git a/arch/powerpc/platforms/82xx/pq2ads.h b/arch/powerpc/platforms/82xx/pq2ads.h
index 4546ce6..482153a 100644
--- a/arch/powerpc/platforms/82xx/pq2ads.h
+++ b/arch/powerpc/platforms/82xx/pq2ads.h
@@ -54,7 +54,6 @@
 #define SIU_INT_SCC3		((uint)0x2a+CPM_IRQ_OFFSET)
 #define SIU_INT_SCC4		((uint)0x2b+CPM_IRQ_OFFSET)
 
-void m82xx_pci_init_irq(void);
 void m82xx_show_cpuinfo(struct seq_file *);
 
 #endif /* __MACH_ADS8260_DEFS */
-- 
1.5.0.3

[PATCH 37/61] cpm2: Rework 8272ads initialization, and eliminate init_fcc_ioports().

[Scott Wood]

The mpc8272ads initialization is reworked to:

1. use cpm2_set_pin() and cpm2_clk_setup() instead of the hardcoded mess,
2. have a sane devtree binding for the BCSR,
3. set the BCSR bits needed for both ethernet ports to work,
4. support the early debug console, and
5. call of_platform_bus_probe(), for the forthcoming of-platform-ization
of the CPM drivers.

The init_fcc_ioports() call is no longer used.  CPM-based 85xx
is now broken until I can get a test machine, unless U-boot properly
sets up the I/O ports.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/platforms/82xx/mpc8272ads.c |  341 +++++++++---------------------
 arch/powerpc/sysdev/fsl_soc.c            |    3 -
 2 files changed, 105 insertions(+), 239 deletions(-)

diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index 388b090..8187920 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -1,8 +1,10 @@
 /*
- * MPC8272ADS setup and early boot code plus other random bits.
+ * MPC8272ADS board support
  *
- * Author: Vitaly Bordug <vbordug@ru.mvista.com>
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * Author: Scott Wood <scottwood@freescale.com>
  *
+ * Based on code by Vitaly Bordug <vbordug@ru.mvista.com>
  * Copyright (c) 2006 MontaVista Software, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
@@ -14,15 +16,11 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/fsl_devices.h>
-#include <linux/fs_uart_pd.h>
-#include <linux/fs_enet_pd.h>
 
 #include <asm/io.h>
-#include <asm/mpc8260.h>
 #include <asm/cpm2.h>
 #include <asm/udbg.h>
-#include <asm/i8259.h>
-#include <asm/prom.h>
+#include <asm/of_platform.h>
 #include <asm/machdep.h>
 #include <asm/time.h>
 
@@ -49,259 +47,108 @@ static void __init mpc8272ads_pic_init(void)
 	pq2ads_pci_init_irq();
 }
 
-static void init_fcc1_ioports(struct fs_platform_info *fpi)
-{
-	struct io_port *io;
-	u32 tempval;
-	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-	struct device_node *np;
-	struct resource r;
-	u32 *bcsr;
-
-	np = of_find_node_by_type(NULL, "memory");
-	if (!np) {
-		printk(KERN_INFO "No memory node in device tree\n");
-		return;
-	}
-	if (of_address_to_resource(np, 1, &r)) {
-		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
-		return;
-	}
-	of_node_put(np);
-	bcsr = ioremap(r.start + 4, sizeof(u32));
-	io = &immap->im_ioport;
-
-	/* Enable the PHY */
-	clrbits32(bcsr, BCSR1_FETHIEN);
-	setbits32(bcsr, BCSR1_FETH_RST);
-
-	/* FCC1 pins are on port A/C. */
-	/* Configure port A and C pins for FCC1 Ethernet. */
-
-	tempval = in_be32(&io->iop_pdira);
-	tempval &= ~PA1_DIRA0;
-	tempval |= PA1_DIRA1;
-	out_be32(&io->iop_pdira, tempval);
-
-	tempval = in_be32(&io->iop_psora);
-	tempval &= ~PA1_PSORA0;
-	tempval |= PA1_PSORA1;
-	out_be32(&io->iop_psora, tempval);
-
-	setbits32(&io->iop_ppara, PA1_DIRA0 | PA1_DIRA1);
+struct cpm_pin {
+	int port, pin, flags;
+};
 
-	/* Alter clocks */
-	tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
+static struct cpm_pin mpc8272ads_pins[] = {
+	/* SCC1 */
+	{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+	/* SCC4 */
+	{3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+	/* FCC1 */
+	{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+	{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+	{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+	{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+	{2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+	/* FCC2 */
+	{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+};
 
-	clrbits32(&io->iop_psorc, tempval);
-	clrbits32(&io->iop_pdirc, tempval);
-	setbits32(&io->iop_pparc, tempval);
+static void __init init_ioports(void)
+{
+	int i;
 
-	cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_rx, CPM_CLK_RX);
-	cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_tx, CPM_CLK_TX);
+	for (i = 0; i < ARRAY_SIZE(mpc8272ads_pins); i++) {
+		struct cpm_pin *pin = &mpc8272ads_pins[i];
+		cpm2_set_pin(pin->port, pin->pin, pin->flags);
+	}
 
-	iounmap(bcsr);
-	iounmap(immap);
+	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
+	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
+	cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_RX);
+	cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_TX);
+	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
+	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
+	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK15, CPM_CLK_RX);
+	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK16, CPM_CLK_TX);
 }
 
-static void init_fcc2_ioports(struct fs_platform_info *fpi)
+static void __init mpc8272ads_setup_arch(void)
 {
-	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
 	struct device_node *np;
-	struct resource r;
 	u32 *bcsr;
 
-	struct io_port *io;
-	u32 tempval;
-
-	np = of_find_node_by_type(NULL, "memory");
-	if (!np) {
-		printk(KERN_INFO "No memory node in device tree\n");
-		return;
-	}
-	if (of_address_to_resource(np, 1, &r)) {
-		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
-		return;
-	}
-	of_node_put(np);
-	io = &immap->im_ioport;
-	bcsr = ioremap(r.start + 12, sizeof(u32));
-
-	/* Enable the PHY */
-	clrbits32(bcsr, BCSR3_FETHIEN2);
-	setbits32(bcsr, BCSR3_FETH2_RST);
-
-	/* FCC2 are port B/C. */
-	/* Configure port A and C pins for FCC2 Ethernet. */
-
-	tempval = in_be32(&io->iop_pdirb);
-	tempval &= ~PB2_DIRB0;
-	tempval |= PB2_DIRB1;
-	out_be32(&io->iop_pdirb, tempval);
-
-	tempval = in_be32(&io->iop_psorb);
-	tempval &= ~PB2_PSORB0;
-	tempval |= PB2_PSORB1;
-	out_be32(&io->iop_psorb, tempval);
-
-	setbits32(&io->iop_pparb, PB2_DIRB0 | PB2_DIRB1);
-
-	tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
-
-	/* Alter clocks */
-	clrbits32(&io->iop_psorc, tempval);
-	clrbits32(&io->iop_pdirc, tempval);
-	setbits32(&io->iop_pparc, tempval);
-
-	cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_rx, CPM_CLK_RX);
-	cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_tx, CPM_CLK_TX);
+	if (ppc_md.progress)
+		ppc_md.progress("mpc8272ads_setup_arch()", 0);
 
-	iounmap(bcsr);
-	iounmap(immap);
-}
+	cpm2_reset();
 
-void init_fcc_ioports(struct fs_platform_info *fpi)
-{
-	int fcc_no = fs_get_fcc_index(fpi->fs_no);
-
-	switch (fcc_no) {
-	case 0:
-		init_fcc1_ioports(fpi);
-		break;
-	case 1:
-		init_fcc2_ioports(fpi);
-		break;
-	default:
-		printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
+	np = of_find_compatible_node(NULL, NULL, "fsl,mpc8272ads-bcsr");
+	if (!np) {
+		printk(KERN_ERR "No bcsr in device tree\n");
 		return;
 	}
-}
 
-static void init_scc1_uart_ioports(struct fs_uart_platform_info *data)
-{
-	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-
-	/* SCC1 is only on port D */
-	setbits32(&immap->im_ioport.iop_ppard, 0x00000003);
-	clrbits32(&immap->im_ioport.iop_psord, 0x00000001);
-	setbits32(&immap->im_ioport.iop_psord, 0x00000002);
-	clrbits32(&immap->im_ioport.iop_pdird, 0x00000001);
-	setbits32(&immap->im_ioport.iop_pdird, 0x00000002);
-
-	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
-	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
-	setbits32(&immap->im_cpmux.cmx_scr,
-		  ((data->clk_tx - 1) << (4 - data->clk_tx)));
-	setbits32(&immap->im_cpmux.cmx_scr,
-		  ((data->clk_rx - 1) << (4 - data->clk_rx)));
-
-	iounmap(immap);
-}
-
-static void init_scc4_uart_ioports(struct fs_uart_platform_info *data)
-{
-	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-
-	setbits32(&immap->im_ioport.iop_ppard, 0x00000600);
-	clrbits32(&immap->im_ioport.iop_psord, 0x00000600);
-	clrbits32(&immap->im_ioport.iop_pdird, 0x00000200);
-	setbits32(&immap->im_ioport.iop_pdird, 0x00000400);
-
-	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
-	clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
-	setbits32(&immap->im_cpmux.cmx_scr,
-		  ((data->clk_tx - 1) << (4 - data->clk_tx)));
-	setbits32(&immap->im_cpmux.cmx_scr,
-		  ((data->clk_rx - 1) << (4 - data->clk_rx)));
-
-	iounmap(immap);
-}
-
-void init_scc_ioports(struct fs_uart_platform_info *data)
-{
-	int scc_no = fs_get_scc_index(data->fs_no);
-
-	switch (scc_no) {
-	case 0:
-		init_scc1_uart_ioports(data);
-		data->brg = data->clk_rx;
-		break;
-	case 3:
-		init_scc4_uart_ioports(data);
-		data->brg = data->clk_rx;
-		break;
-	default:
-		printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
+	bcsr = of_iomap(np, 0);
+	if (!bcsr) {
+		printk(KERN_INFO "Cannot map BCSR registers\n");
 		return;
 	}
-}
 
-void __init mpc8272ads_board_setup(void)
-{
-	cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-	struct device_node *np;
-	struct resource r;
-	u32 *bcsr;
-
-	np = of_find_node_by_type(NULL, "memory");
-	if (!np) {
-		printk(KERN_INFO "No memory node in device tree\n");
-		return;
-	}
-	if (of_address_to_resource(np, 1, &r)) {
-		printk(KERN_INFO "No memory reg property [1] in devicetree\n");
-		return;
-	}
 	of_node_put(np);
-	bcsr = ioremap(r.start + 4, sizeof(u32));
-	/* Enable the 2nd UART port */
-	clrbits32(bcsr, BCSR1_RS232_EN2);
-
-#ifdef CONFIG_SERIAL_CPM_SCC1
-	clrbits32((u32 *) & immap->im_scc[0].scc_sccm,
-		  UART_SCCM_TX | UART_SCCM_RX);
-	clrbits32((u32 *) & immap->im_scc[0].scc_gsmrl,
-		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC2
-	clrbits32((u32 *) & immap->im_scc[1].scc_sccm,
-		  UART_SCCM_TX | UART_SCCM_RX);
-	clrbits32((u32 *) & immap->im_scc[1].scc_gsmrl,
-		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
 
-#ifdef CONFIG_SERIAL_CPM_SCC3
-	clrbits32((u32 *) & immap->im_scc[2].scc_sccm,
-		  UART_SCCM_TX | UART_SCCM_RX);
-	clrbits32((u32 *) & immap->im_scc[2].scc_gsmrl,
-		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
+	clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
+	setbits32(&bcsr[1], BCSR1_FETH_RST);
 
-#ifdef CONFIG_SERIAL_CPM_SCC4
-	clrbits32((u32 *) & immap->im_scc[3].scc_sccm,
-		  UART_SCCM_TX | UART_SCCM_RX);
-	clrbits32((u32 *) & immap->im_scc[3].scc_gsmrl,
-		  SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
+	clrbits32(&bcsr[3], BCSR3_FETHIEN2);
+	setbits32(&bcsr[3], BCSR3_FETH2_RST);
 
 	iounmap(bcsr);
-	iounmap(immap);
-}
-
-
-/*
- * Setup the architecture
- */
-static void __init mpc8272ads_setup_arch(void)
-{
-	if (ppc_md.progress)
-		ppc_md.progress("mpc8272ads_setup_arch()", 0);
-	cpm2_reset();
-
-	/* Map I/O region to a 256MB BAT */
 
-	mpc8272ads_board_setup();
+	init_ioports();
 
 	pq2_init_pci();
 
@@ -309,6 +156,23 @@ static void __init mpc8272ads_setup_arch(void)
 		ppc_md.progress("mpc8272ads_setup_arch(), finish", 0);
 }
 
+static struct of_device_id __initdata of_bus_ids[] = {
+	{ .name = "soc", },
+	{ .name = "cpm", },
+	{},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+	if (!machine_is(mpc8272ads))
+		return 0;
+
+	/* Publish the QE devices */
+	of_platform_bus_probe(NULL, of_bus_ids, NULL);
+	return 0;
+}
+device_initcall(declare_of_platform_devices);
+
 /*
  * Called very early, device-tree isn't unflattened
  */
@@ -329,4 +193,9 @@ define_machine(mpc8272ads)
 	.calibrate_decr = generic_calibrate_decr,
 	.restart = pq2_restart,
 	.halt = pq2_halt,
+	.progress = udbg_progress,
 };
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+u32 __iomem *cpm_udbg_txdesc = (u32 __iomem *)0xf0000808;
+#endif
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index ff70d62..cee671f 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -588,8 +588,6 @@ arch_initcall(fsl_usb_of_init);
 
 #ifdef CONFIG_CPM2
 
-extern void init_scc_ioports(struct fs_uart_platform_info*);
-
 static const char fcc_regs[] = "fcc_regs";
 static const char fcc_regs_c[] = "fcc_regs_c";
 static const char fcc_pram[] = "fcc_pram";
@@ -700,7 +698,6 @@ static int __init fs_enet_of_init(void)
 			snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
 							(u32)res.start, fs_enet_data.phy_addr);
 			fs_enet_data.bus_id = (char*)&bus_id[(*id)];
-			fs_enet_data.init_ioports = init_fcc_ioports;
 
 			mdio_bb_prop = of_get_property(phy, "bitbang", NULL);
 			if (mdio_bb_prop) {
-- 
1.5.0.3

Re: [PATCH 37/61] cpm2: Rework 8272ads initialization, and eliminate init_fcc_ioports().

[Arnd Bergmann]

On Wednesday 18 July 2007, Scott Wood wrote:
> +static struct cpm_pin mpc8272ads_pins[] =3D {
> +=A0=A0=A0=A0=A0=A0=A0/* SCC1 */
> +=A0=A0=A0=A0=A0=A0=A0{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
> +=A0=A0=A0=A0=A0=A0=A0{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
> +
> +=A0=A0=A0=A0=A0=A0=A0/* SCC4 */
> +=A0=A0=A0=A0=A0=A0=A0{3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
> +=A0=A0=A0=A0=A0=A0=A0{3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
> +
> +=A0=A0=A0=A0=A0=A0=A0/* FCC1 */
> +=A0=A0=A0=A0=A0=A0=A0{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
> +=A0=A0=A0=A0=A0=A0=A0{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
> +=A0=A0=A0=A0=A0=A0=A0{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
> +=A0=A0=A0=A0=A0=A0=A0{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

I guess you considered moving such tables into the device tree at some poin=
t,
which doesn't seem that difficult at all to an ignorant reviewer like me.

What's the reasoning for putting it into the platform code after all?

	Arnd <><

Re: [PATCH 37/61] cpm2: Rework 8272ads initialization, and eliminate init_fcc_ioports().

[Arnd Bergmann]

On Thursday 19 July 2007, Arnd Bergmann wrote:
> I guess you considered moving such tables into the device tree at some point,
> which doesn't seem that difficult at all to an ignorant reviewer like me.
> 
> What's the reasoning for putting it into the platform code after all?
> 

Ok, I think I found the answer myself: the table is for stuff that Linux
needs to set up, not to describe stuff that is already set up at the time
the device tree is parsed, right?

	Arnd <><

Re: [PATCH 37/61] cpm2: Rework 8272ads initialization, and eliminate init_fcc_ioports().

[Scott Wood]

Arnd Bergmann wrote:
> On Wednesday 18 July 2007, Scott Wood wrote:
> 
>>+static struct cpm_pin mpc8272ads_pins[] = {
>>+       /* SCC1 */
>>+       {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
>>+       {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
>>+
>>+       /* SCC4 */
>>+       {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
>>+       {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
>>+
>>+       /* FCC1 */
>>+       {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
>>+       {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
>>+       {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
>>+       {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
> 
> 
> I guess you considered moving such tables into the device tree at some point,
> which doesn't seem that difficult at all to an ignorant reviewer like me.
> 
> What's the reasoning for putting it into the platform code after all?

Ideally, this would be done by u-boot, and neither the kernel nor the 
device tree would need to care.  However, u-boot's setting up of the 
pins was lacking on all of the boards I tested on, so I had to fix it up 
in the platform code.

I considered putting it in the device tree as the qe code does; if there 
are many boards like these that need the kernel to set up the pins, it 
may be worthwhile.  We just need to come up with a good binding (e.g. no 
using arbitrary enums defined in the kernel).

-Scott

[PATCH 38/61] cpm2: Update device trees.

[Scott Wood]

The mpc8272ads device tree is thoroughly reworked, including new CPM2 bindings.
The mpc8560ads tree has the CPM portions updated.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/dts/mpc8272ads.dts |  295 +++++++++++++++++++---------------
 arch/powerpc/boot/dts/mpc8560ads.dts |   70 +++++----
 2 files changed, 206 insertions(+), 159 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index ae52ada..708736b 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -22,179 +22,213 @@
 		PowerPC,8272@0 {
 			device_type = "cpu";
 			reg = <0>;
-			d-cache-line-size = <20>;       // 32 bytes
-			i-cache-line-size = <20>;       // 32 bytes
-			d-cache-size = <4000>;          // L1, 16K
-			i-cache-size = <4000>;          // L1, 16K
+			d-cache-line-size = <d#32>;
+			i-cache-line-size = <d#32>;
+			d-cache-size = <d#16384>;
+			i-cache-size = <d#16384>;
 			timebase-frequency = <0>;
 			bus-frequency = <0>;
 			clock-frequency = <0>;
-			32-bit;
 		};
 	};
 
-	pci_pic: interrupt-controller@f8200000 {
-		#address-cells = <0>;
-		#interrupt-cells = <2>;
-		interrupt-controller;
-		reg = <f8200000 f8200004>;
-		built-in;
-		device_type = "pci-pic";
+	CS: chipselect {
+		compatible = "fsl,mpc8272ads-chipselect",
+		             "fsl,mpc8272-chipselect",
+		             "fsl,pq2-chipselect";
+		#address-cells = <2>;
+		#size-cells = <1>;
+		fsl,ctrl = <&CSCTRL>;
+
+		ranges = <0 0 fe000000 02000000
+		          1 0 f4500000 00008000
+		          3 0 f8200000 00008000>;
+
+		flash@0 {
+			device_type = "rom";
+			compatible = "direct-mapped";
+			reg = <0 0 2000000>;
+			probe-type = "CFI";
+			bank-width = "4";
+		};
+
+		bcsr@1 {
+			reg = <1 0 20>;
+			compatible = "fsl,mpc8272ads-bcsr";
+		};
+
+		PCI_PIC: interrupt-controller@f8200000 {
+			compatible = "fsl,mpc8272ads-pci-pic",
+			             "fsl,pq2ads-pci-pic";
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			reg = <3 0 8>;
+			interrupt-parent = <&PIC>;
+			interrupts = <14 8>;
+		};
 	};
 
 	memory {
 		device_type = "memory";
-		reg = <00000000 4000000 f4500000 00000020>;
+		reg = <0 0>;
 	};
 
-	chosen {
-		name = "chosen";
-		linux,platform = <0>;
-		interrupt-controller = <&Cpm_pic>;
-	};
-
-	soc8272@f0000000 {
+	soc@f0000000 {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		#interrupt-cells = <2>;
 		device_type = "soc";
+		compatible = "fsl,mpc8272", "fsl,pq2-soc";
 		ranges = <00000000 f0000000 00053000>;
 		reg = <f0000000 10000>;
 
-		mdio@0 {
-			device_type = "mdio";
-			compatible = "fs_enet";
-			reg = <0 0>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			phy0:ethernet-phy@0 {
-				interrupt-parent = <&Cpm_pic>;
-				interrupts = <17 4>;
-				reg = <0>;
-				bitbang = [ 12 12 13 02 02 01 ];
-				device_type = "ethernet-phy";
-			};
-
-			phy1:ethernet-phy@1 {
-				interrupt-parent = <&Cpm_pic>;
-				interrupts = <17 4>;
-				bitbang = [ 12 12 13 02 02 01 ];
-				reg = <3>;
-				device_type = "ethernet-phy";
-			};
+		CSCTRL: chipselect@10100 {
+			compatible = "fsl,mpc8272-chipset-ctrl",
+			             "fsl,pq2-chipselect-ctrl";
+			reg = <10100 40>;
+			fsl,bus = <&CS>;
 		};
 
-		ethernet@24000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			device_type = "network";
-			device-id = <1>;
-			compatible = "fs_enet";
-			model = "FCC";
-			reg = <11300 20 8400 100 11380 30>;
-			mac-address = [ 00 11 2F 99 43 54 ];
-			interrupts = <20 2>;
-			interrupt-parent = <&Cpm_pic>;
-			phy-handle = <&Phy0>;
-			rx-clock = <13>;
-			tx-clock = <12>;
-		};
-
-		ethernet@25000 {
-			device_type = "network";
-			device-id = <2>;
-			compatible = "fs_enet";
-			model = "FCC";
-			reg = <11320 20 8500 100 113b0 30>;
-			mac-address = [ 00 11 2F 99 44 54 ];
-			interrupts = <21 2>;
-			interrupt-parent = <&Cpm_pic>;
-			phy-handle = <&Phy1>;
-			rx-clock = <17>;
-			tx-clock = <18>;
-		};
-
-		cpm@f0000000 {
+		cpm@119c0 {
 			#address-cells = <1>;
 			#size-cells = <1>;
-			#interrupt-cells = <2>;
 			compatible = "fsl,mpc8272-cpm", "fsl,cpm2", "fsl,cpm";
-			ranges = <00000000 00000000 20000>;
-			reg = <0 20000>;
-			command-proc = <119c0>;
-			fsl,brg-frequency = <d#25000000>;
-			cpm_clk = <BEBC200>;
+			fsl,brg-frequency = <0>;
+			reg = <119c0 30 0 2000>;
+			ranges;
+
+			brg@119f0 {
+				compatible = "fsl,mpc8272-brg",
+				             "fsl,cpm2-brg",
+				             "fsl,cpm-brg";
+				reg = <119f0 10 115f0 10>;
+			};
 
-			scc@11a00 {
+			serial@11a00 {
 				device_type = "serial";
-				compatible = "cpm_uart";
-				model = "SCC";
-				device-id = <1>;
+				compatible = "fsl,mpc8272-scc-uart",
+				             "fsl,cpm2-scc-uart",
+				             "fsl,cpm2-uart",
+				             "fsl,cpm-scc-uart",
+				             "fsl,cpm-uart";
 				reg = <11a00 20 8000 100>;
-				current-speed = <1c200>;
-				interrupts = <28 2>;
-				interrupt-parent = <&Cpm_pic>;
-				clock-setup = <0 00ffffff>;
-				rx-clock = <1>;
-				tx-clock = <1>;
+				interrupts = <28 8>;
+				interrupt-parent = <&PIC>;
+				fsl,cpm-brg = <1>;
+				fsl,cpm-command = <00800000>;
 			};
 
-			scc@11a60 {
+			serial@11a60 {
 				device_type = "serial";
-				compatible = "cpm_uart";
-				model = "SCC";
-				device-id = <4>;
+				compatible = "fsl,mpc8272-scc-uart",
+				             "fsl,cpm2-scc-uart",
+				             "fsl,cpm2-uart",
+				             "fsl,cpm-scc-uart",
+				             "fsl,cpm-uart";
 				reg = <11a60 20 8300 100>;
-				current-speed = <1c200>;
-				interrupts = <2b 2>;
-				interrupt-parent = <&Cpm_pic>;
-				clock-setup = <1b ffffff00>;
-				rx-clock = <4>;
-				tx-clock = <4>;
+				interrupts = <2b 8>;
+				interrupt-parent = <&PIC>;
+				fsl,cpm-brg = <4>;
+				fsl,cpm-command = <0ce00000>;
+			};
+
+			mdio@10d40 {
+				device_type = "mdio";
+				compatible = "fsl,mpc8272ads-mdio-bitbang",
+				             "fsl,mpc8272-mdio-bitbang",
+				             "fsl,cpm2-mdio-bitbang";
+				reg = <10d40 14>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				fsl,mdio-pin = <12>;
+				fsl,mdc-pin = <13>;
+
+				PHY0: ethernet-phy@0 {
+					interrupt-parent = <&PIC>;
+					interrupts = <17 8>;
+					reg = <0>;
+					device_type = "ethernet-phy";
+				};
+
+				PHY1: ethernet-phy@1 {
+					interrupt-parent = <&PIC>;
+					interrupts = <17 8>;
+					reg = <3>;
+					device_type = "ethernet-phy";
+				};
+			};
+
+			ethernet@24000 {
+				device_type = "network";
+				compatible = "fsl,mpc8272-fcc-enet",
+				             "fsl,cpm2-fcc-enet",
+				             "fsl,cpm2-enet",
+				             "fsl,cpm-fcc-enet",
+				             "fsl,cpm-enet";
+				reg = <11300 20 8400 100 11380 30>;
+				local-mac-address = [ 00 00 00 00 00 00 ];
+				interrupts = <20 8>;
+				interrupt-parent = <&PIC>;
+				phy-handle = <&PHY0>;
+				linux,network-index = <0>;
+				fsl,cpm-command = <12000300>;
+			};
+
+			ethernet@25000 {
+				device_type = "network";
+				compatible = "fsl,mpc8272-fcc-enet",
+				             "fsl,cpm2-fcc-enet",
+				             "fsl,cpm2-enet",
+				             "fsl,cpm-fcc-enet",
+				             "fsl,cpm-enet";
+				reg = <11320 20 8500 100 113b0 30>;
+				local-mac-address = [ 00 00 00 00 00 00 ];
+				interrupts = <21 8>;
+				interrupt-parent = <&PIC>;
+				phy-handle = <&PHY1>;
+				linux,network-index = <1>;
+				fsl,cpm-command = <16200300>;
 			};
 		};
 
-		cpm_pic:interrupt-controller@10c00 {
-			#address-cells = <0>;
+		PIC: interrupt-controller@10c00 {
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			reg = <10c00 80>;
-			built-in;
-			compatible = "fsl,pq2-pic";
+			compatible = "fsl,mpc8272-pic", "fsl,pq2-pic";
 		};
 
-		pci@0500 {
+		pci@10800 {
 			#interrupt-cells = <1>;
 			#size-cells = <2>;
 			#address-cells = <3>;
-			compatible = "8272";
+			compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
 			device_type = "pci";
-			reg = <10430 4dc>;
-			clock-frequency = <3f940aa>;
+			reg = <10800 10c 101ac 8 101c4 8>;
+			clock-frequency = <d#66666666>;
 			interrupt-map-mask = <f800 0 0 7>;
 			interrupt-map = <
 			                /* IDSEL 0x16 */
-			                 b000 0 0 1 f8200000 40 8
-			                 b000 0 0 2 f8200000 41 8
-			                 b000 0 0 3 f8200000 42 8
-			                 b000 0 0 4 f8200000 43 8
+			                 b000 0 0 1 &PCI_PIC 0
+			                 b000 0 0 2 &PCI_PIC 1
+			                 b000 0 0 3 &PCI_PIC 2
+			                 b000 0 0 4 &PCI_PIC 3
 
 			                /* IDSEL 0x17 */
-			                 b800 0 0 1 f8200000 43 8
-			                 b800 0 0 2 f8200000 40 8
-			                 b800 0 0 3 f8200000 41 8
-			                 b800 0 0 4 f8200000 42 8
+			                 b800 0 0 1 &PCI_PIC 4
+			                 b800 0 0 2 &PCI_PIC 5
+			                 b800 0 0 3 &PCI_PIC 6
+			                 b800 0 0 4 &PCI_PIC 7
 
 			                /* IDSEL 0x18 */
-			                 c000 0 0 1 f8200000 42 8
-			                 c000 0 0 2 f8200000 43 8
-			                 c000 0 0 3 f8200000 40 8
-			                 c000 0 0 4 f8200000 41 8>;
-			interrupt-parent = <&Cpm_pic>;
-			interrupts = <14 8>;
-			bus-range = <0 0>;
-			ranges = <02000000 0 80000000 80000000 0 40000000
+			                 c000 0 0 1 &PCI_PIC 8
+			                 c000 0 0 2 &PCI_PIC 9
+			                 c000 0 0 3 &PCI_PIC a
+			                 c000 0 0 4 &PCI_PIC b>;
+
+			interrupt-parent = <&PIC>;
+			interrupts = <12 8>;
+			ranges = <42000000 0 80000000 80000000 0 20000000
+			          02000000 0 a0000000 a0000000 0 20000000
 			          01000000 0 00000000 f6000000 0 02000000>;
 		};
 
@@ -202,10 +236,13 @@
 		crypto@30000 {
 			device_type = "crypto";
 			model = "SEC2";
-			compatible = "talitos";
+			compatible = "fsl,mpc8272-talitos-sec2",
+			             "fsl,talitos-sec2",
+			             "fsl,talitos",
+			             "talitos";
 			reg = <30000 10000>;
-			interrupts = <b 2>;
-			interrupt-parent = <&Cpm_pic>;
+			interrupts = <b 8>;
+			interrupt-parent = <&PIC>;
 			num-channels = <4>;
 			channel-fifo-len = <18>;
 			exec-units-mask = <0000007e>;
@@ -213,4 +250,8 @@
 			descriptor-types-mask = <01010ebf>;
 		};
 	};
+
+	chosen {
+		linux,stdout-path = "/soc/cpm/serial@11a00";
+	};
 };
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 847a095..9a52257 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -237,10 +237,16 @@
 			#interrupt-cells = <2>;
 			compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "fsl,cpm";
 			ranges = <0 0 c0000>;
-			reg = <80000 40000>;
-			command-proc = <919c0>;
+			reg = <919c0 30 80000 4000>;
 			fsl,brg-frequency = <d#165000000>;
 
+			brg@919f0 {
+				compatible = "fsl,mpc8560-brg",
+				             "fsl,cpm2-brg",
+				             "fsl,cpm-brg";
+				reg = <119f0 10 115f0 10>;
+			};
+
 			cpmpic: pic@90c00 {
 				interrupt-controller;
 				#address-cells = <0>;
@@ -252,39 +258,41 @@
 				compatible = "fsl,pq2-pic";
 			};
 
-			scc@91a00 {
+			serial@91a00 {
 				device_type = "serial";
-				compatible = "cpm_uart";
-				model = "SCC";
-				device-id = <1>;
+				compatible = "fsl,mpc8560-scc-uart",
+				             "fsl,cpm2-scc-uart",
+				             "fsl,cpm2-uart",
+				             "fsl,cpm-scc-uart",
+				             "fsl,cpm-uart";
 				reg = <91a00 20 88000 100>;
-				clock-setup = <00ffffff 0>;
-				rx-clock = <1>;
-				tx-clock = <1>;
-				current-speed = <1c200>;
 				interrupts = <28 8>;
 				interrupt-parent = <&cpmpic>;
+				fsl,cpm-brg = <1>;
+				fsl,cpm-command = <00800000>;
 			};
 
-			scc@91a20 {
+			serial@91a20 {
 				device_type = "serial";
-				compatible = "cpm_uart";
-				model = "SCC";
-				device-id = <2>;
+				compatible = "fsl,mpc8560-scc-uart",
+				             "fsl,cpm2-scc-uart",
+				             "fsl,cpm2-uart",
+				             "fsl,cpm-scc-uart",
+				             "fsl,cpm-uart";
 				reg = <91a20 20 88100 100>;
-				clock-setup = <ff00ffff 90000>;
-				rx-clock = <2>;
-				tx-clock = <2>;
-				current-speed = <1c200>;
 				interrupts = <29 8>;
 				interrupt-parent = <&cpmpic>;
+				fsl,cpm-brg = <2>;
+				fsl,cpm-command = <04a00000>;
 			};
 
-			fcc@91320 {
+			ethernet@91320 {
 				device_type = "network";
-				compatible = "fs_enet";
-				model = "FCC";
-				device-id = <2>;
+				compatible = "fsl,mpc8560-fcc-enet",
+				             "fsl,cpm2-fcc-enet",
+				             "fsl,cpm2-enet",
+				             "fsl,cpm-fcc-enet",
+				             "fsl,cpm-enet";
 				reg = <91320 20 88500 100 913a0 30>;
 				/*
 				 * mac-address is deprecated and will be removed
@@ -293,19 +301,19 @@
 				 */
 				mac-address = [ 00 00 00 00 00 00 ];
 				local-mac-address = [ 00 00 00 00 00 00 ];
-				clock-setup = <ff00ffff 250000>;
-				rx-clock = <15>;
-				tx-clock = <16>;
 				interrupts = <21 8>;
 				interrupt-parent = <&cpmpic>;
 				phy-handle = <&phy2>;
+				fsl,cpm-command = <16200300>;
 			};
 
-			fcc@91340 {
+			ethernet@91340 {
 				device_type = "network";
-				compatible = "fs_enet";
-				model = "FCC";
-				device-id = <3>;
+				compatible = "fsl,mpc8560-fcc-enet",
+				             "fsl,cpm2-fcc-enet",
+				             "fsl,cpm2-enet",
+				             "fsl,cpm-fcc-enet",
+				             "fsl,cpm-enet";
 				reg = <91340 20 88600 100 913d0 30>;
 				/*
 				 * mac-address is deprecated and will be removed
@@ -314,12 +322,10 @@
 				 */
 				mac-address = [ 00 00 00 00 00 00 ];
 				local-mac-address = [ 00 00 00 00 00 00 ];
-				clock-setup = <ffff00ff 3700>;
-				rx-clock = <17>;
-				tx-clock = <18>;
 				interrupts = <22 8>;
 				interrupt-parent = <&cpmpic>;
 				phy-handle = <&phy3>;
+				fsl,cpm-command = <1a400300>;
 			};
 		};
 	};
-- 
1.5.0.3

Re: [PATCH 38/61] cpm2: Update device trees.

[Vitaly Bordug]

On Tue, 17 Jul 2007 20:35:50 -0500
Scott Wood wrote:

> +				             "fsl,cpm-uart";
>  				reg = <11a00 20 8000 100>;
> -				current-speed = <1c200>;
Hmm, how is it supposed to work without speed? I was testing my u-boot OF bindings for 82xx and spotted into it.


-- 
Sincerely, Vitaly

Re: [PATCH 38/61] cpm2: Update device trees.

[Scott Wood]

Vitaly Bordug wrote:
> On Tue, 17 Jul 2007 20:35:50 -0500
> Scott Wood wrote:
> 
> 
>>+				             "fsl,cpm-uart";
>> 				reg = <11a00 20 8000 100>;
>>-				current-speed = <1c200>;
> 
> Hmm, how is it supposed to work without speed? I was testing my u-boot OF bindings for 82xx and spotted into it.

The same way all the other device trees without current-speed work -- 
one passes console=whatever on the command line.

Feel free to have u-boot add the actual current speed (rather than a 
hardcoded default speed) if you want, though.

-Scott

Re: [PATCH 38/61] cpm2: Update device trees.

[Segher Boessenkool]

>> +				             "fsl,cpm-uart";
>>  				reg = <11a00 20 8000 100>;
>> -				current-speed = <1c200>;
> Hmm, how is it supposed to work without speed? I was testing my u- 
> boot OF bindings for 82xx and spotted into it.

"current-speed" cannot be a required property for serial
devices (it is only valid if the device is active at boot
time).


Segher

[PATCH 39/61] mpc885ads: Whitespace cleanup (space->tab)

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/platforms/8xx/m8xx_setup.c |   72 +++++++++++++++---------------
 1 files changed, 36 insertions(+), 36 deletions(-)

diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index f169355..601b389 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -89,24 +89,24 @@ init_internal_rtc(void)
 
 static int __init get_freq(char *name, unsigned long *val)
 {
-        struct device_node *cpu;
-        const unsigned int *fp;
-        int found = 0;
+	struct device_node *cpu;
+	const unsigned int *fp;
+	int found = 0;
 
-        /* The cpu node should have timebase and clock frequency properties */
-        cpu = of_find_node_by_type(NULL, "cpu");
+	/* The cpu node should have timebase and clock frequency properties */
+	cpu = of_find_node_by_type(NULL, "cpu");
 
-        if (cpu) {
-                fp = of_get_property(cpu, name, NULL);
-                if (fp) {
-                        found = 1;
-                        *val = *fp;
-                }
+	if (cpu) {
+		fp = of_get_property(cpu, name, NULL);
+		if (fp) {
+			found = 1;
+			*val = *fp;
+		}
 
-                of_node_put(cpu);
-        }
+		of_node_put(cpu);
+	}
 
-        return found;
+	return found;
 }
 
 /* The decrementer counts at the system (internal) clock frequency divided by
@@ -122,7 +122,7 @@ void __init mpc8xx_calibrate_decr(void)
 	sit8xx_t *sys_tmr2;
 	int irq, virq;
 
-        clk_r1 = (cark8xx_t *) immr_map(im_clkrstk);
+	clk_r1 = (cark8xx_t *) immr_map(im_clkrstk);
 
 	/* Unlock the SCCR. */
 	out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY);
@@ -130,24 +130,24 @@ void __init mpc8xx_calibrate_decr(void)
 	immr_unmap(clk_r1);
 
 	/* Force all 8xx processors to use divide by 16 processor clock. */
-        clk_r2 = (car8xx_t *) immr_map(im_clkrst);
+	clk_r2 = (car8xx_t *) immr_map(im_clkrst);
 	setbits32(&clk_r2->car_sccr, 0x02000000);
 	immr_unmap(clk_r2);
 
 	/* Processor frequency is MHz.
 	 */
-        ppc_tb_freq = 50000000;
-        if (!get_freq("bus-frequency", &ppc_tb_freq)) {
-                printk(KERN_ERR "WARNING: Estimating decrementer frequency "
-                                "(not found)\n");
-        }
-        ppc_tb_freq /= 16;
-        ppc_proc_freq = 50000000;
-        if (!get_freq("clock-frequency", &ppc_proc_freq))
-                printk(KERN_ERR "WARNING: Estimating processor frequency"
-                                "(not found)\n");
-
-        printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
+	ppc_tb_freq = 50000000;
+	if (!get_freq("bus-frequency", &ppc_tb_freq)) {
+		printk(KERN_ERR "WARNING: Estimating decrementer frequency "
+		                "(not found)\n");
+	}
+	ppc_tb_freq /= 16;
+	ppc_proc_freq = 50000000;
+	if (!get_freq("clock-frequency", &ppc_proc_freq))
+		printk(KERN_ERR "WARNING: Estimating processor frequency"
+		                "(not found)\n");
+
+	printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
 
 	/* Perform some more timer/timebase initialization.  This used
 	 * to be done elsewhere, but other changes caused it to get
@@ -164,7 +164,7 @@ void __init mpc8xx_calibrate_decr(void)
 	 * we guarantee the registers are locked, then we unlock them
 	 * for our use.
 	 */
-        sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
+	sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
 	out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY);
 	out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY);
 	out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY);
@@ -180,8 +180,8 @@ void __init mpc8xx_calibrate_decr(void)
 	 * we have to enable the timebase).  The decrementer interrupt
 	 * is wired into the vector table, nothing to do here for that.
 	 */
-        cpu = of_find_node_by_type(NULL, "cpu");
-        virq= irq_of_parse_and_map(cpu, 0);
+	cpu = of_find_node_by_type(NULL, "cpu");
+	virq= irq_of_parse_and_map(cpu, 0);
 	irq = irq_map[virq].hwirq;
 
 	sys_tmr2 = (sit8xx_t *) immr_map(im_sit);
@@ -211,10 +211,10 @@ int mpc8xx_set_rtc_time(struct rtc_time *tm)
 	sit8xx_t *sys_tmr2;
 	int time;
 
-        sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
+	sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
 	sys_tmr2 = (sit8xx_t *) immr_map(im_sit);
 	time = mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday,
-                      tm->tm_hour, tm->tm_min, tm->tm_sec);
+	              tm->tm_hour, tm->tm_min, tm->tm_sec);
 
 	out_be32(&sys_tmr1->sitk_rtck, KAPWR_KEY);
 	out_be32(&sys_tmr2->sit_rtc, time);
@@ -233,8 +233,8 @@ void mpc8xx_get_rtc_time(struct rtc_time *tm)
 	/* Get time from the RTC. */
 	data = in_be32(&sys_tmr->sit_rtc);
 	to_tm(data, tm);
-        tm->tm_year -= 1900;
-        tm->tm_mon -= 1;
+	tm->tm_year -= 1900;
+	tm->tm_mon -= 1;
 	immr_unmap(sys_tmr);
 	return;
 }
@@ -298,7 +298,7 @@ void __init m8xx_pic_init(void)
 	int irq;
 
 	if (mpc8xx_pic_init()) {
-                printk(KERN_ERR "Failed interrupt 8xx controller  initialization\n");
+		printk(KERN_ERR "Failed interrupt 8xx controller  initialization\n");
 		return;
 	}
 
-- 
1.5.0.3

Re: [PATCH 39/61] mpc885ads: Whitespace cleanup (space->tab)

[Kumar Gala]

On Jul 17, 2007, at 8:35 PM, Scott Wood wrote:

> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
>  arch/powerpc/platforms/8xx/m8xx_setup.c |   72 ++++++++++++++ 
> +---------------
>  1 files changed, 36 insertions(+), 36 deletions(-)

There is a white space cleanup patch in linus's tree that probably  
superseded this.

- k

[PATCH 40/61] 8xx: Whitespace cleanup in commproc.c

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/commproc.c |   20 ++++++++++----------
 1 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index 4f67b89..e8e79f8 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -45,10 +45,10 @@
 #define CPM_MAP_SIZE    (0x4000)
 
 static void m8xx_cpm_dpinit(void);
-static	uint	host_buffer;	/* One page of host buffer */
-static	uint	host_end;	/* end + 1 */
-cpm8xx_t	*cpmp;		/* Pointer to comm processor space */
-cpic8xx_t	*cpic_reg;
+static uint host_buffer; /* One page of host buffer */
+static uint host_end;    /* end + 1 */
+cpm8xx_t *cpmp;          /* Pointer to comm processor space */
+cpic8xx_t *cpic_reg;
 
 static struct device_node *cpm_pic_node;
 static struct irq_host *cpm_pic_host;
@@ -115,7 +115,7 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
  * and return.  This is a no-op function so we don't need any special
  * tests in the interrupt handler.
  */
-static	irqreturn_t cpm_error_interrupt(int irq, void *dev)
+static irqreturn_t cpm_error_interrupt(int irq, void *dev)
 {
 	return IRQ_HANDLED;
 }
@@ -181,7 +181,7 @@ unsigned int cpm_pic_init(void)
 		printk(KERN_ERR "CPM PIC init: can not find cpm node\n");
 		goto end;
 	}
-	eirq= irq_of_parse_and_map(np, 0);
+	eirq = irq_of_parse_and_map(np, 0);
 	if (eirq == NO_IRQ)
 		goto end;
 
@@ -197,15 +197,15 @@ end:
 
 void cpm_reset(void)
 {
-	cpm8xx_t	*commproc;
-	sysconf8xx_t    *siu_conf;
+	cpm8xx_t *commproc;
+	sysconf8xx_t *siu_conf;
 
 	commproc = (cpm8xx_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
 
 #ifdef CONFIG_UCODE_PATCH
 	/* Perform a reset.
 	*/
-	out_be16(&commproc->cp_cpcr,  CPM_CR_RST | CPM_CR_FLG);
+	out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
 
 	/* Wait for it.
 	*/
@@ -307,7 +307,7 @@ static rh_block_t cpm_boot_dpmem_rh_block[16];
 static rh_info_t cpm_dpmem_info;
 
 #define CPM_DPMEM_ALIGNMENT	8
-static u8* dpram_vbase;
+static u8 *dpram_vbase;
 static uint dpram_pbase;
 
 void m8xx_cpm_dpinit(void)
-- 
1.5.0.3

[PATCH 41/61] 8xx: Keep a global mpc8xx_immr mapping.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/commproc.c |   20 +++++++++++---------
 include/asm-powerpc/fs_pd.h    |   21 +++++----------------
 2 files changed, 16 insertions(+), 25 deletions(-)

diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index e8e79f8..f73e96d 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -48,6 +48,7 @@ static void m8xx_cpm_dpinit(void);
 static uint host_buffer; /* One page of host buffer */
 static uint host_end;    /* end + 1 */
 cpm8xx_t *cpmp;          /* Pointer to comm processor space */
+immap_t *mpc8xx_immr;
 cpic8xx_t *cpic_reg;
 
 static struct device_node *cpm_pic_node;
@@ -197,21 +198,26 @@ end:
 
 void cpm_reset(void)
 {
-	cpm8xx_t *commproc;
 	sysconf8xx_t *siu_conf;
 
-	commproc = (cpm8xx_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
+	mpc8xx_immr = ioremap(get_immrbase(), 0x4000);
+	if (!mpc8xx_immr) {
+		printk(KERN_CRIT "Could not map IMMR\n");
+		return;
+	}
+
+	cpmp = &mpc8xx_immr->im_cpm;
 
 #ifdef CONFIG_UCODE_PATCH
 	/* Perform a reset.
 	*/
-	out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
+	out_be16(&cpmp->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
 
 	/* Wait for it.
 	*/
-	while (in_be16(&commproc->cp_cpcr) & CPM_CR_FLG);
+	while (in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG);
 
-	cpm_load_patch(commproc);
+	cpm_load_patch(cpmp);
 #endif
 
 	/* Set SDMA Bus Request priority 5.
@@ -226,10 +232,6 @@ void cpm_reset(void)
 
 	/* Reclaim the DP memory for our use. */
 	m8xx_cpm_dpinit();
-
-	/* Tell everyone where the comm processor resides.
-	*/
-	cpmp = commproc;
 }
 
 /* We used to do this earlier, but have to postpone as long as possible
diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h
index 2179a5a..82536a2 100644
--- a/include/asm-powerpc/fs_pd.h
+++ b/include/asm-powerpc/fs_pd.h
@@ -32,22 +32,11 @@
 #include <asm/8xx_immap.h>
 #include <asm/mpc8xx.h>
 
-#define immr_map(member)						\
-({									\
-	u32 offset = offsetof(immap_t, member);				\
-	void *addr = ioremap (IMAP_ADDR + offset,			\
-			      sizeof( ((immap_t*)0)->member));		\
-	addr;								\
-})
-
-#define immr_map_size(member, size)					\
-({									\
-	u32 offset = offsetof(immap_t, member);				\
-	void *addr = ioremap (IMAP_ADDR + offset, size);		\
-	addr;								\
-})
-
-#define immr_unmap(addr)		iounmap(addr)
+extern immap_t *mpc8xx_immr;
+
+#define immr_map(member) (&mpc8xx_immr->member)
+#define immr_map_size(member, size) (&mpc8xx_immr->member)
+#define immr_unmap(addr) iounmap(addr)
 #endif
 
 static inline int uart_baudrate(void)
-- 
1.5.0.3

[PATCH 42/61] 8xx: commproc.c: Use better OF names.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/dts/mpc866ads.dts |    3 +--
 arch/powerpc/boot/dts/mpc885ads.dts |    3 +--
 arch/powerpc/sysdev/commproc.c      |    6 +++---
 3 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index b3dbfe8..1807086 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -103,8 +103,7 @@
 				interrupt-parent = <&Mpc8xx_pic>;
 				reg = <930 20>;
 				built-in;
-				device_type = "cpm-pic";
-				compatible = "CPM";
+				compatible = "fsl,mpc866-cpm-pic", "fsl,cpm1-pic";
 			};
 
 			smc@a80 {
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index 8372469..48717ed 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -134,8 +134,7 @@
 				interrupt-parent = <&Mpc8xx_pic>;
 				reg = <930 20>;
 				built-in;
-				device_type = "cpm-pic";
-				compatible = "CPM";
+				compatible = "fsl,mpc885-cpm-pic", "fsl,cpm1-pic";
 			};
 
 			smc@a80 {
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index f73e96d..b0a58fd 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -141,9 +141,9 @@ unsigned int cpm_pic_init(void)
 
 	pr_debug("cpm_pic_init\n");
 
-	np = of_find_compatible_node(NULL, "cpm-pic", "CPM");
+	np = of_find_compatible_node(NULL, NULL, "fsl,cpm1-pic");
 	if (np == NULL) {
-		printk(KERN_ERR "CPM PIC init: can not find cpm-pic node\n");
+		printk(KERN_ERR "CPM PIC init: can not find fsl,cpm1-pic node\n");
 		return sirq;
 	}
 	ret = of_address_to_resource(np, 0, &res);
@@ -177,7 +177,7 @@ unsigned int cpm_pic_init(void)
 	of_node_put(np);
 
 	/* Install our own error handler. */
-	np = of_find_node_by_type(NULL, "cpm");
+	np = of_find_compatible_node(NULL, NULL, "fsl,cpm1");
 	if (np == NULL) {
 		printk(KERN_ERR "CPM PIC init: can not find cpm node\n");
 		goto end;
-- 
1.5.0.3

[PATCH 43/61] 8xx: Always reset CPM if not using early console.

[Scott Wood]

Some CPM devices conflict with each other, and the bootloader
may have initialized a conflicting device.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/commproc.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index b0a58fd..eb791ea 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -208,7 +208,7 @@ void cpm_reset(void)
 
 	cpmp = &mpc8xx_immr->im_cpm;
 
-#ifdef CONFIG_UCODE_PATCH
+#ifndef CONFIG_PPC_EARLY_DEBUG
 	/* Perform a reset.
 	*/
 	out_be16(&cpmp->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
@@ -216,7 +216,9 @@ void cpm_reset(void)
 	/* Wait for it.
 	*/
 	while (in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG);
+#endif
 
+#ifdef CONFIG_UCODE_PATCH
 	cpm_load_patch(cpmp);
 #endif
 
-- 
1.5.0.3

[PATCH 44/61] 8xx: Miscellaneous commproc.c cleanup.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/commproc.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index eb791ea..699bbd2 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -228,7 +228,7 @@ void cpm_reset(void)
 	 * manual recommends it.
 	 * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
 	 */
-	siu_conf = (sysconf8xx_t*)immr_map(im_siu_conf);
+	siu_conf = immr_map(im_siu_conf);
 	out_be32(&siu_conf->sc_sdcr, 1);
 	immr_unmap(siu_conf);
 
@@ -312,14 +312,14 @@ static rh_info_t cpm_dpmem_info;
 
 #define CPM_DPMEM_ALIGNMENT	8
 static u8 *dpram_vbase;
-static uint dpram_pbase;
+static unsigned long dpram_pbase;
 
 void m8xx_cpm_dpinit(void)
 {
 	spin_lock_init(&cpm_dpmem_lock);
 
-	dpram_vbase = immr_map_size(im_cpm.cp_dpmem, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE);
-	dpram_pbase = (uint)&((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem;
+	dpram_vbase = cpmp->cp_dpmem;
+	dpram_pbase = get_immrbase() + offsetof(immap_t, im_cpm.cp_dpmem);
 
 	/* Initialize the info header */
 	rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT,
-- 
1.5.0.3

[PATCH 45/61] 8xx: Add pin and clock setting functions.

[Scott Wood]

These let board code set up pins and clocks without having to
put magic numbers directly into the registers.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/commproc.c |  196 ++++++++++++++++++++++++++++++++++++++++
 include/asm-ppc/commproc.h     |   40 ++++++++
 2 files changed, 236 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index 699bbd2..cf27a09 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -400,3 +400,199 @@ uint cpm_dpram_phys(u8* addr)
 	return (dpram_pbase + (uint)(addr - dpram_vbase));
 }
 EXPORT_SYMBOL(cpm_dpram_addr);
+
+struct cpm_ioport16 {
+	u16 dir, par, sor, dat, intr;
+	u16 res[3];
+};
+
+struct cpm_ioport32 {
+	u32 dir, par, sor;
+};
+
+void cpm1_set_pin32(int port, int pin, int flags)
+{
+	struct cpm_ioport32 __iomem *iop;
+	pin = 1 << (31 - pin);
+
+	if (port == 1)
+		iop = (struct cpm_ioport32 __iomem *)
+		      &mpc8xx_immr->im_cpm.cp_pbdir;
+	else
+		iop = (struct cpm_ioport32 __iomem *)
+		      &mpc8xx_immr->im_cpm.cp_pedir;
+
+	if (flags & CPM_PIN_OUTPUT)
+		setbits32(&iop->dir, pin);
+	else
+		clrbits32(&iop->dir, pin);
+
+	if (!(flags & CPM_PIN_GPIO))
+		setbits32(&iop->par, pin);
+	else
+		clrbits32(&iop->par, pin);
+
+	if (port == 4) {
+		if (flags & CPM_PIN_SECONDARY)
+			setbits32(&iop->sor, pin);
+		else
+			clrbits32(&iop->sor, pin);
+	}
+}
+
+void cpm1_set_pin16(int port, int pin, int flags)
+{
+	struct cpm_ioport16 __iomem *iop =
+		(struct cpm_ioport16 __iomem *)&mpc8xx_immr->im_ioport;
+
+	pin = 1 << (15 - pin);
+
+	if (port != 0)
+		iop += port - 1;
+
+	if (flags & CPM_PIN_OUTPUT)
+		setbits16(&iop->dir, pin);
+	else
+		clrbits16(&iop->dir, pin);
+
+	if (!(flags & CPM_PIN_GPIO))
+		setbits16(&iop->par, pin);
+	else
+		clrbits16(&iop->par, pin);
+
+	if (port == 2) {
+		if (flags & CPM_PIN_SECONDARY)
+			setbits16(&iop->sor, pin);
+		else
+			clrbits16(&iop->sor, pin);
+	}
+}
+
+void cpm1_set_pin(int port, int pin, int flags)
+{
+	if (port == 1 || port == 4)
+		cpm1_set_pin32(port, pin, flags);
+	else
+		cpm1_set_pin16(port, pin, flags);
+}
+
+int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
+{
+	int shift;
+	int i, bits = 0;
+	u32 *reg;
+	u32 mask = 7;
+
+	u8 clk_map[][3] = {
+		{CPM_CLK_SCC1, CPM_BRG1, 0},
+		{CPM_CLK_SCC1, CPM_BRG2, 1},
+		{CPM_CLK_SCC1, CPM_BRG3, 2},
+		{CPM_CLK_SCC1, CPM_BRG4, 3},
+		{CPM_CLK_SCC1, CPM_CLK1, 4},
+		{CPM_CLK_SCC1, CPM_CLK2, 5},
+		{CPM_CLK_SCC1, CPM_CLK3, 6},
+		{CPM_CLK_SCC1, CPM_CLK4, 7},
+
+		{CPM_CLK_SCC2, CPM_BRG1, 0},
+		{CPM_CLK_SCC2, CPM_BRG2, 1},
+		{CPM_CLK_SCC2, CPM_BRG3, 2},
+		{CPM_CLK_SCC2, CPM_BRG4, 3},
+		{CPM_CLK_SCC2, CPM_CLK1, 4},
+		{CPM_CLK_SCC2, CPM_CLK2, 5},
+		{CPM_CLK_SCC2, CPM_CLK3, 6},
+		{CPM_CLK_SCC2, CPM_CLK4, 7},
+
+		{CPM_CLK_SCC3, CPM_BRG1, 0},
+		{CPM_CLK_SCC3, CPM_BRG2, 1},
+		{CPM_CLK_SCC3, CPM_BRG3, 2},
+		{CPM_CLK_SCC3, CPM_BRG4, 3},
+		{CPM_CLK_SCC3, CPM_CLK5, 4},
+		{CPM_CLK_SCC3, CPM_CLK6, 5},
+		{CPM_CLK_SCC3, CPM_CLK7, 6},
+		{CPM_CLK_SCC3, CPM_CLK8, 7},
+
+		{CPM_CLK_SCC4, CPM_BRG1, 0},
+		{CPM_CLK_SCC4, CPM_BRG2, 1},
+		{CPM_CLK_SCC4, CPM_BRG3, 2},
+		{CPM_CLK_SCC4, CPM_BRG4, 3},
+		{CPM_CLK_SCC4, CPM_CLK5, 4},
+		{CPM_CLK_SCC4, CPM_CLK6, 5},
+		{CPM_CLK_SCC4, CPM_CLK7, 6},
+		{CPM_CLK_SCC4, CPM_CLK8, 7},
+
+		{CPM_CLK_SMC1, CPM_BRG1, 0},
+		{CPM_CLK_SMC1, CPM_BRG2, 1},
+		{CPM_CLK_SMC1, CPM_BRG3, 2},
+		{CPM_CLK_SMC1, CPM_BRG4, 3},
+		{CPM_CLK_SMC1, CPM_CLK1, 4},
+		{CPM_CLK_SMC1, CPM_CLK2, 5},
+		{CPM_CLK_SMC1, CPM_CLK3, 6},
+		{CPM_CLK_SMC1, CPM_CLK4, 7},
+
+		{CPM_CLK_SMC2, CPM_BRG1, 0},
+		{CPM_CLK_SMC2, CPM_BRG2, 1},
+		{CPM_CLK_SMC2, CPM_BRG3, 2},
+		{CPM_CLK_SMC2, CPM_BRG4, 3},
+		{CPM_CLK_SMC2, CPM_CLK5, 4},
+		{CPM_CLK_SMC2, CPM_CLK6, 5},
+		{CPM_CLK_SMC2, CPM_CLK7, 6},
+		{CPM_CLK_SMC2, CPM_CLK8, 7},
+	};
+
+	switch (target) {
+	case CPM_CLK_SCC1:
+		reg = &mpc8xx_immr->im_cpm.cp_sicr;
+		shift = 0;
+		break;
+
+	case CPM_CLK_SCC2:
+		reg = &mpc8xx_immr->im_cpm.cp_sicr;
+		shift = 8;
+		break;
+
+	case CPM_CLK_SCC3:
+		reg = &mpc8xx_immr->im_cpm.cp_sicr;
+		shift = 16;
+		break;
+
+	case CPM_CLK_SCC4:
+		reg = &mpc8xx_immr->im_cpm.cp_sicr;
+		shift = 24;
+		break;
+
+	case CPM_CLK_SMC1:
+		reg = &mpc8xx_immr->im_cpm.cp_simode;
+		shift = 12;
+		break;
+
+	case CPM_CLK_SMC2:
+		reg = &mpc8xx_immr->im_cpm.cp_simode;
+		shift = 28;
+		break;
+
+	default:
+		printk(KERN_ERR "cpm1_clock_setup: invalid clock target\n");
+		return -EINVAL;
+	}
+
+	if (reg == &mpc8xx_immr->im_cpm.cp_sicr && mode == CPM_CLK_RX)
+		shift += 3;
+
+	for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
+		if (clk_map[i][0] == target && clk_map[i][1] == clock) {
+			bits = clk_map[i][2];
+			break;
+		}
+	}
+
+	if (i == ARRAY_SIZE(clk_map)) {
+		printk(KERN_ERR "cpm1_clock_setup: invalid clock combination\n");
+		return -EINVAL;
+	}
+
+	bits <<= shift;
+	mask <<= shift;
+	out_be32(reg, (in_be32(reg) & ~mask) | bits);
+
+	return 0;
+}
diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h
index 3972487..6d388bd 100644
--- a/include/asm-ppc/commproc.h
+++ b/include/asm-ppc/commproc.h
@@ -689,4 +689,44 @@ typedef struct risc_timer_pram {
 extern void cpm_install_handler(int vec, void (*handler)(void *), void *dev_id);
 extern void cpm_free_handler(int vec);
 
+#define CPM_PIN_INPUT     0
+#define CPM_PIN_OUTPUT    1
+#define CPM_PIN_PRIMARY   0
+#define CPM_PIN_SECONDARY 2
+#define CPM_PIN_GPIO      4
+
+void cpm1_set_pin(int port, int pin, int flags);
+
+enum cpm_clk_dir {
+	CPM_CLK_RX,
+	CPM_CLK_TX,
+	CPM_CLK_RTX
+};
+
+enum cpm_clk_target {
+	CPM_CLK_SCC1,
+	CPM_CLK_SCC2,
+	CPM_CLK_SCC3,
+	CPM_CLK_SCC4,
+	CPM_CLK_SMC1,
+	CPM_CLK_SMC2,
+};
+
+enum cpm_clk {
+	CPM_BRG1,	/* Baud Rate Generator  1 */
+	CPM_BRG2,	/* Baud Rate Generator  2 */
+	CPM_BRG3,	/* Baud Rate Generator  3 */
+	CPM_BRG4,	/* Baud Rate Generator  4 */
+	CPM_CLK1,	/* Clock  1 */
+	CPM_CLK2,	/* Clock  2 */
+	CPM_CLK3,	/* Clock  3 */
+	CPM_CLK4,	/* Clock  4 */
+	CPM_CLK5,	/* Clock  5 */
+	CPM_CLK6,	/* Clock  6 */
+	CPM_CLK7,	/* Clock  7 */
+	CPM_CLK8,	/* Clock  8 */
+};
+
+int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode);
+
 #endif /* __CPM_8XX__ */
-- 
1.5.0.3

[PATCH 46/61] mpc885ads: Rework initialization.

[Scott Wood]

It now uses the generic pin/clock functions, among other assorted fixes and
cleanup.

The ioport init and device exclusion callbacks are now gone.

The PCMCIA fsl_soc.c code is now gone, since of_platform_bus_probe() is
now used.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/platforms/8xx/mpc885ads.h       |   38 ---
 arch/powerpc/platforms/8xx/mpc885ads_setup.c |  448 ++++++++-----------------
 arch/powerpc/sysdev/fsl_soc.c                |   25 --
 3 files changed, 144 insertions(+), 367 deletions(-)

diff --git a/arch/powerpc/platforms/8xx/mpc885ads.h b/arch/powerpc/platforms/8xx/mpc885ads.h
index 7c31aec..4df3c19 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads.h
+++ b/arch/powerpc/platforms/8xx/mpc885ads.h
@@ -18,18 +18,6 @@
 #include <asm/ppcboot.h>
 #include <sysdev/fsl_soc.h>
 
-/* U-Boot maps BCSR to 0xff080000 */
-#define BCSR_ADDR		((uint)0xff080000)
-#define BCSR_SIZE		((uint)32)
-#define BCSR0			((uint)(BCSR_ADDR + 0x00))
-#define BCSR1			((uint)(BCSR_ADDR + 0x04))
-#define BCSR2			((uint)(BCSR_ADDR + 0x08))
-#define BCSR3			((uint)(BCSR_ADDR + 0x0c))
-#define BCSR4			((uint)(BCSR_ADDR + 0x10))
-
-#define CFG_PHYDEV_ADDR		((uint)0xff0a0000)
-#define BCSR5			((uint)(CFG_PHYDEV_ADDR + 0x300))
-
 #define IMAP_ADDR		(get_immrbase())
 #define IMAP_SIZE		((uint)(64 * 1024))
 
@@ -37,9 +25,6 @@
 #define CPM_MAP_ADDR		(get_immrbase() + MPC8xx_CPM_OFFSET)
 #define CPM_IRQ_OFFSET		16     // for compability with cpm_uart driver
 
-#define PCMCIA_MEM_ADDR		((uint)0xff020000)
-#define PCMCIA_MEM_SIZE		((uint)(64 * 1024))
-
 /* Bits of interest in the BCSRs.
  */
 #define BCSR1_ETHEN		((uint)0x20000000)
@@ -68,28 +53,5 @@
 #define BCSR5_MII1_EN		0x02
 #define BCSR5_MII1_RST		0x01
 
-/* Interrupt level assignments */
-#define PHY_INTERRUPT	SIU_IRQ7	/* PHY link change interrupt */
-#define SIU_INT_FEC1	SIU_LEVEL1	/* FEC1 interrupt */
-#define SIU_INT_FEC2	SIU_LEVEL3	/* FEC2 interrupt */
-#define FEC_INTERRUPT	SIU_INT_FEC1	/* FEC interrupt */
-
-/* We don't use the 8259 */
-#define NR_8259_INTS	0
-
-/* CPM Ethernet through SCC3 */
-#define PA_ENET_RXD	((ushort)0x0040)
-#define PA_ENET_TXD	((ushort)0x0080)
-#define PE_ENET_TCLK	((uint)0x00004000)
-#define PE_ENET_RCLK	((uint)0x00008000)
-#define PE_ENET_TENA	((uint)0x00000010)
-#define PC_ENET_CLSN	((ushort)0x0400)
-#define PC_ENET_RENA	((ushort)0x0800)
-
-/* Control bits in the SICR to route TCLK (CLK5) and RCLK (CLK6) to
- * SCC3.  Also, make sure GR3 (bit 8) and SC3 (bit 9) are zero */
-#define SICR_ENET_MASK	((uint)0x00ff0000)
-#define SICR_ENET_CLKRT	((uint)0x002c0000)
-
 #endif /* __ASM_MPC885ADS_H__ */
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index dc27dab..940fe54 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -6,6 +6,9 @@
  *
  * Copyright 2005 MontaVista Software Inc.
  *
+ * Heavily modified by Scott Wood <scottwood@freescale.com>
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
  * This file is licensed under the terms of the GNU General Public License
  * version 2. This program is licensed "as is" without any warranty of any
  * kind, whether express or implied.
@@ -18,7 +21,6 @@
 #include <linux/ioport.h>
 #include <linux/device.h>
 #include <linux/delay.h>
-#include <linux/root_dev.h>
 
 #include <linux/fs_enet_pd.h>
 #include <linux/fs_uart_pd.h>
@@ -37,7 +39,8 @@
 #include <asm/8xx_immap.h>
 #include <asm/commproc.h>
 #include <asm/fs_pd.h>
-#include <asm/prom.h>
+#include <asm/of_platform.h>
+#include <asm/udbg.h>
 
 extern void cpm_reset(void);
 extern void mpc8xx_show_cpuinfo(struct seq_file*);
@@ -48,30 +51,20 @@ extern void mpc8xx_get_rtc_time(struct rtc_time *tm);
 extern void m8xx_pic_init(void);
 extern unsigned int mpc8xx_get_irq(void);
 
-static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi);
-static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi);
-static void init_scc3_ioports(struct fs_platform_info* ptr);
+static u32 __iomem *bcsr, *bcsr5;
 
 #ifdef CONFIG_PCMCIA_M8XX
 static void pcmcia_hw_setup(int slot, int enable)
 {
-	unsigned *bcsr_io;
-
-	bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
 	if (enable)
-		clrbits32(bcsr_io, BCSR1_PCCEN);
+		clrbits32(&bcsr[1], BCSR1_PCCEN);
 	else
-		setbits32(bcsr_io, BCSR1_PCCEN);
-
-	iounmap(bcsr_io);
+		setbits32(&bcsr[1], BCSR1_PCCEN);
 }
 
 static int pcmcia_set_voltage(int slot, int vcc, int vpp)
 {
 	u32 reg = 0;
-	unsigned *bcsr_io;
-
-	bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
 
 	switch(vcc) {
 	case 0:
@@ -106,346 +99,188 @@ static int pcmcia_set_voltage(int slot, int vcc, int vpp)
 	}
 
 	/* first, turn off all power */
-	clrbits32(bcsr_io, 0x00610000);
+	clrbits32(&bcsr[1], 0x00610000);
 
 	/* enable new powersettings */
-	setbits32(bcsr_io, reg);
+	setbits32(&bcsr[1], reg);
 
-	iounmap(bcsr_io);
 	return 0;
 }
 #endif
 
-void __init mpc885ads_board_setup(void)
-{
-	cpm8xx_t *cp;
-	unsigned int *bcsr_io;
-	u8 tmpval8;
-
-#ifdef CONFIG_FS_ENET
-	iop8xx_t *io_port;
-#endif
-
-	bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-	cp = (cpm8xx_t *)immr_map(im_cpm);
-
-	if (bcsr_io == NULL) {
-		printk(KERN_CRIT "Could not remap BCSR\n");
-		return;
-	}
-#ifdef CONFIG_SERIAL_CPM_SMC1
-	clrbits32(bcsr_io, BCSR1_RS232EN_1);
-	clrbits32(&cp->cp_simode, 0xe0000000 >> 17);	/* brg1 */
-	tmpval8 = in_8(&(cp->cp_smc[0].smc_smcm)) | (SMCM_RX | SMCM_TX);
-	out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
-	clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN);	/* brg1 */
-#else
-	setbits32(bcsr_io,BCSR1_RS232EN_1);
-	out_be16(&cp->cp_smc[0].smc_smcmr, 0);
-	out_8(&cp->cp_smc[0].smc_smce, 0);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
-	clrbits32(bcsr_io,BCSR1_RS232EN_2);
-	clrbits32(&cp->cp_simode, 0xe0000000 >> 1);
-	setbits32(&cp->cp_simode, 0x20000000 >> 1);	/* brg2 */
-	tmpval8 = in_8(&(cp->cp_smc[1].smc_smcm)) | (SMCM_RX | SMCM_TX);
-	out_8(&(cp->cp_smc[1].smc_smcm), tmpval8);
-	clrbits16(&cp->cp_smc[1].smc_smcmr, SMCMR_REN | SMCMR_TEN);
+struct cpm_pin {
+	int port, pin, flags;
+};
 
-	init_smc2_uart_ioports(0);
-#else
-	setbits32(bcsr_io,BCSR1_RS232EN_2);
-	out_be16(&cp->cp_smc[1].smc_smcmr, 0);
-	out_8(&cp->cp_smc[1].smc_smce, 0);
-#endif
-	immr_unmap(cp);
-	iounmap(bcsr_io);
-
-#ifdef CONFIG_FS_ENET
-	/* use MDC for MII (common) */
-	io_port = (iop8xx_t*)immr_map(im_ioport);
-	setbits16(&io_port->iop_pdpar, 0x0080);
-	clrbits16(&io_port->iop_pddir, 0x0080);
-
-	bcsr_io = ioremap(BCSR5, sizeof(unsigned long));
-	clrbits32(bcsr_io,BCSR5_MII1_EN);
-	clrbits32(bcsr_io,BCSR5_MII1_RST);
-#ifndef CONFIG_FC_ENET_HAS_SCC
-	clrbits32(bcsr_io,BCSR5_MII2_EN);
-	clrbits32(bcsr_io,BCSR5_MII2_RST);
+static struct cpm_pin mpc885ads_pins[] = {
+	/* SMC1 */
+	{1, 24, CPM_PIN_INPUT}, /* RX */
+	{1, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
 
+	/* SMC2 */
+#ifndef CONFIG_MPC8xx_SECOND_ETH_FEC2
+	{4, 21, CPM_PIN_INPUT}, /* RX */
+	{4, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
 #endif
-	iounmap(bcsr_io);
-	immr_unmap(io_port);
 
+	/* SCC3 */
+	{0, 9, CPM_PIN_INPUT}, /* RX */
+	{0, 8, CPM_PIN_INPUT}, /* TX */
+	{2, 4, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */
+	{2, 5, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */
+	{4, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */
+	{4, 17, CPM_PIN_INPUT}, /* CLK5 */
+	{4, 16, CPM_PIN_INPUT}, /* CLK6 */
+
+	/* MII1 */
+	{0, 0, CPM_PIN_INPUT},
+	{0, 1, CPM_PIN_INPUT},
+	{0, 2, CPM_PIN_INPUT},
+	{0, 3, CPM_PIN_INPUT},
+	{0, 4, CPM_PIN_OUTPUT},
+	{0, 10, CPM_PIN_OUTPUT},
+	{0, 11, CPM_PIN_OUTPUT},
+	{1, 19, CPM_PIN_INPUT},
+	{1, 31, CPM_PIN_INPUT},
+	{2, 12, CPM_PIN_INPUT},
+	{2, 13, CPM_PIN_INPUT},
+	{4, 30, CPM_PIN_OUTPUT},
+	{4, 31, CPM_PIN_OUTPUT},
+
+	/* MII2 */
+#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
+	{4, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{4, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{4, 16, CPM_PIN_OUTPUT},
+	{4, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{4, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{4, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{4, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{4, 21, CPM_PIN_OUTPUT},
+	{4, 22, CPM_PIN_OUTPUT},
+	{4, 23, CPM_PIN_OUTPUT},
+	{4, 24, CPM_PIN_OUTPUT},
+	{4, 25, CPM_PIN_OUTPUT},
+	{4, 26, CPM_PIN_OUTPUT},
+	{4, 27, CPM_PIN_OUTPUT},
+	{4, 28, CPM_PIN_OUTPUT},
+	{4, 29, CPM_PIN_OUTPUT},
 #endif
+};
 
-#ifdef CONFIG_PCMCIA_M8XX
-	/*Set up board specific hook-ups*/
-	m8xx_pcmcia_ops.hw_ctrl = pcmcia_hw_setup;
-	m8xx_pcmcia_ops.voltage_set = pcmcia_set_voltage;
-#endif
-}
-
-
-static void init_fec1_ioports(struct fs_platform_info* ptr)
+static void __init init_ioports(void)
 {
-	cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
-	iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
-
-	/* configure FEC1 pins  */
-	setbits16(&io_port->iop_papar, 0xf830);
-	setbits16(&io_port->iop_padir, 0x0830);
-	clrbits16(&io_port->iop_padir, 0xf000);
+	int i;
 
-	setbits32(&cp->cp_pbpar, 0x00001001);
-	clrbits32(&cp->cp_pbdir, 0x00001001);
-
-	setbits16(&io_port->iop_pcpar, 0x000c);
-	clrbits16(&io_port->iop_pcdir, 0x000c);
+	for (i = 0; i < ARRAY_SIZE(mpc885ads_pins); i++) {
+		struct cpm_pin *pin = &mpc885ads_pins[i];
+		cpm1_set_pin(pin->port, pin->pin, pin->flags);
+	}
 
-	setbits32(&cp->cp_pepar, 0x00000003);
-	setbits32(&cp->cp_pedir, 0x00000003);
-	clrbits32(&cp->cp_peso, 0x00000003);
-	clrbits32(&cp->cp_cptr, 0x00000100);
+	cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
+	cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX);
+	cpm1_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_TX);
+	cpm1_clk_setup(CPM_CLK_SCC3, CPM_CLK6, CPM_CLK_RX);
 
-	immr_unmap(io_port);
-	immr_unmap(cp);
+	/* Set FEC1 and FEC2 to MII mode */
+	clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180);
 }
 
-
-static void init_fec2_ioports(struct fs_platform_info* ptr)
+static void __init mpc885ads_setup_arch(void)
 {
-	cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
-	iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
-
-	/* configure FEC2 pins */
-	setbits32(&cp->cp_pepar, 0x0003fffc);
-	setbits32(&cp->cp_pedir, 0x0003fffc);
-	clrbits32(&cp->cp_peso, 0x000087fc);
-	setbits32(&cp->cp_peso, 0x00037800);
-	clrbits32(&cp->cp_cptr, 0x00000080);
-
-	immr_unmap(io_port);
-	immr_unmap(cp);
-}
+	struct device_node *np;
 
-void init_fec_ioports(struct fs_platform_info *fpi)
-{
-	int fec_no = fs_get_fec_index(fpi->fs_no);
+	cpm_reset();
+	init_ioports();
 
-	switch (fec_no) {
-	case 0:
-		init_fec1_ioports(fpi);
-		break;
-	case 1:
-		init_fec2_ioports(fpi);
-		break;
-	default:
-		printk(KERN_ERR "init_fec_ioports: invalid FEC number\n");
+	np = of_find_compatible_node(NULL, NULL, "fsl,mpc885ads-bcsr");
+	if (!np) {
+		printk(KERN_CRIT "Could not find fsl,mpc885ads-bcsr node\n");
 		return;
 	}
-}
-
-static void init_scc3_ioports(struct fs_platform_info* fpi)
-{
-	unsigned *bcsr_io;
-	iop8xx_t *io_port;
-	cpm8xx_t *cp;
 
-	bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
-	io_port = (iop8xx_t *)immr_map(im_ioport);
-	cp = (cpm8xx_t *)immr_map(im_cpm);
+	bcsr = of_iomap(np, 0);
+	bcsr5 = of_iomap(np, 1);
+	of_node_put(np);
 
-	if (bcsr_io == NULL) {
+	if (!bcsr || !bcsr5) {
 		printk(KERN_CRIT "Could not remap BCSR\n");
 		return;
 	}
 
-	/* Enable the PHY.
-	 */
-	clrbits32(bcsr_io+4, BCSR4_ETH10_RST);
-	udelay(1000);
-	setbits32(bcsr_io+4, BCSR4_ETH10_RST);
-	/* Configure port A pins for Txd and Rxd.
-	 */
-	setbits16(&io_port->iop_papar, PA_ENET_RXD | PA_ENET_TXD);
-	clrbits16(&io_port->iop_padir, PA_ENET_RXD | PA_ENET_TXD);
+	clrbits32(&bcsr[1], BCSR1_RS232EN_1);
+#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
+	setbits32(&bcsr[1], BCSR1_RS232EN_2);
+#else
+	clrbits32(&bcsr[1], BCSR1_RS232EN_2);
+#endif
 
-	/* Configure port C pins to enable CLSN and RENA.
-	 */
-	clrbits16(&io_port->iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
-	clrbits16(&io_port->iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
-	setbits16(&io_port->iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
+	clrbits32(bcsr5, BCSR5_MII1_EN);
+	setbits32(bcsr5, BCSR5_MII1_RST);
+	udelay(1000);
+	clrbits32(bcsr5, BCSR5_MII1_RST);
 
-	/* Configure port E for TCLK and RCLK.
-	 */
-	setbits32(&cp->cp_pepar, PE_ENET_TCLK | PE_ENET_RCLK);
-	clrbits32(&cp->cp_pepar, PE_ENET_TENA);
-	clrbits32(&cp->cp_pedir,
-		  PE_ENET_TCLK | PE_ENET_RCLK | PE_ENET_TENA);
-	clrbits32(&cp->cp_peso, PE_ENET_TCLK | PE_ENET_RCLK);
-	setbits32(&cp->cp_peso, PE_ENET_TENA);
-
-	/* Configure Serial Interface clock routing.
-	 * First, clear all SCC bits to zero, then set the ones we want.
-	 */
-	clrbits32(&cp->cp_sicr, SICR_ENET_MASK);
-	setbits32(&cp->cp_sicr, SICR_ENET_CLKRT);
+#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
+	clrbits32(bcsr5, BCSR5_MII2_EN);
+	setbits32(bcsr5, BCSR5_MII2_RST);
+	udelay(1000);
+	clrbits32(bcsr5, BCSR5_MII2_RST);
+#else
+	setbits32(bcsr5, BCSR5_MII2_EN);
+#endif
 
-	/* Disable Rx and Tx. SMC1 sshould be stopped if SCC3 eternet are used.
-	 */
-	clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN);
-	/* On the MPC885ADS SCC ethernet PHY is initialized in the full duplex mode
-	 * by H/W setting after reset. SCC ethernet controller support only half duplex.
-	 * This discrepancy of modes causes a lot of carrier lost errors.
-	 */
+#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3
+	clrbits32(&bcsr[4], BCSR4_ETH10_RST);
+	udelay(1000);
+	setbits32(&bcsr[4], BCSR4_ETH10_RST);
 
-	/* In the original SCC enet driver the following code is placed at
-	   the end of the initialization */
-	setbits32(&cp->cp_pepar, PE_ENET_TENA);
-	clrbits32(&cp->cp_pedir, PE_ENET_TENA);
-	setbits32(&cp->cp_peso, PE_ENET_TENA);
+	setbits32(&bcsr[1], BCSR1_ETHEN);
 
-	setbits32(bcsr_io+4, BCSR1_ETHEN);
-	iounmap(bcsr_io);
-	immr_unmap(io_port);
-	immr_unmap(cp);
-}
+	np = of_find_node_by_path("/soc@ff000000/cpm@9c0/serial@a80");
+#else
+	np = of_find_node_by_path("/soc@ff000000/cpm@9c0/ethernet@a40");
+#endif
 
-void init_scc_ioports(struct fs_platform_info *fpi)
-{
-	int scc_no = fs_get_scc_index(fpi->fs_no);
+	/* The SCC3 enet registers overlap the SMC1 registers, so
+	 * one of the two must be removed from the device tree.
+	 */
 
-	switch (scc_no) {
-	case 2:
-		init_scc3_ioports(fpi);
-		break;
-	default:
-		printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
-		return;
+	if (np) {
+		of_detach_node(np);
+		of_node_put(np);
 	}
-}
-
-
 
-static void init_smc1_uart_ioports(struct fs_uart_platform_info* ptr)
-{
-        unsigned *bcsr_io;
-	cpm8xx_t *cp;
-
-	cp = (cpm8xx_t *)immr_map(im_cpm);
-	setbits32(&cp->cp_pepar, 0x000000c0);
-	clrbits32(&cp->cp_pedir, 0x000000c0);
-	clrbits32(&cp->cp_peso, 0x00000040);
-	setbits32(&cp->cp_peso, 0x00000080);
-	immr_unmap(cp);
-
-        bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
-        if (bcsr_io == NULL) {
-                printk(KERN_CRIT "Could not remap BCSR1\n");
-                return;
-        }
-        clrbits32(bcsr_io,BCSR1_RS232EN_1);
-        iounmap(bcsr_io);
+#ifdef CONFIG_PCMCIA_M8XX
+	/* Set up board specific hook-ups.*/
+	m8xx_pcmcia_ops.hw_ctrl = pcmcia_hw_setup;
+	m8xx_pcmcia_ops.voltage_set = pcmcia_set_voltage;
+#endif
 }
 
-static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi)
+static int __init mpc885ads_probe(void)
 {
-        unsigned *bcsr_io;
-	cpm8xx_t *cp;
-
-	cp = (cpm8xx_t *)immr_map(im_cpm);
-	setbits32(&cp->cp_pepar, 0x00000c00);
-	clrbits32(&cp->cp_pedir, 0x00000c00);
-	clrbits32(&cp->cp_peso, 0x00000400);
-	setbits32(&cp->cp_peso, 0x00000800);
-	immr_unmap(cp);
-
-        bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
-        if (bcsr_io == NULL) {
-                printk(KERN_CRIT "Could not remap BCSR1\n");
-                return;
-        }
-        clrbits32(bcsr_io,BCSR1_RS232EN_2);
-        iounmap(bcsr_io);
+	unsigned long root = of_get_flat_dt_root();
+	return of_flat_dt_is_compatible(root, "fsl,mpc885ads");
 }
 
-void init_smc_ioports(struct fs_uart_platform_info *data)
-{
-	int smc_no = fs_uart_id_fsid2smc(data->fs_no);
-
-	switch (smc_no) {
-	case 0:
-		init_smc1_uart_ioports(data);
-		data->brg = data->clk_rx;
-		break;
-	case 1:
-		init_smc2_uart_ioports(data);
-		data->brg = data->clk_rx;
-		break;
-	default:
-		printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
-		return;
-	}
-}
+static struct of_device_id __initdata of_bus_ids[] = {
+	{ .name = "soc", },
+	{ .name = "cpm", },
+	{},
+};
 
-int platform_device_skip(const char *model, int id)
+static int __init declare_of_platform_devices(void)
 {
-#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3
-	const char *dev = "FEC";
-	int n = 2;
-#else
-	const char *dev = "SCC";
-	int n = 3;
-#endif
-
-	if (!strcmp(model, dev) && n == id)
-		return 1;
+	/* Publish the QE devices */
+	if (machine_is(mpc885_ads))
+		of_platform_bus_probe(NULL, of_bus_ids, NULL);
 
 	return 0;
 }
-
-static void __init mpc885ads_setup_arch(void)
-{
-	struct device_node *cpu;
-
-	cpu = of_find_node_by_type(NULL, "cpu");
-	if (cpu != 0) {
-		const unsigned int *fp;
-
-		fp = of_get_property(cpu, "clock-frequency", NULL);
-		if (fp != 0)
-			loops_per_jiffy = *fp / HZ;
-		else
-			loops_per_jiffy = 50000000 / HZ;
-		of_node_put(cpu);
-	}
-
-	cpm_reset();
-
-	mpc885ads_board_setup();
-
-	ROOT_DEV = Root_NFS;
-}
-
-static int __init mpc885ads_probe(void)
-{
-	char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
-					  "model", NULL);
-	if (model == NULL)
-		return 0;
-	if (strcmp(model, "MPC885ADS"))
-		return 0;
-
-	return 1;
-}
+device_initcall(declare_of_platform_devices);
 
 define_machine(mpc885_ads) {
-	.name			= "MPC885 ADS",
+	.name			= "Freescale MPC885 ADS",
 	.probe			= mpc885ads_probe,
 	.setup_arch		= mpc885ads_setup_arch,
 	.init_IRQ		= m8xx_pic_init,
@@ -455,4 +290,9 @@ define_machine(mpc885_ads) {
 	.calibrate_decr		= mpc8xx_calibrate_decr,
 	.set_rtc_time		= mpc8xx_set_rtc_time,
 	.get_rtc_time		= mpc8xx_get_rtc_time,
+	.progress		= udbg_progress,
 };
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+u32 __iomem *cpm_udbg_txdesc = (u32 __iomem *)0xff002808;
+#endif
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index cee671f..cb4b573 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -37,9 +37,6 @@
 #include <mm/mmu_decl.h>
 #include <asm/cpm2.h>
 
-extern void init_fcc_ioports(struct fs_platform_info*);
-extern void init_fec_ioports(struct fs_platform_info*);
-extern void init_smc_ioports(struct fs_uart_platform_info*);
 static phys_addr_t immrbase = -1;
 
 phys_addr_t get_immrbase(void)
@@ -843,9 +840,6 @@ arch_initcall(cpm_uart_of_init);
 
 #ifdef CONFIG_8xx
 
-extern void init_scc_ioports(struct fs_platform_info*);
-extern int platform_device_skip(const char *model, int id);
-
 static int __init fs_enet_mdio_of_init(void)
 {
 	struct device_node *np;
@@ -929,9 +923,6 @@ static int __init fs_enet_of_init(void)
 		id = of_get_property(np, "device-id", NULL);
 		fs_enet_data.fs_no = *id;
 
-		if (platform_device_skip(model, *id))
-			continue;
-
 		ret = of_address_to_resource(np, 0, &r[0]);
 		if (ret)
 			goto err;
@@ -984,7 +975,6 @@ static int __init fs_enet_of_init(void)
 			snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x",
 							(u32)res.start, fs_enet_data.phy_addr);
 			fs_enet_data.bus_id = (char*)&bus_id[i];
-			fs_enet_data.init_ioports = init_fec_ioports;
 		}
 		if (strstr(model, "SCC")) {
 			ret = of_address_to_resource(np, 1, &r[1]);
@@ -1012,7 +1002,6 @@ static int __init fs_enet_of_init(void)
 
 			snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1");
                         fs_enet_data.bus_id = (char*)&bus_id[i];
-			fs_enet_data.init_ioports = init_scc_ioports;
 		}
 
 		of_node_put(phy);
@@ -1034,20 +1023,6 @@ err:
 
 arch_initcall(fs_enet_of_init);
 
-static int __init fsl_pcmcia_of_init(void)
-{
-	struct device_node *np = NULL;
-	/*
-	 * Register all the devices which type is "pcmcia"
-	 */
-	while ((np = of_find_compatible_node(np,
-			"pcmcia", "fsl,pq-pcmcia")) != NULL)
-			    of_platform_device_create(np, "m8xx-pcmcia", NULL);
-	return 0;
-}
-
-arch_initcall(fsl_pcmcia_of_init);
-
 static const char *smc_regs = "regs";
 static const char *smc_pram = "pram";
 
-- 
1.5.0.3

Re: [PATCH 46/61] mpc885ads: Rework initialization.

[Vitaly Bordug]

Overall looks good, though mentioned mutually exclusive SoC devices adding some pain
and extra code having relevant parts removed but not covered (see below).

I think it makes sense to work ontop of this code to address known quirks/issues though, hence will cover this.
yet, there are little chances to play with the 8xx inside this merge window, so I basically don't object from it being merged
as is.

On Tue, 17 Jul 2007 20:36:00 -0500
Scott Wood wrote:
> -#ifdef CONFIG_SERIAL_CPM_SMC1
> -	clrbits32(bcsr_io, BCSR1_RS232EN_1);
> -	clrbits32(&cp->cp_simode, 0xe0000000 >> 17);	/* brg1
> */
> -	tmpval8 = in_8(&(cp->cp_smc[0].smc_smcm)) | (SMCM_RX |
> SMCM_TX);
> -	out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
> -	clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN |
> SMCMR_TEN);	/* brg1 */ -#else
> -	setbits32(bcsr_io,BCSR1_RS232EN_1);
> -	out_be16(&cp->cp_smc[0].smc_smcmr, 0);
> -	out_8(&cp->cp_smc[0].smc_smce, 0);
> -#endif

these are not just for beauty: if corresponding not-used uart regs are not cleared, second one has a
good chances to be hosed.

> -void init_scc_ioports(struct fs_platform_info *fpi)
> -{
> -	int scc_no = fs_get_scc_index(fpi->fs_no);
> +	/* The SCC3 enet registers overlap the SMC1 registers, so
> +	 * one of the two must be removed from the device tree.
> +	 */
Unfortunately,
this approach has very little chances to work. IIRC, SCC3 eth and SMC1 do have overlapping pins,
and just removing it from the tree is not going to save the world because now we have all-in-one early condensed
pins setup.

Also, we have to be very careful with corresponding ports shutdown: say turn off smc1 if scc3 is enabled: most prolly
it was turned on by the firmware/bootwrapper, and eth won't be alive.


-- 
Sincerely, Vitaly

Re: [PATCH 46/61] mpc885ads: Rework initialization.

[Scott Wood]

Vitaly Bordug wrote:
>>-#ifdef CONFIG_SERIAL_CPM_SMC1
>>-	clrbits32(bcsr_io, BCSR1_RS232EN_1);
>>-	clrbits32(&cp->cp_simode, 0xe0000000 >> 17);	/* brg1
>>*/
>>-	tmpval8 = in_8(&(cp->cp_smc[0].smc_smcm)) | (SMCM_RX |
>>SMCM_TX);
>>-	out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
>>-	clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN |
>>SMCMR_TEN);	/* brg1 */ -#else
>>-	setbits32(bcsr_io,BCSR1_RS232EN_1);
>>-	out_be16(&cp->cp_smc[0].smc_smcmr, 0);
>>-	out_8(&cp->cp_smc[0].smc_smce, 0);
>>-#endif
> 
> 
> these are not just for beauty: if corresponding not-used uart regs are not cleared, second one has a
> good chances to be hosed.

The CPM reset should take care of that.

>>-void init_scc_ioports(struct fs_platform_info *fpi)
>>-{
>>-	int scc_no = fs_get_scc_index(fpi->fs_no);
>>+	/* The SCC3 enet registers overlap the SMC1 registers, so
>>+	 * one of the two must be removed from the device tree.
>>+	 */
> 
> Unfortunately,
> this approach has very little chances to work. IIRC, SCC3 eth and SMC1 do have overlapping pins,
> and just removing it from the tree is not going to save the world because now we have all-in-one early condensed
> pins setup.

It may not save the world, but it's needed to keep the driver from 
poking at the disabled device.

> Also, we have to be very careful with corresponding ports shutdown: say turn off smc1 if scc3 is enabled: most prolly
> it was turned on by the firmware/bootwrapper, and eth won't be alive.

The conflict is in register space, not pins -- why would the smc1 pins 
matter?

-Scott

Re: [PATCH 46/61] mpc885ads: Rework initialization.

[Vitaly Bordug]

On Wed, 18 Jul 2007 11:40:07 -0500
Scott Wood wrote:

> Vitaly Bordug wrote:
> >>-#ifdef CONFIG_SERIAL_CPM_SMC1
> >>-	clrbits32(bcsr_io, BCSR1_RS232EN_1);
> >>-	clrbits32(&cp->cp_simode, 0xe0000000 >> 17);	/* brg1
> >>*/
> >>-	tmpval8 = in_8(&(cp->cp_smc[0].smc_smcm)) | (SMCM_RX |
> >>SMCM_TX);
> >>-	out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
> >>-	clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN |
> >>SMCMR_TEN);	/* brg1 */ -#else
> >>-	setbits32(bcsr_io,BCSR1_RS232EN_1);
> >>-	out_be16(&cp->cp_smc[0].smc_smcmr, 0);
> >>-	out_8(&cp->cp_smc[0].smc_smce, 0);
> >>-#endif
> > 
> > 
> > these are not just for beauty: if corresponding not-used uart regs
> > are not cleared, second one has a good chances to be hosed.
> 
> The CPM reset should take care of that.
> 
IIRC we had CPM reset prior, and it didn't help, making all those stuff added.

> >>-void init_scc_ioports(struct fs_platform_info *fpi)
> >>-{
> >>-	int scc_no = fs_get_scc_index(fpi->fs_no);
> >>+	/* The SCC3 enet registers overlap the SMC1 registers, so
> >>+	 * one of the two must be removed from the device tree.
> >>+	 */
> > 
> > Unfortunately,
> > this approach has very little chances to work. IIRC, SCC3 eth and
> > SMC1 do have overlapping pins, and just removing it from the tree
> > is not going to save the world because now we have all-in-one early
> > condensed pins setup.
> 
> It may not save the world, but it's needed to keep the driver from 
> poking at the disabled device.
> 
I am not against that, just about that it tends to be not enough.

> > Also, we have to be very careful with corresponding ports shutdown:
> > say turn off smc1 if scc3 is enabled: most prolly it was turned on
> > by the firmware/bootwrapper, and eth won't be alive.
> 
> The conflict is in register space, not pins -- why would the smc1
> pins matter?
ok, I may have confused this with something else. Anyway, the only doubt point is
SMC2 console + SCC3 ENET functionality - it is easier to just test that.




-- 
Sincerely, Vitaly

Re: [PATCH 46/61] mpc885ads: Rework initialization.

[Scott Wood]

Vitaly Bordug wrote:
> On Wed, 18 Jul 2007 11:40:07 -0500
> Scott Wood wrote:
>>The CPM reset should take care of that.
>>
> 
> IIRC we had CPM reset prior, and it didn't help, making all those stuff added.

You previously only did the CPM reset when CONFIG_UCODE_PATH was 
enabled.  I saw the same behavior with the smcmr clearing as with the 
CPM reset.

> ok, I may have confused this with something else. Anyway, the only doubt point is
> SMC2 console + SCC3 ENET functionality - it is easier to just test that.

I had some difficulty with SCC3, but I think it's unrelated -- the PHY 
wasn't negotiating properly.  The failure mode was completely different 
when SMC1 was left on.

I tried to test it without my patches to see if it worked there, but it 
wouldn't boot at all.

-Scott

Re: [PATCH 46/61] mpc885ads: Rework initialization.

[Scott Wood]

Vitaly Bordug wrote:
>>The conflict is in register space, not pins -- why would the smc1
>>pins matter?
> 
> ok, I may have confused this with something else.

Possibly the conflict between FEC2 and SMC2 (which is still done via 
kconfig option)?

-Scott

[PATCH 47/61] 8xx: Don't hardcode the vendor in cpuinfo.

[Scott Wood]

If the vendor output is desired, it should be included in the board name.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/platforms/8xx/m8xx_setup.c |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index 601b389..1113384 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -263,8 +263,6 @@ void mpc8xx_show_cpuinfo(struct seq_file *m)
 	uint memsize = total_memory;
 	const char *model = "";
 
-	seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
-
 	root = of_find_node_by_path("/");
 	if (root)
 		model = of_get_property(root, "model", NULL);
-- 
1.5.0.3

[PATCH 48/61] 8xx: Use better OF names for PIC.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/dts/mpc866ads.dts |    3 +--
 arch/powerpc/boot/dts/mpc885ads.dts |    3 +--
 arch/powerpc/sysdev/mpc8xx_pic.c    |    5 ++---
 3 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index 1807086..9b5bf77 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -79,8 +79,7 @@
 			#interrupt-cells = <2>;
 			reg = <0 24>;
 			built-in;
-			device_type = "mpc8xx-pic";
-			compatible = "CPM";
+			compatible = "fsl,mpc866-pic", "fsl,pq1-pic";
 		};
 
 		cpm@ff000000 {
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index 48717ed..de81407 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -99,8 +99,7 @@
 			#interrupt-cells = <2>;
 			reg = <0 24>;
 			built-in;
-			device_type = "mpc8xx-pic";
-			compatible = "CPM";
+			compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
 		};
 
 		pcmcia@0080 {
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index 2fc2bcd..1a9c1b3 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -169,10 +169,9 @@ int mpc8xx_pic_init(void)
 	struct device_node *np = NULL;
 	int ret;
 
-	np = of_find_node_by_type(np, "mpc8xx-pic");
-
+	np = of_find_compatible_node(np, NULL, "fsl,pq1-pic");
 	if (np == NULL) {
-		printk(KERN_ERR "Could not find open-pic node\n");
+		printk(KERN_ERR "Could not find fsl,pq1-pic node\n");
 		return -ENOMEM;
 	}
 
-- 
1.5.0.3

[PATCH 49/61] 8xx: Update device trees.

[Scott Wood]

This updates the device trees to use a more suitable binding, and to clean
up some miscellaneous cruft.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/dts/mpc866ads.dts          |  118 ++++++++++---------
 arch/powerpc/boot/dts/mpc885ads.dts          |  157 ++++++++++++++------------
 arch/powerpc/platforms/8xx/mpc86xads_setup.c |   10 +--
 3 files changed, 148 insertions(+), 137 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index 9b5bf77..26d3296 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -12,7 +12,7 @@
 
 / {
 	model = "MPC866ADS";
-	compatible = "mpc8xx";
+	compatible = "fsl,mpc866ads";
 	#address-cells = <1>;
 	#size-cells = <1>;
 
@@ -23,16 +23,15 @@
 		PowerPC,866@0 {
 			device_type = "cpu";
 			reg = <0>;
-			d-cache-line-size = <20>;	// 32 bytes
-			i-cache-line-size = <20>;	// 32 bytes
-			d-cache-size = <2000>;		// L1, 8K
-			i-cache-size = <4000>;		// L1, 16K
+			d-cache-line-size = <d#32>;
+			i-cache-line-size = <d#32>;
+			d-cache-size = <d#8192>;
+			i-cache-size = <d#16384>;
 			timebase-frequency = <0>;
 			bus-frequency = <0>;
 			clock-frequency = <0>;
-			32-bit;
 			interrupts = <f 2>;	// decrementer interrupt
-			interrupt-parent = <&Mpc8xx_pic>;
+			interrupt-parent = <&PIC>;
 		};
 	};
 
@@ -44,105 +43,110 @@
 	soc866@ff000000 {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		#interrupt-cells = <2>;
 		device_type = "soc";
-		ranges = <0 ff000000 00100000>;
+		ranges = <0 ff000000 00004000>;
 		reg = <ff000000 00000200>;
 		bus-frequency = <0>;
-		mdio@e80 {
+
+		mdio@e00 {
 			device_type = "mdio";
-			compatible = "fs_enet";
-			reg = <e80 8>;
+			compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio";
+			reg = <e00 188>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			phy: ethernet-phy@f {
+
+			PHY: ethernet-phy@f {
 				reg = <f>;
 				device_type = "ethernet-phy";
 			};
 		};
 
-		fec@e00 {
+		ethernet@e00 {
 			device_type = "network";
-			compatible = "fs_enet";
-			model = "FEC";
-			device-id = <1>;
+			compatible = "fsl,mpc866-fec-enet",
+			             "fsl,pq1-fec-enet",
+			             "fsl,cpm-enet";
 			reg = <e00 188>;
-			mac-address = [ 00 00 0C 00 01 FD ];
+			local-mac-address = [ 00 00 00 00 00 00 ];
 			interrupts = <3 1>;
-			interrupt-parent = <&Mpc8xx_pic>;
-			phy-handle = <&Phy>;
+			interrupt-parent = <&PIC>;
+			phy-handle = <&PHY>;
+			linux,network-index = <0>;
 		};
 
-		mpc8xx_pic: pic@ff000000 {
+		PIC: pic@0 {
 			interrupt-controller;
-			#address-cells = <0>;
 			#interrupt-cells = <2>;
 			reg = <0 24>;
-			built-in;
 			compatible = "fsl,mpc866-pic", "fsl,pq1-pic";
 		};
 
-		cpm@ff000000 {
+		cpm@9c0 {
 			#address-cells = <1>;
 			#size-cells = <1>;
-			#interrupt-cells = <2>;
 			compatible = "fsl,mpc866-cpm", "fsl,cpm1", "fsl,cpm";
-			ranges = <0 0 4000>;
-			reg = <860 f0>;
 			command-proc = <9c0>;
 			fsl,brg-frequency = <0>;
 			interrupts = <0 2>;	// cpm error interrupt
-			interrupt-parent = <&Cpm_pic>;
+			interrupt-parent = <&CPM_PIC>;
+			reg = <9c0 40 2000 1c00>;
+			ranges;
 
-			cpm_pic: pic@930 {
+			CPM_PIC: pic@930 {
 				interrupt-controller;
-				#address-cells = <0>;
 				#interrupt-cells = <2>;
 				interrupts = <5 2 0 2>;
-				interrupt-parent = <&Mpc8xx_pic>;
+				interrupt-parent = <&PIC>;
 				reg = <930 20>;
-				built-in;
 				compatible = "fsl,mpc866-cpm-pic", "fsl,cpm1-pic";
 			};
 
-			smc@a80 {
+			serial@a80 {
 				device_type = "serial";
-				compatible = "cpm_uart";
-				model = "SMC";
-				device-id = <1>;
+				compatible = "fsl,mpc866-smc-uart",
+				             "fsl,cpm1-smc-uart",
+				             "fsl,cpm1-uart",
+				             "fsl,cpm-smc-uart",
+				             "fsl,cpm-uart";
 				reg = <a80 10 3e80 40>;
-				clock-setup = <00ffffff 0>;
-				rx-clock = <1>;
-				tx-clock = <1>;
-				current-speed = <0>;
 				interrupts = <4 3>;
-				interrupt-parent = <&Cpm_pic>;
+				interrupt-parent = <&CPM_PIC>;
+				fsl,cpm-brg = <1>;
+				fsl,cpm-command = <0090>;
 			};
 
-			smc@a90 {
+			serial@a90 {
 				device_type = "serial";
-				compatible = "cpm_uart";
-				model = "SMC";
-				device-id = <2>;
+				compatible = "fsl,mpc866-smc-uart",
+				             "fsl,cpm1-smc-uart",
+				             "fsl,cpm1-uart",
+				             "fsl,cpm-smc-uart",
+				             "fsl,cpm-uart";
 				reg = <a90 20 3f80 40>;
-				clock-setup = <ff00ffff 90000>;
-				rx-clock = <2>;
-				tx-clock = <2>;
-				current-speed = <0>;
 				interrupts = <3 3>;
-				interrupt-parent = <&Cpm_pic>;
+				interrupt-parent = <&CPM_PIC>;
+				fsl,cpm-brg = <2>;
+				fsl,cpm-command = <00d0>;
 			};
 
-			scc@a00 {
+			ethernet@a00 {
 				device_type = "network";
-				compatible = "fs_enet";
-				model = "SCC";
-				device-id = <1>;
-				reg = <a00 18 3c00 80>;
-				mac-address = [ 00 00 0C 00 03 FD ];
+				compatible = "fsl,mpc866-scc-enet",
+				             "fsl,cpm1-scc-enet",
+				             "fsl,cpm1-enet",
+				             "fsl,cpm-scc-enet",
+				             "fsl,cpm-enet";
+				reg = <a00 18 3c00 100>;
+				local-mac-address = [ 00 00 00 00 00 00 ];
 				interrupts = <1e 3>;
-				interrupt-parent = <&Cpm_pic>;
+				interrupt-parent = <&CPM_PIC>;
+				fsl,cpm-command = <0000>;
+				linux,network-index = <1>;
 			};
 		};
 	};
+
+	chosen {
+		linux,stdout-path = "/soc/cpm/serial@a80";
+	};
 };
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index de81407..fbacb1d 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -2,6 +2,7 @@
  * MPC885 ADS Device Tree Source
  *
  * Copyright 2006 MontaVista Software, Inc.
+ * Copyright 2007 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -12,7 +13,7 @@
 
 / {
 	model = "MPC885ADS";
-	compatible = "mpc8xx";
+	compatible = "fsl,mpc885ads";
 	#address-cells = <1>;
 	#size-cells = <1>;
 
@@ -23,158 +24,170 @@
 		PowerPC,885@0 {
 			device_type = "cpu";
 			reg = <0>;
-			d-cache-line-size = <20>;	// 32 bytes
-			i-cache-line-size = <20>;	// 32 bytes
-			d-cache-size = <2000>;		// L1, 8K
-			i-cache-size = <2000>;		// L1, 8K
+			d-cache-line-size = <d#32>;
+			i-cache-line-size = <d#32>;
+			d-cache-size = <d#8192>;
+			i-cache-size = <d#8192>;
 			timebase-frequency = <0>;
 			bus-frequency = <0>;
 			clock-frequency = <0>;
-			32-bit;
 			interrupts = <f 2>;	// decrementer interrupt
-			interrupt-parent = <&Mpc8xx_pic>;
+			interrupt-parent = <&PIC>;
 		};
 	};
 
 	memory {
 		device_type = "memory";
-		reg = <00000000 800000>;
+		reg = <0 0>;
 	};
 
-	soc885@ff000000 {
+	bcsr@ff080000 {
+		reg = <ff080000 20 ff0a0300 4>;
+		compatible = "fsl,mpc885ads-bcsr";
+	};
+
+	soc@ff000000 {
+		compatible = "fsl,mpc885", "fsl,pq1-soc";
 		#address-cells = <1>;
 		#size-cells = <1>;
-		#interrupt-cells = <2>;
 		device_type = "soc";
-		ranges = <0 ff000000 00100000>;
+		ranges = <0 ff000000 00004000>;
 		reg = <ff000000 00000200>;
 		bus-frequency = <0>;
-		mdio@e80 {
-			device_type = "mdio";
-			compatible = "fs_enet";
-			reg = <e80 8>;
+
+		mdio@e00 {
+			compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
+			reg = <e00 188>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			Phy0: ethernet-phy@0 {
+
+			PHY0: ethernet-phy@0 {
 				reg = <0>;
 				device_type = "ethernet-phy";
 			};
-			Phy1: ethernet-phy@1 {
+
+			PHY1: ethernet-phy@1 {
 				reg = <1>;
 				device_type = "ethernet-phy";
 			};
-			Phy2: ethernet-phy@2 {
+
+			PHY2: ethernet-phy@2 {
 				reg = <2>;
 				device_type = "ethernet-phy";
 			};
 		};
 
-		fec@e00 {
+		ethernet@e00 {
 			device_type = "network";
-			compatible = "fs_enet";
-			model = "FEC";
-			device-id = <1>;
+			compatible = "fsl,mpc885-fec-enet",
+			             "fsl,pq1-fec-enet",
+			             "fsl,cpm-enet";
 			reg = <e00 188>;
-			mac-address = [ 00 00 0C 00 01 FD ];
+			local-mac-address = [ 00 00 00 00 00 00 ];
 			interrupts = <3 1>;
-			interrupt-parent = <&Mpc8xx_pic>;
-			phy-handle = <&Phy1>;
+			interrupt-parent = <&PIC>;
+			phy-handle = <&PHY0>;
+			linux,network-index = <0>;
 		};
 
-		fec@1e00 {
+		ethernet@1e00 {
 			device_type = "network";
-			compatible = "fs_enet";
-			model = "FEC";
-			device-id = <2>;
+			compatible = "fsl,mpc885-fec-enet",
+			             "fsl,pq1-fec-enet",
+			             "fsl,cpm-enet";
 			reg = <1e00 188>;
-			mac-address = [ 00 00 0C 00 02 FD ];
+			local-mac-address = [ 00 00 00 00 00 00 ];
 			interrupts = <7 1>;
-			interrupt-parent = <&Mpc8xx_pic>;
-			phy-handle = <&Phy2>;
+			interrupt-parent = <&PIC>;
+			phy-handle = <&PHY1>;
+			linux,network-index = <1>;
 		};
 
-		Mpc8xx_pic: pic@ff000000 {
+		PIC: pic@0 {
 			interrupt-controller;
-			#address-cells = <0>;
 			#interrupt-cells = <2>;
 			reg = <0 24>;
-			built-in;
 			compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
 		};
 
-		pcmcia@0080 {
+		pcmcia@80 {
 			#address-cells = <3>;
 			#interrupt-cells = <1>;
 			#size-cells = <2>;
 			compatible = "fsl,pq-pcmcia";
 			device_type = "pcmcia";
 			reg = <80 80>;
-			interrupt-parent = <&Mpc8xx_pic>;
+			interrupt-parent = <&PIC>;
 			interrupts = <d 1>;
 		};
 
-		cpm@ff000000 {
+		cpm@9c0 {
 			#address-cells = <1>;
 			#size-cells = <1>;
-			#interrupt-cells = <2>;
 			compatible = "fsl,mpc885-cpm", "fsl,cpm1", "fsl,cpm";
-			ranges = <0 0 4000>;
-			reg = <860 f0>;
 			command-proc = <9c0>;
 			fsl,brg-frequency = <0>;
 			interrupts = <0 2>;	// cpm error interrupt
-			interrupt-parent = <&Cpm_pic>;
+			interrupt-parent = <&CPM_PIC>;
+			reg = <9c0 40 2000 1c00>;
+			ranges;
 
-			Cpm_pic: pic@930 {
+			CPM_PIC: pic@930 {
 				interrupt-controller;
-				#address-cells = <0>;
 				#interrupt-cells = <2>;
 				interrupts = <5 2 0 2>;
-				interrupt-parent = <&Mpc8xx_pic>;
+				interrupt-parent = <&PIC>;
 				reg = <930 20>;
-				built-in;
 				compatible = "fsl,mpc885-cpm-pic", "fsl,cpm1-pic";
 			};
 
-			smc@a80 {
+			serial@a80 {
 				device_type = "serial";
-				compatible = "cpm_uart";
-				model = "SMC";
-				device-id = <1>;
+				compatible = "fsl,mpc885-smc-uart",
+				             "fsl,cpm1-smc-uart",
+				             "fsl,cpm1-uart",
+				             "fsl,cpm-smc-uart",
+				             "fsl,cpm-uart";
 				reg = <a80 10 3e80 40>;
-				clock-setup = <00ffffff 0>;
-				rx-clock = <1>;
-				tx-clock = <1>;
-				current-speed = <0>;
 				interrupts = <4 3>;
-				interrupt-parent = <&Cpm_pic>;
+				interrupt-parent = <&CPM_PIC>;
+				fsl,cpm-brg = <1>;
+				fsl,cpm-command = <0090>;
 			};
 
-			smc@a90 {
+			serial@a90 {
 				device_type = "serial";
-				compatible = "cpm_uart";
-				model = "SMC";
-				device-id = <2>;
+				compatible = "fsl,mpc885-smc-uart",
+				             "fsl,cpm1-smc-uart",
+				             "fsl,cpm1-uart",
+				             "fsl,cpm-smc-uart",
+				             "fsl,cpm-uart";
 				reg = <a90 20 3f80 40>;
-				clock-setup = <ff00ffff 90000>;
-				rx-clock = <2>;
-				tx-clock = <2>;
-				current-speed = <0>;
 				interrupts = <3 3>;
-				interrupt-parent = <&Cpm_pic>;
+				interrupt-parent = <&CPM_PIC>;
+				fsl,cpm-brg = <2>;
+				fsl,cpm-command = <00d0>;
 			};
 
-			scc@a40 {
+			ethernet@a40 {
 				device_type = "network";
-				compatible = "fs_enet";
-				model = "SCC";
-				device-id = <3>;
-				reg = <a40 18 3e00 80>;
-				mac-address = [ 00 00 0C 00 03 FD ];
+				compatible = "fsl,mpc885-scc-enet",
+				             "fsl,cpm1-scc-enet",
+				             "fsl,cpm1-enet",
+				             "fsl,cpm-scc-enet",
+				             "fsl,cpm-enet";
+				reg = <a40 18 3e00 100>;
+				local-mac-address = [ 00 00 00 00 00 00 ];
 				interrupts = <1c 3>;
-				interrupt-parent = <&Cpm_pic>;
-				phy-handle = <&Phy2>;
+				interrupt-parent = <&CPM_PIC>;
+				phy-handle = <&PHY2>;
+				fsl,cpm-command = <0080>;
+				linux,network-index = <2>;
 			};
 		};
 	};
+
+	chosen {
+		linux,stdout-path = "/soc/cpm/serial@a80";
+	};
 };
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index cf0e7bc..15a60be 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -277,14 +277,8 @@ static void __init mpc86xads_setup_arch(void)
 
 static int __init mpc86xads_probe(void)
 {
-	char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
-					  "model", NULL);
-	if (model == NULL)
-		return 0;
-	if (strcmp(model, "MPC866ADS"))
-		return 0;
-
-	return 1;
+	unsigned long root = of_get_flat_dt_root();
+	return of_flat_dt_is_compatible(root, "fsl,mpc866ads");
 }
 
 define_machine(mpc86x_ads) {
-- 
1.5.0.3

Re: [PATCH 49/61] 8xx: Update device trees.

[Segher Boessenkool]

> -			d-cache-line-size = <20>;	// 32 bytes
> -			i-cache-line-size = <20>;	// 32 bytes
> -			d-cache-size = <2000>;		// L1, 8K
> -			i-cache-size = <4000>;		// L1, 16K
> +			d-cache-line-size = <d#32>;
> +			i-cache-line-size = <d#32>;
> +			d-cache-size = <d#8192>;
> +			i-cache-size = <d#16384>;

IMHO this isn't an improvement, but it's your tree :-)
You removed the comment that those caches are L1; is
there an L2 cache on this CPU?

> -		mpc8xx_pic: pic@ff000000 {
> +		PIC: pic@0 {

interrupt-controller@0

> -			cpm_pic: pic@930 {
> +			CPM_PIC: pic@930 {

similar

> +				compatible = "fsl,mpc866-smc-uart",
> +				             "fsl,cpm1-smc-uart",
> +				             "fsl,cpm1-uart",
> +				             "fsl,cpm-smc-uart",
> +				             "fsl,cpm-uart";

Do you need _all_ of these?  :-)

> +				fsl,cpm-brg = <1>;
> +				fsl,cpm-command = <0090>;

Are these two documented?  Your patch queue is too
long for me to check for myself.

> -	soc885@ff000000 {
> +	bcsr@ff080000 {

Maybe use a more generic name, I have no idea what a
"BCSR" is.

Good improvements over all, thank you!


Segher

Re: [PATCH 49/61] 8xx: Update device trees.

[Vitaly Bordug]

just my 2 cents.
[snip]
> 
> > +				fsl,cpm-brg = <1>;
> > +				fsl,cpm-command = <0090>;
> 
> Are these two documented?  Your patch queue is too
> long for me to check for myself.
> 
In fact, there were different approaches to describe CPM, and I am sure this is not the end.
These aren't documented, and I think we do not need that so far: I am pretty sure this will change
to something more comfortable as new similar ports will follow-up. Meanwhile, values are self-description
for anybody familiar with this SoC.

> > -	soc885@ff000000 {
> > +	bcsr@ff080000 {
> 
> Maybe use a more generic name, I have no idea what a
> "BCSR" is.
> 
IIRC, QE stuff, when first introduced, had bcsr bindings, that were discussed and agreed here.



-- 
Sincerely, Vitaly

Re: [PATCH 49/61] 8xx: Update device trees.

[Segher Boessenkool]

>>> +				fsl,cpm-brg = <1>;
>>> +				fsl,cpm-command = <0090>;
>>
>> Are these two documented?  Your patch queue is too
>> long for me to check for myself.
>>
> In fact, there were different approaches to describe CPM, and I am  
> sure this is not the end.
> These aren't documented, and I think we do not need that so far: I  
> am pretty sure this will change
> to something more comfortable as new similar ports will follow-up.  
> Meanwhile, values are self-description
> for anybody familiar with this SoC.

Even when it is a work in progress still, it would be a good
idea to start documenting the device binding.

>>> -	soc885@ff000000 {
>>> +	bcsr@ff080000 {
>>
>> Maybe use a more generic name, I have no idea what a
>> "BCSR" is.
>>
> IIRC, QE stuff, when first introduced, had bcsr bindings, that were  
> discussed and agreed here.

Sure, that's not the point.

Since you are using generic names, the only use for the "name"
of a node is for a human reader to understand your tree.  Maybe
everyone using this specific SoC knows what a BCSR is; or maybe
there is a more friendly name you could use.


Segher

Re: [PATCH 49/61] 8xx: Update device trees.

[Scott Wood]

Segher Boessenkool wrote:
> Since you are using generic names, the only use for the "name"
> of a node is for a human reader to understand your tree.  Maybe
> everyone using this specific SoC knows what a BCSR is; or maybe
> there is a more friendly name you could use.

It's the standard term used in Freescale board documentation.  I could 
change it to board-control, though.

-Scott

Re: [PATCH 49/61] 8xx: Update device trees.

[Segher Boessenkool]

>> Since you are using generic names, the only use for the "name"
>> of a node is for a human reader to understand your tree.  Maybe
>> everyone using this specific SoC knows what a BCSR is; or maybe
>> there is a more friendly name you could use.
>
> It's the standard term used in Freescale board documentation.  I  
> could change it to board-control, though.

That sounds nice and generic, I like it.


Segher

[PATCH 50/61] fsl_soc: Remove 8xx/cpm2 glue code.

[Scott Wood]

These refer to the old device tree binding, and the driver code
is about to be switched to an of_platform device.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/sysdev/fsl_soc.c |  515 -----------------------------------------
 1 files changed, 0 insertions(+), 515 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index cb4b573..dd7fb15 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -582,518 +582,3 @@ err:
 }
 
 arch_initcall(fsl_usb_of_init);
-
-#ifdef CONFIG_CPM2
-
-static const char fcc_regs[] = "fcc_regs";
-static const char fcc_regs_c[] = "fcc_regs_c";
-static const char fcc_pram[] = "fcc_pram";
-static char bus_id[9][BUS_ID_SIZE];
-
-static int __init fs_enet_of_init(void)
-{
-	struct device_node *np;
-	unsigned int i;
-	struct platform_device *fs_enet_dev;
-	struct resource res;
-	int ret;
-
-	for (np = NULL, i = 0;
-	     (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
-	     i++) {
-		struct resource r[4];
-		struct device_node *phy, *mdio;
-		struct fs_platform_info fs_enet_data;
-		const unsigned int *id, *phy_addr, *phy_irq;
-		const void *mac_addr;
-		const phandle *ph;
-		const char *model;
-
-		memset(r, 0, sizeof(r));
-		memset(&fs_enet_data, 0, sizeof(fs_enet_data));
-
-		ret = of_address_to_resource(np, 0, &r[0]);
-		if (ret)
-			goto err;
-		r[0].name = fcc_regs;
-
-		ret = of_address_to_resource(np, 1, &r[1]);
-		if (ret)
-			goto err;
-		r[1].name = fcc_pram;
-
-		ret = of_address_to_resource(np, 2, &r[2]);
-		if (ret)
-			goto err;
-		r[2].name = fcc_regs_c;
-		fs_enet_data.fcc_regs_c = r[2].start;
-
-		of_irq_to_resource(np, 0, &r[3]);
-
-		fs_enet_dev =
-		    platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4);
-
-		if (IS_ERR(fs_enet_dev)) {
-			ret = PTR_ERR(fs_enet_dev);
-			goto err;
-		}
-
-		model = of_get_property(np, "model", NULL);
-		if (model == NULL) {
-			ret = -ENODEV;
-			goto unreg;
-		}
-
-		mac_addr = of_get_mac_address(np);
-		if (mac_addr)
-			memcpy(fs_enet_data.macaddr, mac_addr, 6);
-
-		ph = of_get_property(np, "phy-handle", NULL);
-		phy = of_find_node_by_phandle(*ph);
-
-		if (phy == NULL) {
-			ret = -ENODEV;
-			goto unreg;
-		}
-
-		phy_addr = of_get_property(phy, "reg", NULL);
-		fs_enet_data.phy_addr = *phy_addr;
-
-		phy_irq = of_get_property(phy, "interrupts", NULL);
-
-		id = of_get_property(np, "device-id", NULL);
-		fs_enet_data.fs_no = *id;
-		strcpy(fs_enet_data.fs_type, model);
-
-		mdio = of_get_parent(phy);
-                ret = of_address_to_resource(mdio, 0, &res);
-                if (ret) {
-                        of_node_put(phy);
-                        of_node_put(mdio);
-                        goto unreg;
-                }
-
-		fs_enet_data.clk_rx = *((u32 *)of_get_property(np,
-						"rx-clock", NULL));
-		fs_enet_data.clk_tx = *((u32 *)of_get_property(np,
-						"tx-clock", NULL));
-
-		if (strstr(model, "FCC")) {
-			int fcc_index = *id - 1;
-			const unsigned char *mdio_bb_prop;
-
-			fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
-			fs_enet_data.rx_ring = 32;
-			fs_enet_data.tx_ring = 32;
-			fs_enet_data.rx_copybreak = 240;
-			fs_enet_data.use_napi = 0;
-			fs_enet_data.napi_weight = 17;
-			fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index);
-			fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index);
-			fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index);
-
-			snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
-							(u32)res.start, fs_enet_data.phy_addr);
-			fs_enet_data.bus_id = (char*)&bus_id[(*id)];
-
-			mdio_bb_prop = of_get_property(phy, "bitbang", NULL);
-			if (mdio_bb_prop) {
-				struct platform_device *fs_enet_mdio_bb_dev;
-				struct fs_mii_bb_platform_info fs_enet_mdio_bb_data;
-
-				fs_enet_mdio_bb_dev =
-					platform_device_register_simple("fsl-bb-mdio",
-							i, NULL, 0);
-				memset(&fs_enet_mdio_bb_data, 0,
-						sizeof(struct fs_mii_bb_platform_info));
-				fs_enet_mdio_bb_data.mdio_dat.bit =
-					mdio_bb_prop[0];
-				fs_enet_mdio_bb_data.mdio_dir.bit =
-					mdio_bb_prop[1];
-				fs_enet_mdio_bb_data.mdc_dat.bit =
-					mdio_bb_prop[2];
-				fs_enet_mdio_bb_data.mdio_port =
-					mdio_bb_prop[3];
-				fs_enet_mdio_bb_data.mdc_port =
-					mdio_bb_prop[4];
-				fs_enet_mdio_bb_data.delay =
-					mdio_bb_prop[5];
-
-				fs_enet_mdio_bb_data.irq[0] = phy_irq[0];
-				fs_enet_mdio_bb_data.irq[1] = -1;
-				fs_enet_mdio_bb_data.irq[2] = -1;
-				fs_enet_mdio_bb_data.irq[3] = phy_irq[0];
-				fs_enet_mdio_bb_data.irq[31] = -1;
-
-				fs_enet_mdio_bb_data.mdio_dat.offset =
-					(u32)&cpm2_immr->im_ioport.iop_pdatc;
-				fs_enet_mdio_bb_data.mdio_dir.offset =
-					(u32)&cpm2_immr->im_ioport.iop_pdirc;
-				fs_enet_mdio_bb_data.mdc_dat.offset =
-					(u32)&cpm2_immr->im_ioport.iop_pdatc;
-
-				ret = platform_device_add_data(
-						fs_enet_mdio_bb_dev,
-						&fs_enet_mdio_bb_data,
-						sizeof(struct fs_mii_bb_platform_info));
-				if (ret)
-					goto unreg;
-			}
-
-			of_node_put(phy);
-			of_node_put(mdio);
-
-			ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
-						     sizeof(struct
-							    fs_platform_info));
-			if (ret)
-				goto unreg;
-		}
-	}
-	return 0;
-
-unreg:
-	platform_device_unregister(fs_enet_dev);
-err:
-	return ret;
-}
-
-arch_initcall(fs_enet_of_init);
-
-static const char scc_regs[] = "regs";
-static const char scc_pram[] = "pram";
-
-static int __init cpm_uart_of_init(void)
-{
-	struct device_node *np;
-	unsigned int i;
-	struct platform_device *cpm_uart_dev;
-	int ret;
-
-	for (np = NULL, i = 0;
-	     (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
-	     i++) {
-		struct resource r[3];
-		struct fs_uart_platform_info cpm_uart_data;
-		const int *id;
-		const char *model;
-
-		memset(r, 0, sizeof(r));
-		memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
-
-		ret = of_address_to_resource(np, 0, &r[0]);
-		if (ret)
-			goto err;
-
-		r[0].name = scc_regs;
-
-		ret = of_address_to_resource(np, 1, &r[1]);
-		if (ret)
-			goto err;
-		r[1].name = scc_pram;
-
-		of_irq_to_resource(np, 0, &r[2]);
-
-		cpm_uart_dev =
-		    platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3);
-
-		if (IS_ERR(cpm_uart_dev)) {
-			ret = PTR_ERR(cpm_uart_dev);
-			goto err;
-		}
-
-		id = of_get_property(np, "device-id", NULL);
-		cpm_uart_data.fs_no = *id;
-
-		model = of_get_property(np, "model", NULL);
-		strcpy(cpm_uart_data.fs_type, model);
-
-		cpm_uart_data.uart_clk = ppc_proc_freq;
-
-		cpm_uart_data.tx_num_fifo = 4;
-		cpm_uart_data.tx_buf_size = 32;
-		cpm_uart_data.rx_num_fifo = 4;
-		cpm_uart_data.rx_buf_size = 32;
-		cpm_uart_data.clk_rx = *((u32 *)of_get_property(np,
-						"rx-clock", NULL));
-		cpm_uart_data.clk_tx = *((u32 *)of_get_property(np,
-						"tx-clock", NULL));
-
-		ret =
-		    platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
-					     sizeof(struct
-						    fs_uart_platform_info));
-		if (ret)
-			goto unreg;
-	}
-
-	return 0;
-
-unreg:
-	platform_device_unregister(cpm_uart_dev);
-err:
-	return ret;
-}
-
-arch_initcall(cpm_uart_of_init);
-#endif /* CONFIG_CPM2 */
-
-#ifdef CONFIG_8xx
-
-static int __init fs_enet_mdio_of_init(void)
-{
-	struct device_node *np;
-	unsigned int i;
-	struct platform_device *mdio_dev;
-	struct resource res;
-	int ret;
-
-	for (np = NULL, i = 0;
-	     (np = of_find_compatible_node(np, "mdio", "fs_enet")) != NULL;
-	     i++) {
-		struct fs_mii_fec_platform_info mdio_data;
-
-		memset(&res, 0, sizeof(res));
-		memset(&mdio_data, 0, sizeof(mdio_data));
-
-		ret = of_address_to_resource(np, 0, &res);
-		if (ret)
-			goto err;
-
-		mdio_dev =
-		    platform_device_register_simple("fsl-cpm-fec-mdio",
-						    res.start, &res, 1);
-		if (IS_ERR(mdio_dev)) {
-			ret = PTR_ERR(mdio_dev);
-			goto err;
-		}
-
-		mdio_data.mii_speed = ((((ppc_proc_freq + 4999999) / 2500000) / 2) & 0x3F) << 1;
-
-		ret =
-		    platform_device_add_data(mdio_dev, &mdio_data,
-					     sizeof(struct fs_mii_fec_platform_info));
-		if (ret)
-			goto unreg;
-	}
-	return 0;
-
-unreg:
-	platform_device_unregister(mdio_dev);
-err:
-	return ret;
-}
-
-arch_initcall(fs_enet_mdio_of_init);
-
-static const char *enet_regs = "regs";
-static const char *enet_pram = "pram";
-static const char *enet_irq = "interrupt";
-static char bus_id[9][BUS_ID_SIZE];
-
-static int __init fs_enet_of_init(void)
-{
-	struct device_node *np;
-	unsigned int i;
-	struct platform_device *fs_enet_dev = NULL;
-	struct resource res;
-	int ret;
-
-	for (np = NULL, i = 0;
-	     (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
-	     i++) {
-		struct resource r[4];
-		struct device_node *phy = NULL, *mdio = NULL;
-		struct fs_platform_info fs_enet_data;
-		const unsigned int *id;
-		const unsigned int *phy_addr;
-		const void *mac_addr;
-		const phandle *ph;
-		const char *model;
-
-		memset(r, 0, sizeof(r));
-		memset(&fs_enet_data, 0, sizeof(fs_enet_data));
-
-		model = of_get_property(np, "model", NULL);
-		if (model == NULL) {
-			ret = -ENODEV;
-			goto unreg;
-		}
-
-		id = of_get_property(np, "device-id", NULL);
-		fs_enet_data.fs_no = *id;
-
-		ret = of_address_to_resource(np, 0, &r[0]);
-		if (ret)
-			goto err;
-		r[0].name = enet_regs;
-
-		mac_addr = of_get_mac_address(np);
-		if (mac_addr)
-			memcpy(fs_enet_data.macaddr, mac_addr, 6);
-
-		ph = of_get_property(np, "phy-handle", NULL);
-		if (ph != NULL)
-			phy = of_find_node_by_phandle(*ph);
-
-		if (phy != NULL) {
-			phy_addr = of_get_property(phy, "reg", NULL);
-			fs_enet_data.phy_addr = *phy_addr;
-			fs_enet_data.has_phy = 1;
-
-			mdio = of_get_parent(phy);
-			ret = of_address_to_resource(mdio, 0, &res);
-			if (ret) {
-				of_node_put(phy);
-				of_node_put(mdio);
-                                goto unreg;
-			}
-		}
-
-		model = of_get_property(np, "model", NULL);
-		strcpy(fs_enet_data.fs_type, model);
-
-		if (strstr(model, "FEC")) {
-			r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
-			r[1].flags = IORESOURCE_IRQ;
-			r[1].name = enet_irq;
-
-			fs_enet_dev =
-				    platform_device_register_simple("fsl-cpm-fec", i, &r[0], 2);
-
-			if (IS_ERR(fs_enet_dev)) {
-				ret = PTR_ERR(fs_enet_dev);
-				goto err;
-			}
-
-			fs_enet_data.rx_ring = 128;
-			fs_enet_data.tx_ring = 16;
-			fs_enet_data.rx_copybreak = 240;
-			fs_enet_data.use_napi = 1;
-			fs_enet_data.napi_weight = 17;
-
-			snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x",
-							(u32)res.start, fs_enet_data.phy_addr);
-			fs_enet_data.bus_id = (char*)&bus_id[i];
-		}
-		if (strstr(model, "SCC")) {
-			ret = of_address_to_resource(np, 1, &r[1]);
-			if (ret)
-				goto err;
-			r[1].name = enet_pram;
-
-			r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
-			r[2].flags = IORESOURCE_IRQ;
-			r[2].name = enet_irq;
-
-			fs_enet_dev =
-				    platform_device_register_simple("fsl-cpm-scc", i, &r[0], 3);
-
-			if (IS_ERR(fs_enet_dev)) {
-				ret = PTR_ERR(fs_enet_dev);
-				goto err;
-			}
-
-			fs_enet_data.rx_ring = 64;
-			fs_enet_data.tx_ring = 8;
-			fs_enet_data.rx_copybreak = 240;
-			fs_enet_data.use_napi = 1;
-			fs_enet_data.napi_weight = 17;
-
-			snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1");
-                        fs_enet_data.bus_id = (char*)&bus_id[i];
-		}
-
-		of_node_put(phy);
-		of_node_put(mdio);
-
-		ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
-					     sizeof(struct
-						    fs_platform_info));
-		if (ret)
-			goto unreg;
-	}
-	return 0;
-
-unreg:
-	platform_device_unregister(fs_enet_dev);
-err:
-	return ret;
-}
-
-arch_initcall(fs_enet_of_init);
-
-static const char *smc_regs = "regs";
-static const char *smc_pram = "pram";
-
-static int __init cpm_smc_uart_of_init(void)
-{
-	struct device_node *np;
-	unsigned int i;
-	struct platform_device *cpm_uart_dev;
-	int ret;
-
-	for (np = NULL, i = 0;
-	     (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
-	     i++) {
-		struct resource r[3];
-		struct fs_uart_platform_info cpm_uart_data;
-		const int *id;
-		const char *model;
-
-		memset(r, 0, sizeof(r));
-		memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
-
-		ret = of_address_to_resource(np, 0, &r[0]);
-		if (ret)
-			goto err;
-
-		r[0].name = smc_regs;
-
-		ret = of_address_to_resource(np, 1, &r[1]);
-		if (ret)
-			goto err;
-		r[1].name = smc_pram;
-
-		r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
-		r[2].flags = IORESOURCE_IRQ;
-
-		cpm_uart_dev =
-		    platform_device_register_simple("fsl-cpm-smc:uart", i, &r[0], 3);
-
-		if (IS_ERR(cpm_uart_dev)) {
-			ret = PTR_ERR(cpm_uart_dev);
-			goto err;
-		}
-
-		model = of_get_property(np, "model", NULL);
-		strcpy(cpm_uart_data.fs_type, model);
-
-		id = of_get_property(np, "device-id", NULL);
-		cpm_uart_data.fs_no = *id;
-		cpm_uart_data.uart_clk = ppc_proc_freq;
-
-		cpm_uart_data.tx_num_fifo = 4;
-		cpm_uart_data.tx_buf_size = 32;
-		cpm_uart_data.rx_num_fifo = 4;
-		cpm_uart_data.rx_buf_size = 32;
-
-		ret =
-		    platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
-					     sizeof(struct
-						    fs_uart_platform_info));
-		if (ret)
-			goto unreg;
-	}
-
-	return 0;
-
-unreg:
-	platform_device_unregister(cpm_uart_dev);
-err:
-	return ret;
-}
-
-arch_initcall(cpm_smc_uart_of_init);
-
-#endif /* CONFIG_8xx */
-- 
1.5.0.3

[PATCH 51/61] cpm_uart: Be an of_platform device when using arch/powerpc.

[Scott Wood]

The existing OF glue code was crufty and broken.  Rather than fix it,
it has been removed, and the serial driver now talks to the device tree
directly.

The non-CONFIG_PPC_MERGE code can do away once CPM platforms are dropped
from arch/ppc (which will hopefully be soon).

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 drivers/serial/cpm_uart/cpm_uart.h      |    6 +-
 drivers/serial/cpm_uart/cpm_uart_core.c |  224 ++++++++++++++++++++++++++++---
 drivers/serial/cpm_uart/cpm_uart_cpm1.c |   16 ++-
 drivers/serial/cpm_uart/cpm_uart_cpm2.c |   18 +++-
 4 files changed, 239 insertions(+), 25 deletions(-)

diff --git a/drivers/serial/cpm_uart/cpm_uart.h b/drivers/serial/cpm_uart/cpm_uart.h
index a8f894c..a0aa8ae 100644
--- a/drivers/serial/cpm_uart/cpm_uart.h
+++ b/drivers/serial/cpm_uart/cpm_uart.h
@@ -80,14 +80,18 @@ struct uart_cpm_port {
 	int			is_portb;
 	/* wait on close if needed */
 	int 			wait_closing;
+	/* value to combine with opcode to form cpm command */
+	u32			command;
 };
 
+#ifndef CONFIG_PPC_MERGE
 extern int cpm_uart_port_map[UART_NR];
+#endif
 extern int cpm_uart_nr;
 extern struct uart_cpm_port cpm_uart_ports[UART_NR];
 
 /* these are located in their respective files */
-void cpm_line_cr_cmd(int line, int cmd);
+void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd);
 int cpm_uart_init_portdesc(void);
 int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
 void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index cefde58..805ca46 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -10,7 +10,7 @@
  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
  *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
  *
- *  Copyright (C) 2004 Freescale Semiconductor, Inc.
+ *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
  *            (C) 2004 Intracom, S.A.
  *            (C) 2005-2006 MontaVista Software, Inc.
  * 		Vitaly Bordug <vbordug@ru.mvista.com>
@@ -47,6 +47,11 @@
 #include <asm/irq.h>
 #include <asm/delay.h>
 #include <asm/fs_pd.h>
+#include <asm/udbg.h>
+
+#ifdef CONFIG_PPC_MERGE
+#include <asm/of_platform.h>
+#endif
 
 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
@@ -57,12 +62,6 @@
 
 #include "cpm_uart.h"
 
-/***********************************************************************/
-
-/* Track which ports are configured as uarts */
-int cpm_uart_port_map[UART_NR];
-/* How many ports did we config as uarts */
-int cpm_uart_nr = 0;
 
 /**************************************************************/
 
@@ -73,6 +72,11 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
 
 /**************************************************************/
 
+#ifndef CONFIG_PPC_MERGE
+/* Track which ports are configured as uarts */
+int cpm_uart_port_map[UART_NR];
+/* How many ports did we config as uarts */
+int cpm_uart_nr;
 
 /* Place-holder for board-specific stuff */
 struct platform_device* __attribute__ ((weak)) __init
@@ -119,6 +123,7 @@ static int cpm_uart_id2nr(int id)
 	/* not found or invalid argument */
 	return -1;
 }
+#endif
 
 /*
  * Check, if transmit buffers are processed
@@ -232,15 +237,14 @@ static void cpm_uart_enable_ms(struct uart_port *port)
 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
 {
 	struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
-	int line = pinfo - cpm_uart_ports;
 
 	pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
 		break_state);
 
 	if (break_state)
-		cpm_line_cr_cmd(line, CPM_CR_STOP_TX);
+		cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 	else
-		cpm_line_cr_cmd(line, CPM_CR_RESTART_TX);
+		cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
 }
 
 /*
@@ -407,7 +411,6 @@ static int cpm_uart_startup(struct uart_port *port)
 {
 	int retval;
 	struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
-	int line = pinfo - cpm_uart_ports;
 
 	pr_debug("CPM uart[%d]:startup\n", port->line);
 
@@ -426,7 +429,7 @@ static int cpm_uart_startup(struct uart_port *port)
 	}
 
 	if (!(pinfo->flags & FLAG_CONSOLE))
-		cpm_line_cr_cmd(line,CPM_CR_INIT_TRX);
+		cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 	return 0;
 }
 
@@ -442,7 +445,6 @@ inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
 static void cpm_uart_shutdown(struct uart_port *port)
 {
 	struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
-	int line = pinfo - cpm_uart_ports;
 
 	pr_debug("CPM uart[%d]:shutdown\n", port->line);
 
@@ -473,9 +475,9 @@ static void cpm_uart_shutdown(struct uart_port *port)
 
 		/* Shut them really down and reinit buffer descriptors */
 		if (IS_SMC(pinfo))
-			cpm_line_cr_cmd(line, CPM_CR_STOP_TX);
+			cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 		else
-			cpm_line_cr_cmd(line, CPM_CR_GRA_STOP_TX);
+			cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
 
 		cpm_uart_initbd(pinfo);
 	}
@@ -595,7 +597,6 @@ static void cpm_uart_set_termios(struct uart_port *port,
 
 	cpm_set_brg(pinfo->brg - 1, baud);
 	spin_unlock_irqrestore(&port->lock, flags);
-
 }
 
 static const char *cpm_uart_type(struct uart_port *port)
@@ -742,7 +743,6 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
 
 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 {
-	int line = pinfo - cpm_uart_ports;
 	volatile scc_t *scp;
 	volatile scc_uart_t *sup;
 
@@ -783,7 +783,7 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 
 	/* Send the CPM an initialize command.
 	 */
-	cpm_line_cr_cmd(line, CPM_CR_INIT_TRX);
+	cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 
 	/* Set UART mode, 8 bit, no parity, one stop.
 	 * Enable receive and transmit.
@@ -803,7 +803,6 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 
 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 {
-	int line = pinfo - cpm_uart_ports;
 	volatile smc_t *sp;
 	volatile smc_uart_t *up;
 
@@ -840,7 +839,7 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 	up->smc_brkec = 0;
 	up->smc_brkcr = 1;
 
-	cpm_line_cr_cmd(line, CPM_CR_INIT_TRX);
+	cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 
 	/* Set UART mode, 8 bit, no parity, one stop.
 	 * Enable receive and transmit.
@@ -929,6 +928,83 @@ static struct uart_ops cpm_uart_pops = {
 	.verify_port	= cpm_uart_verify_port,
 };
 
+#ifdef CONFIG_PPC_MERGE
+struct uart_cpm_port cpm_uart_ports[UART_NR];
+
+int cpm_uart_init_port(struct device_node *np, struct uart_cpm_port *pinfo)
+{
+	const u32 *data;
+	void __iomem *mem, __iomem *pram;
+	int len;
+	int ret;
+
+	data = of_get_property(np, "fsl,cpm-brg", &len);
+	if (!data || len != 4) {
+		printk(KERN_ERR "CPM UART %s has no/invalid "
+		                "fsl,cpm-brg property.\n", np->name);
+		return -EINVAL;
+	}
+	pinfo->brg = *data;
+
+	data = of_get_property(np, "fsl,cpm-command", &len);
+	if (!data || len != 4) {
+		printk(KERN_ERR "CPM UART %s has no/invalid "
+		                "fsl,cpm-command property.\n", np->name);
+		return -EINVAL;
+	}
+	pinfo->command = *data;
+
+	mem = of_iomap(np, 0);
+	if (!mem)
+		return -ENOMEM;
+
+	pram = of_iomap(np, 1);
+	if (!pram) {
+		ret = -ENOMEM;
+		goto out_mem;
+	}
+
+	if (of_device_is_compatible(np, "fsl,cpm-scc-uart")) {
+		pinfo->sccp = mem;
+		pinfo->sccup = pram;
+	} else if (of_device_is_compatible(np, "fsl,cpm-smc-uart")) {
+		pinfo->flags |= FLAG_SMC;
+		pinfo->smcp = mem;
+		pinfo->smcup = pram;
+	} else {
+		ret = -ENODEV;
+		goto out_pram;
+	}
+
+	pinfo->tx_nrfifos = TX_NUM_FIFO;
+	pinfo->tx_fifosize = TX_BUF_SIZE;
+	pinfo->rx_nrfifos = RX_NUM_FIFO;
+	pinfo->rx_fifosize = RX_BUF_SIZE;
+
+	pinfo->port.uartclk = ppc_proc_freq;
+	pinfo->port.mapbase = (unsigned long)mem;
+	pinfo->port.type = PORT_CPM;
+	pinfo->port.ops = &cpm_uart_pops,
+	pinfo->port.iotype = UPIO_MEM;
+	spin_lock_init(&pinfo->port.lock);
+
+	pinfo->port.irq = of_irq_to_resource(np, 0, NULL);
+	if (pinfo->port.irq == NO_IRQ) {
+		ret = -EINVAL;
+		goto out_pram;
+	}
+
+	return cpm_uart_request_port(&pinfo->port);
+
+out_pram:
+	iounmap(pram);
+out_mem:
+	iounmap(mem);
+	return ret;
+}
+
+#else
+
 struct uart_cpm_port cpm_uart_ports[UART_NR] = {
 	[UART_SMC1] = {
 		.port = {
@@ -1072,6 +1148,7 @@ int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
 
 	return 0;
 }
+#endif
 
 #ifdef CONFIG_SERIAL_CPM_CONSOLE
 /*
@@ -1083,8 +1160,12 @@ int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
 static void cpm_uart_console_write(struct console *co, const char *s,
 				   u_int count)
 {
+#ifdef CONFIG_PPC_MERGE
+	struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
+#else
 	struct uart_cpm_port *pinfo =
 	    &cpm_uart_ports[cpm_uart_port_map[co->index]];
+#endif
 	unsigned int i;
 	volatile cbd_t *bdp, *bdbase;
 	volatile unsigned char *cp;
@@ -1155,13 +1236,41 @@ static void cpm_uart_console_write(struct console *co, const char *s,
 
 static int __init cpm_uart_console_setup(struct console *co, char *options)
 {
-	struct uart_port *port;
-	struct uart_cpm_port *pinfo;
 	int baud = 38400;
 	int bits = 8;
 	int parity = 'n';
 	int flow = 'n';
 	int ret;
+	struct uart_cpm_port *pinfo;
+	struct uart_port *port;
+
+#ifdef CONFIG_PPC_MERGE
+	struct device_node *np = NULL;
+	int i = 0;
+
+	if (co->index >= UART_NR) {
+		printk(KERN_ERR "cpm_uart: console index %d too high\n",
+		       co->index);
+		return -ENODEV;
+	}
+
+	do {
+		np = of_find_compatible_node(np, "serial", "fsl,cpm-uart");
+		if (!np)
+			return -ENODEV;
+	} while (i++ != co->index);
+
+	pinfo = &cpm_uart_ports[co->index];
+
+	pinfo->flags |= FLAG_CONSOLE;
+	port = &pinfo->port;
+
+	ret = cpm_uart_init_port(np, pinfo);
+	of_node_put(np);
+	if (ret)
+		return ret;
+
+#else
 
 	struct fs_uart_platform_info *pdata;
 	struct platform_device* pdev = early_uart_get_pdev(co->index);
@@ -1188,6 +1297,7 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
 	}
 
 	pinfo->flags |= FLAG_CONSOLE;
+#endif
 
 	if (options) {
 		uart_parse_options(options, &baud, &parity, &bits, &flow);
@@ -1196,6 +1306,10 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
 			baud = 9600;
 	}
 
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+	udbg_putc = NULL;
+#endif
+
 	if (IS_SMC(pinfo)) {
 		pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
 		pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
@@ -1252,7 +1366,72 @@ static struct uart_driver cpm_reg = {
 	.major		= SERIAL_CPM_MAJOR,
 	.minor		= SERIAL_CPM_MINOR,
 	.cons		= CPM_UART_CONSOLE,
+	.nr		= UART_NR,
+};
+
+#ifdef CONFIG_PPC_MERGE
+static int probe_index;
+
+static int __devinit cpm_uart_probe(struct of_device *ofdev,
+                                    const struct of_device_id *match)
+{
+	int index = probe_index++;
+	struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
+	int ret;
+
+	pinfo->port.line = index;
+
+	if (index >= UART_NR)
+		return -ENODEV;
+
+	dev_set_drvdata(&ofdev->dev, pinfo);
+
+	ret = cpm_uart_init_port(ofdev->node, pinfo);
+	if (ret)
+		return ret;
+
+	return uart_add_one_port(&cpm_reg, &pinfo->port);
+}
+
+static int __devexit cpm_uart_remove(struct of_device *ofdev)
+{
+	struct uart_cpm_port *pinfo = dev_get_drvdata(&ofdev->dev);
+	return uart_remove_one_port(&cpm_reg, &pinfo->port);
+}
+
+static struct of_device_id cpm_uart_match[] = {
+	{
+		.compatible = "fsl,cpm-uart",
+	},
+	{}
 };
+
+static struct of_platform_driver cpm_uart_driver = {
+	.name = "cpm_uart",
+	.match_table = cpm_uart_match,
+	.probe = cpm_uart_probe,
+	.remove = cpm_uart_remove,
+ };
+
+static int __init cpm_uart_init(void)
+{
+	int ret = uart_register_driver(&cpm_reg);
+	if (ret)
+		return ret;
+
+	ret = of_register_platform_driver(&cpm_uart_driver);
+	if (ret)
+		uart_unregister_driver(&cpm_reg);
+
+	return ret;
+}
+
+static void __exit cpm_uart_exit(void)
+{
+	of_unregister_platform_driver(&cpm_uart_driver);
+	uart_unregister_driver(&cpm_reg);
+}
+#else
 static int cpm_uart_drv_probe(struct device *dev)
 {
 	struct platform_device  *pdev = to_platform_device(dev);
@@ -1380,6 +1559,7 @@ static void __exit cpm_uart_exit(void)
 	driver_unregister(&cpm_smc_uart_driver);
 	uart_unregister_driver(&cpm_reg);
 }
+#endif
 
 module_init(cpm_uart_init);
 module_exit(cpm_uart_exit);
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
index 8c6324e..bffc356 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
@@ -49,9 +49,20 @@
 
 /**************************************************************/
 
-void cpm_line_cr_cmd(int line, int cmd)
+#ifdef CONFIG_PPC_MERGE
+void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
+{
+	u16 __iomem *cpcr = &mpc8xx_immr->im_cpm.cp_cpcr;
+
+	out_be16(cpcr, port->command | (cmd << 8) | CPM_CR_FLG);
+	while (in_be16(cpcr) & CPM_CR_FLG)
+		;
+}
+#else
+void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
 {
 	ushort val;
+	int line = port - cpm_uart_ports;
 	volatile cpm8xx_t *cp = cpmp;
 
 	switch (line) {
@@ -114,6 +125,7 @@ void scc4_lineif(struct uart_cpm_port *pinfo)
 	/* XXX SCC4: insert port configuration here */
 	pinfo->brg = 4;
 }
+#endif
 
 /*
  * Allocate DP-Ram and memory buffers. We need to allocate a transmit and
@@ -184,6 +196,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
 	cpm_dpfree(pinfo->dp_addr);
 }
 
+#ifndef CONFIG_PPC_MERGE
 /* Setup any dynamic params in the uart desc */
 int cpm_uart_init_portdesc(void)
 {
@@ -279,3 +292,4 @@ int cpm_uart_init_portdesc(void)
 #endif
 	return 0;
 }
+#endif
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index 7b61d80..e147485 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -49,9 +49,22 @@
 
 /**************************************************************/
 
-void cpm_line_cr_cmd(int line, int cmd)
+#ifdef CONFIG_PPC_MERGE
+void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
+{
+	cpm_cpm2_t __iomem *cp = cpm2_map(im_cpm);
+
+	out_be32(&cp->cp_cpcr, port->command | cmd | CPM_CR_FLG);
+	while (in_be32(&cp->cp_cpcr) & CPM_CR_FLG)
+		;
+
+	cpm2_unmap(cp);
+}
+#else
+void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
 {
 	ulong val;
+	int line = port - cpm_uart_ports;
 	volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
 
 
@@ -211,6 +224,7 @@ void scc4_lineif(struct uart_cpm_port *pinfo)
 	cpm2_unmap(cpmux);
 	cpm2_unmap(io);
 }
+#endif
 
 /*
  * Allocate DP-Ram and memory buffers. We need to allocate a transmit and 
@@ -281,6 +295,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
 	cpm_dpfree(pinfo->dp_addr);
 }
 
+#ifndef CONFIG_PPC_MERGE
 /* Setup any dynamic params in the uart desc */
 int cpm_uart_init_portdesc(void)
 {
@@ -386,3 +401,4 @@ int cpm_uart_init_portdesc(void)
 
 	return 0;
 }
+#endif
-- 
1.5.0.3

Re: [PATCH 51/61] cpm_uart: Be an of_platform device when using arch/powerpc.

[Vitaly Bordug]

On Tue, 17 Jul 2007 20:36:06 -0500
Scott Wood wrote:

> The existing OF glue code was crufty and broken.  Rather than fix it,
> it has been removed, and the serial driver now talks to the device
> tree directly.
> 
> The non-CONFIG_PPC_MERGE code can do away once CPM platforms are
> dropped from arch/ppc (which will hopefully be soon).

Was is verified to boot on arch/ppc setup? 

-- 
Sincerely, Vitaly

Re: [PATCH 51/61] cpm_uart: Be an of_platform device when using arch/powerpc.

[Arnd Bergmann]

On Wednesday 18 July 2007, Scott Wood wrote:
> +
> +static struct of_device_id cpm_uart_match[] =3D {
> +=A0=A0=A0=A0=A0=A0=A0{
> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0.compatible =3D "fsl,cpm-ua=
rt",
> +=A0=A0=A0=A0=A0=A0=A0},
> +=A0=A0=A0=A0=A0=A0=A0{}
> =A0};
> +

I guess it's fine as it is, but it might be nicer if you change
this to have separate entries for scc and smc, and then pass
different values though of_device_id->data into the probe()
function.

Not sure if it makes much difference at all, but that's what
I did in the of_serial driver.

	Arnd <><

[PATCH 52/61] cpm_uart: Issue STOP_TX command before initializing console.

[Scott Wood]

This prevents some bootloader/bootwrapper characters from being lost.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 drivers/serial/cpm_uart/cpm_uart_core.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index 805ca46..7772c87 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -1310,6 +1310,8 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
 	udbg_putc = NULL;
 #endif
 
+	cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
+
 	if (IS_SMC(pinfo)) {
 		pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
 		pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
@@ -1331,6 +1333,7 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
 		cpm_uart_init_scc(pinfo);
 
 	uart_set_options(port, co, baud, parity, bits, flow);
+	cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
 
 	return 0;
 }
-- 
1.5.0.3

Re: [PATCH 52/61] cpm_uart: Issue STOP_TX command before initializing console.

[Vitaly Bordug]

On Tue, 17 Jul 2007 20:36:08 -0500
Scott Wood wrote:

> This prevents some bootloader/bootwrapper characters from being lost.
> 
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
>  drivers/serial/cpm_uart/cpm_uart_core.c |    3 +++
>  1 files changed, 3 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c
> b/drivers/serial/cpm_uart/cpm_uart_core.c index 805ca46..7772c87
> 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c
> +++ b/drivers/serial/cpm_uart/cpm_uart_core.c
> @@ -1310,6 +1310,8 @@ static int __init cpm_uart_console_setup(struct
> console *co, char *options) udbg_putc = NULL;
>  #endif
>  
> +	cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
> +

I am recalling exactly the contrary patch that removes stuff to get the non-console UARTs work.
Let's better revalidate this once other pieces will be in before applying.


>  	if (IS_SMC(pinfo)) {
>  		pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
>  		pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
> @@ -1331,6 +1333,7 @@ static int __init cpm_uart_console_setup(struct
> console *co, char *options) cpm_uart_init_scc(pinfo);
>  
>  	uart_set_options(port, co, baud, parity, bits, flow);
> +	cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
>  
>  	return 0;
>  }


-- 
Sincerely, Vitaly

Re: [PATCH 52/61] cpm_uart: Issue STOP_TX command before initializing console.

[Scott Wood]

Vitaly Bordug wrote:
>>+	cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
>>+
> 
> 
> I am recalling exactly the contrary patch that removes stuff to get the non-console UARTs work.
> Let's better revalidate this once other pieces will be in before applying.

I tried non-console UARTs and had no problem...  How would this 
interfere with them?  Especially as we're only doing it in the console 
init path...

-Scott

Re: [PATCH 52/61] cpm_uart: Issue STOP_TX command before initializing console.

[Vitaly Bordug]

On Wed, 18 Jul 2007 11:35:58 -0500
Scott Wood wrote:

> Vitaly Bordug wrote:
> >>+	cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
> >>+
> > 
> > 
> > I am recalling exactly the contrary patch that removes stuff to get
> > the non-console UARTs work. Let's better revalidate this once other
> > pieces will be in before applying.
> 
> I tried non-console UARTs and had no problem...  How would this 
> interfere with them?  Especially as we're only doing it in the
> console init path...

Bah, what I am recalling has nothing to do with console path so nm.

-- 
Sincerely, Vitaly

[PATCH 53/61] 82xx: Set NOT_COHERENT_CACHE on 8272 with PCI.

[Scott Wood]

I've seen significant network corruption on a PCI network
card (e1000) with the mpc8272ads; the corruption went away
when I set CONFIG_NOT_COHERENT_CACHE.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/platforms/Kconfig.cputype |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 0e865b8..3cf4af4 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -213,7 +213,7 @@ config NR_CPUS
 
 config NOT_COHERENT_CACHE
 	bool
-	depends on 4xx || 8xx || E200
+	depends on 4xx || 8xx || E200 || (8272 && PCI)
 	default y
 
 config CONFIG_CHECK_CACHE_COHERENCY
-- 
1.5.0.3

Re: [PATCH 53/61] 82xx: Set NOT_COHERENT_CACHE on 8272 with PCI.

[David Gibson]

On Tue, Jul 17, 2007 at 08:36:11PM -0500, Scott Wood wrote:
> I've seen significant network corruption on a PCI network
> card (e1000) with the mpc8272ads; the corruption went away
> when I set CONFIG_NOT_COHERENT_CACHE.
> 
> Signed-off-by: Scott Wood <scottwood@freescale.com>

Hrm... I for one would be a lot more comfortable with this patch if
you had a theoretical explanation for why it's necessary, in addition
to the "seems to fix things".

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

Re: [PATCH 53/61] 82xx: Set NOT_COHERENT_CACHE on 8272 with PCI.

[Kumar Gala]

On Jul 17, 2007, at 10:28 PM, David Gibson wrote:

> On Tue, Jul 17, 2007 at 08:36:11PM -0500, Scott Wood wrote:
>> I've seen significant network corruption on a PCI network
>> card (e1000) with the mpc8272ads; the corruption went away
>> when I set CONFIG_NOT_COHERENT_CACHE.
>>
>> Signed-off-by: Scott Wood <scottwood@freescale.com>
>
> Hrm... I for one would be a lot more comfortable with this patch if
> you had a theoretical explanation for why it's necessary, in addition
> to the "seems to fix things".

I agree w/David.  Have you tried turning on the  
CPU_FTR_NEED_COHERENT?  Take a look at include/asm-powerpc/cputable.h  
and search for the reference to CONFIG_PPC_83xx.

Even if that solves the problem we need to figure out of there is an  
errata or what that causes this to work.

- k

Re: [PATCH 53/61] 82xx: Set NOT_COHERENT_CACHE on 8272 with PCI.

[Scott Wood]

Kumar Gala wrote:
> On Jul 17, 2007, at 10:28 PM, David Gibson wrote:
>> Hrm... I for one would be a lot more comfortable with this patch if
>> you had a theoretical explanation for why it's necessary, in addition
>> to the "seems to fix things".

Sure, so would I; I just wanted to point out the issue, and make 
available a quick fix for anyone else that might be having problems.

My theoretical explanation is that the hardware is broken. :-P

> I agree w/David.  Have you tried turning on the  CPU_FTR_NEED_COHERENT?  
> Take a look at include/asm-powerpc/cputable.h  and search for the 
> reference to CONFIG_PPC_83xx.

OK, that appears to work as well.

-Scott

Re: [PATCH 53/61] 82xx: Set NOT_COHERENT_CACHE on 8272 with PCI.

[Kumar Gala]

On Jul 18, 2007, at 3:08 PM, Scott Wood wrote:

> Kumar Gala wrote:
>> On Jul 17, 2007, at 10:28 PM, David Gibson wrote:
>>> Hrm... I for one would be a lot more comfortable with this patch if
>>> you had a theoretical explanation for why it's necessary, in  
>>> addition
>>> to the "seems to fix things".
>
> Sure, so would I; I just wanted to point out the issue, and make  
> available a quick fix for anyone else that might be having problems.
>
> My theoretical explanation is that the hardware is broken. :-P
>
>> I agree w/David.  Have you tried turning on the   
>> CPU_FTR_NEED_COHERENT?  Take a look at include/asm-powerpc/ 
>> cputable.h  and search for the reference to CONFIG_PPC_83xx.
>
> OK, that appears to work as well.

Can you dump the POCMRx registers and report their values and what / 
proc/iomem looks like.

- k

Re: [PATCH 53/61] 82xx: Set NOT_COHERENT_CACHE on 8272 with PCI.

[Scott Wood]

Kumar Gala wrote:
> Can you dump the POCMRx registers and report their values and what / 
> proc/iomem looks like.

POTAR0: 0x00080000
POTAR1: 0x000a0000
POTAR2: 0x00000000

POBAR0: 0x00080000
POBAR1: 0x000a0000
POBAR2: 0x000f6000

POCMR0: 0xa00e0000
POCMR1: 0x800e0000
POCMR2: 0xc00fe000

PITAR0: 0x00000000
PIBAR0: 0x00000000
PICMR0: 0xa00fc000

-sh-2.05b# cat /proc/iomem
80000000-9fffffff : /soc@f0000000/pci@10800
a0000000-bfffffff : /soc@f0000000/pci@10800
   a0000000-a001ffff : 0000:00:17.0
     a0000000-a001ffff : e1000
   a0020000-a003ffff : 0000:00:17.0
     a0020000-a003ffff : e1000

-Scott

Re: [PATCH 53/61] 82xx: Set NOT_COHERENT_CACHE on 8272 with PCI.

[Segher Boessenkool]

> I've seen significant network corruption on a PCI network
> card (e1000) with the mpc8272ads; the corruption went away
> when I set CONFIG_NOT_COHERENT_CACHE.

That doesn't mean it's the correct fix.  Any idea what the
root cause is?

If you want this patch as a workaround, please document it
in the source code.


Segher

[PATCH 54/61] Update mpc885ads defconfig.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/configs/mpc885_ads_defconfig |   78 +++++++++-------------------
 1 files changed, 25 insertions(+), 53 deletions(-)

diff --git a/arch/powerpc/configs/mpc885_ads_defconfig b/arch/powerpc/configs/mpc885_ads_defconfig
index fc4f9b7..6a4f616 100644
--- a/arch/powerpc/configs/mpc885_ads_defconfig
+++ b/arch/powerpc/configs/mpc885_ads_defconfig
@@ -1,9 +1,22 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22-rc7
-# Sun Jul  1 23:57:01 2007
+# Linux kernel version: 2.6.22
+# Tue Jul 17 15:31:50 2007
 #
 # CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+# CONFIG_PPC_85xx is not set
+CONFIG_PPC_8xx=y
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_8xx=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_NOT_COHERENT_CACHE=y
 CONFIG_PPC32=y
 CONFIG_PPC_MERGE=y
 CONFIG_MMU=y
@@ -24,24 +37,8 @@ CONFIG_PPC_OF=y
 # CONFIG_GENERIC_TBSYNC is not set
 CONFIG_AUDIT_ARCH=y
 # CONFIG_DEFAULT_UIMAGE is not set
-
-#
-# Processor support
-#
-# CONFIG_CLASSIC32 is not set
-# CONFIG_PPC_82xx is not set
-# CONFIG_PPC_83xx is not set
-# CONFIG_PPC_85xx is not set
-# CONFIG_PPC_86xx is not set
-CONFIG_PPC_8xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_E200 is not set
-CONFIG_8xx=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
-# CONFIG_PPC_MM_SLICES is not set
-CONFIG_NOT_COHERENT_CACHE=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
@@ -100,10 +97,6 @@ CONFIG_BASE_SMALL=1
 # Loadable module support
 #
 # CONFIG_MODULES is not set
-
-#
-# Block layer
-#
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
 # CONFIG_BLK_DEV_IO_TRACE is not set
@@ -150,6 +143,7 @@ CONFIG_MPC8xx_SECOND_ETH_FEC2=y
 #
 CONFIG_8xx_COPYBACK=y
 # CONFIG_8xx_CPU6 is not set
+CONFIG_8xx_CPU15=y
 CONFIG_NO_UCODE_PATCH=y
 # CONFIG_USB_SOF_UCODE_PATCH is not set
 # CONFIG_I2C_SPI_UCODE_PATCH is not set
@@ -181,7 +175,7 @@ CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
-CONFIG_MATH_EMULATION=y
+# CONFIG_MATH_EMULATION is not set
 CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
 CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_POPULATES_NODE_MAP=y
@@ -199,7 +193,8 @@ CONFIG_ZONE_DMA_FLAG=1
 # CONFIG_CMDLINE_BOOL is not set
 # CONFIG_PM is not set
 # CONFIG_SECCOMP is not set
-# CONFIG_WANT_DEVICE_TREE is not set
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="mpc885ads.dts"
 CONFIG_ISA_DMA_API=y
 
 #
@@ -344,23 +339,12 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # Plug and Play support
 #
 # CONFIG_PNPACPI is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV is not set
 
 #
 # Misc devices
 #
-# CONFIG_BLINK is not set
+# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_IDE is not set
 
 #
@@ -376,10 +360,6 @@ CONFIG_BLK_DEV_LOOP=y
 #
 # CONFIG_MD is not set
 # CONFIG_MACINTOSH_DRIVERS is not set
-
-#
-# Network device support
-#
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
@@ -398,16 +378,10 @@ CONFIG_DAVICOM_PHY=y
 # CONFIG_VITESSE_PHY is not set
 # CONFIG_SMSC_PHY is not set
 # CONFIG_BROADCOM_PHY is not set
-CONFIG_FIXED_PHY=y
-CONFIG_FIXED_MII_10_FDX=y
-# CONFIG_FIXED_MII_100_FDX is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
-# CONFIG_FEC_8XX is not set
 CONFIG_FS_ENET=y
 CONFIG_FS_ENET_HAS_SCC=y
 CONFIG_FS_ENET_HAS_FEC=y
@@ -547,6 +521,7 @@ CONFIG_GEN_RTC=y
 # Dallas's 1-wire bus
 #
 # CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
 # CONFIG_SENSORS_ABITUGURU is not set
@@ -587,10 +562,7 @@ CONFIG_DAB=y
 # Sound
 #
 # CONFIG_SOUND is not set
-
-#
-# HID Devices
-#
+CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
 # CONFIG_HID_DEBUG is not set
 
-- 
1.5.0.3

[PATCH 55/61] Update mpc8272ads defconfig.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/configs/mpc8272_ads_defconfig |  170 ++++++++++++++++++++--------
 1 files changed, 120 insertions(+), 50 deletions(-)

diff --git a/arch/powerpc/configs/mpc8272_ads_defconfig b/arch/powerpc/configs/mpc8272_ads_defconfig
index 4a42929..47fa429 100644
--- a/arch/powerpc/configs/mpc8272_ads_defconfig
+++ b/arch/powerpc/configs/mpc8272_ads_defconfig
@@ -1,9 +1,25 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22-rc7
-# Sun Jul  1 23:56:55 2007
+# Linux kernel version: 2.6.22
+# Tue Jul 17 20:26:49 2007
 #
 # CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_NOT_COHERENT_CACHE=y
 CONFIG_PPC32=y
 CONFIG_PPC_MERGE=y
 CONFIG_MMU=y
@@ -25,27 +41,8 @@ CONFIG_PPC_OF=y
 CONFIG_AUDIT_ARCH=y
 CONFIG_GENERIC_BUG=y
 CONFIG_DEFAULT_UIMAGE=y
-
-#
-# Processor support
-#
-# CONFIG_CLASSIC32 is not set
-CONFIG_PPC_82xx=y
-# CONFIG_PPC_83xx is not set
-# CONFIG_PPC_85xx is not set
-# CONFIG_PPC_86xx is not set
-# CONFIG_PPC_8xx is not set
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_E200 is not set
-CONFIG_6xx=y
-CONFIG_PPC_FPU=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
-CONFIG_PPC_STD_MMU=y
-CONFIG_PPC_STD_MMU_32=y
-# CONFIG_PPC_MM_SLICES is not set
-# CONFIG_SMP is not set
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
@@ -104,10 +101,6 @@ CONFIG_BASE_SMALL=0
 # Loadable module support
 #
 # CONFIG_MODULES is not set
-
-#
-# Block layer
-#
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
 # CONFIG_BLK_DEV_IO_TRACE is not set
@@ -129,14 +122,20 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
 #
 # Platform support
 #
+# CONFIG_PPC_MULTIPLATFORM is not set
+# CONFIG_EMBEDDED6xx is not set
+CONFIG_PPC_82xx=y
+# CONFIG_PPC_83xx is not set
+# CONFIG_PPC_86xx is not set
 # CONFIG_PPC_MPC52xx is not set
 # CONFIG_PPC_MPC5200 is not set
 # CONFIG_PPC_CELL is not set
 # CONFIG_PPC_CELL_NATIVE is not set
-CONFIG_MPC82xx_ADS=y
+CONFIG_MPC8272ADS=y
 CONFIG_PQ2ADS=y
 CONFIG_8260=y
 CONFIG_8272=y
+CONFIG_PQ2_ADS_PCI_PIC=y
 # CONFIG_MPIC is not set
 # CONFIG_MPIC_WEIRD is not set
 # CONFIG_PPC_I8259 is not set
@@ -176,17 +175,24 @@ CONFIG_PROC_DEVICETREE=y
 # CONFIG_CMDLINE_BOOL is not set
 # CONFIG_PM is not set
 CONFIG_SECCOMP=y
-# CONFIG_WANT_DEVICE_TREE is not set
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="mpc8272ads.dts"
 CONFIG_ISA_DMA_API=y
 
 #
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+# CONFIG_PPC_INDIRECT_PCI_BE is not set
 CONFIG_FSL_SOC=y
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_8260=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+# CONFIG_PCI_DEBUG is not set
 
 #
 # PCCARD (PCMCIA/CardBus) support
@@ -205,6 +211,8 @@ CONFIG_HIGHMEM_START=0xfe000000
 CONFIG_LOWMEM_SIZE=0x30000000
 CONFIG_KERNEL_START=0xc0000000
 CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
 CONFIG_BOOT_LOAD=0x00400000
 
 #
@@ -335,15 +343,16 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # Plug and Play support
 #
 # CONFIG_PNPACPI is not set
-
-#
-# Block devices
-#
+CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
 # CONFIG_BLK_DEV_RAM is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
@@ -351,7 +360,9 @@ CONFIG_BLK_DEV_LOOP=y
 #
 # Misc devices
 #
-# CONFIG_BLINK is not set
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
 CONFIG_IDE=y
 CONFIG_IDE_MAX_HWIFS=4
 CONFIG_BLK_DEV_IDE=y
@@ -371,6 +382,7 @@ CONFIG_IDE_PROC_FS=y
 # IDE chipset support/bugfixes
 #
 # CONFIG_IDE_GENERIC is not set
+# CONFIG_BLK_DEV_IDEPCI is not set
 # CONFIG_IDEPCI_PCIBUS_ORDER is not set
 # CONFIG_IDE_ARM is not set
 # CONFIG_BLK_DEV_IDEDMA is not set
@@ -388,16 +400,32 @@ CONFIG_IDE_PROC_FS=y
 # Multi-device support (RAID and LVM)
 #
 # CONFIG_MD is not set
-# CONFIG_MACINTOSH_DRIVERS is not set
 
 #
-# Network device support
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
 #
+# IEEE 1394 (FireWire) support
+#
+
+#
+# An alternative FireWire stack is available with EXPERIMENTAL=y
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_EQUALIZER is not set
 CONFIG_TUN=y
+# CONFIG_ARCNET is not set
 CONFIG_PHYLIB=y
 
 #
@@ -411,18 +439,43 @@ CONFIG_DAVICOM_PHY=y
 # CONFIG_VITESSE_PHY is not set
 # CONFIG_SMSC_PHY is not set
 # CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
 # CONFIG_FIXED_PHY is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
 CONFIG_FS_ENET=y
 # CONFIG_FS_ENET_HAS_SCC is not set
 CONFIG_FS_ENET_HAS_FCC=y
 CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
 CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TR is not set
 
 #
 # Wireless LAN
@@ -430,6 +483,7 @@ CONFIG_NETDEV_10000=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 # CONFIG_WAN is not set
+# CONFIG_FDDI is not set
 CONFIG_PPP=y
 # CONFIG_PPP_FILTER is not set
 CONFIG_PPP_ASYNC=y
@@ -489,6 +543,7 @@ CONFIG_MOUSE_PS2_LIFEBOOK=y
 CONFIG_MOUSE_PS2_TRACKPOINT=y
 # CONFIG_MOUSE_PS2_TOUCHKIT is not set
 # CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
 # CONFIG_MOUSE_VSXXXAA is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -501,6 +556,7 @@ CONFIG_MOUSE_PS2_TRACKPOINT=y
 CONFIG_SERIO=y
 # CONFIG_SERIO_I8042 is not set
 CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
 CONFIG_SERIO_LIBPS2=y
 # CONFIG_SERIO_RAW is not set
 # CONFIG_GAMEPORT is not set
@@ -530,6 +586,7 @@ CONFIG_SERIAL_CPM_SCC1=y
 CONFIG_SERIAL_CPM_SCC4=y
 # CONFIG_SERIAL_CPM_SMC1 is not set
 # CONFIG_SERIAL_CPM_SMC2 is not set
+# CONFIG_SERIAL_JSM is not set
 CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
@@ -543,11 +600,15 @@ CONFIG_HW_RANDOM=y
 # CONFIG_NVRAM is not set
 # CONFIG_GEN_RTC is not set
 # CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
 # CONFIG_RAW_DRIVER is not set
 
 #
 # TPM devices
 #
+CONFIG_DEVPORT=y
 # CONFIG_I2C is not set
 
 #
@@ -560,6 +621,7 @@ CONFIG_HW_RANDOM=y
 # Dallas's 1-wire bus
 #
 # CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 
 #
@@ -591,19 +653,17 @@ CONFIG_DAB=y
 # Sound
 #
 # CONFIG_SOUND is not set
-
-#
-# HID Devices
-#
+CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
 # CONFIG_HID_DEBUG is not set
 
 #
 # USB support
 #
-# CONFIG_USB_ARCH_HAS_HCD is not set
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+# CONFIG_USB is not set
 
 #
 # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -614,15 +674,23 @@ CONFIG_HID=y
 #
 CONFIG_USB_GADGET=y
 # CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
 # CONFIG_USB_GADGET_FSL_USB2 is not set
-# CONFIG_USB_GADGET_NET2280 is not set
+CONFIG_USB_GADGET_NET2280=y
+CONFIG_USB_NET2280=y
 # CONFIG_USB_GADGET_PXA2XX is not set
 # CONFIG_USB_GADGET_GOKU is not set
 # CONFIG_USB_GADGET_LH7A40X is not set
 # CONFIG_USB_GADGET_OMAP is not set
 # CONFIG_USB_GADGET_AT91 is not set
 # CONFIG_USB_GADGET_DUMMY_HCD is not set
-# CONFIG_USB_GADGET_DUALSPEED is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=y
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
 # CONFIG_MMC is not set
 
 #
@@ -641,6 +709,7 @@ CONFIG_USB_GADGET=y
 #
 # InfiniBand support
 #
+# CONFIG_INFINIBAND is not set
 
 #
 # EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
@@ -846,6 +915,7 @@ CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_SLAB is not set
-- 
1.5.0.3

[PATCH 56/61] 82xx: Add pq2fads board support.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/boot/dts/pq2fads_8280.dts |  234 +++++++++
 arch/powerpc/configs/pq2fads_defconfig |  900 ++++++++++++++++++++++++++++++++
 arch/powerpc/platforms/82xx/Kconfig    |   10 +
 arch/powerpc/platforms/82xx/Makefile   |    1 +
 arch/powerpc/platforms/82xx/pq2fads.c  |  201 +++++++
 5 files changed, 1346 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/pq2fads_8280.dts
 create mode 100644 arch/powerpc/configs/pq2fads_defconfig
 create mode 100644 arch/powerpc/platforms/82xx/pq2fads.c

diff --git a/arch/powerpc/boot/dts/pq2fads_8280.dts b/arch/powerpc/boot/dts/pq2fads_8280.dts
new file mode 100644
index 0000000..c8f6d4d
--- /dev/null
+++ b/arch/powerpc/boot/dts/pq2fads_8280.dts
@@ -0,0 +1,234 @@
+/*
+ * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/ {
+	model = "pq2fads/8280";
+	compatible = "fsl,pq2fads";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		PowerPC,8280@0 {
+			device_type = "cpu";
+			reg = <0>;
+			d-cache-line-size = <d#32>;
+			i-cache-line-size = <d#32>;
+			d-cache-size = <d#16384>;
+			i-cache-size = <d#16384>;
+		};
+	};
+
+	CS: chipselect {
+		compatible = "fsl,pq2fads-chipselect",
+		             "fsl,mpc8280-chipselect",
+		             "fsl,pq2-chipselect";
+		#address-cells = <2>;
+		#size-cells = <1>;
+		fsl,ctrl = <&CSCTRL>;
+
+		ranges = <0 0 fe000000 00800000
+		          1 0 f4500000 00008000
+		          8 0 f8200000 00008000>;
+
+		flash@0 {
+			device_type = "rom";
+			compatible = "direct-mapped";
+			reg = <0 0 800000>;
+			probe-type = "CFI";
+			bank-width = <4>;
+		};
+
+		bcsr@1 {
+			reg = <1 0 20>;
+			compatible = "fsl,pq2fads-bcsr";
+		};
+
+		PCI_PIC: pic@8 {
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			reg = <8 0 8>;
+			compatible = "fsl,pq2ads-pci-pic";
+			interrupt-parent = <&PIC>;
+			interrupts = <18 8>;
+		};
+	};
+
+	soc@f0000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		device_type = "soc";
+		compatible = "fsl,mpc8280", "fsl,pq2-soc";
+		ranges = <00000000 f0000000 00053000>;
+		reg = <f0000000 10000>;
+
+		CSCTRL: chipselect {
+			compatible = "fsl,mpc8280-chipselect-ctrl",
+			             "fsl,pq2-chipselect-ctrl";
+			reg = <10100 60>;
+			fsl,bus = <&CS>;
+		};
+
+		cpm@119c0 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			#interrupt-cells = <2>;
+			compatible = "fsl,mpc8280-cpm", "fsl,cpm2", "fsl,cpm";
+			reg = <119c0 40 0 4000>;
+			ranges;
+
+			serial@11a00 {
+				device_type = "serial";
+				compatible = "fsl,mpc8280-scc-uart",
+				             "fsl,cpm2-scc-uart",
+				             "fsl,cpm2-uart",
+				             "fsl,cpm-scc-uart",
+				             "fsl,cpm-uart";
+				reg = <11a00 20 8000 100>;
+				interrupts = <28 8>;
+				interrupt-parent = <&PIC>;
+				fsl,cpm-brg = <1>;
+				fsl,cpm-command = <00800000>;
+			};
+
+			serial@11a20 {
+				device_type = "serial";
+				compatible = "fsl,mpc8280-scc-uart",
+				             "fsl,cpm2-scc-uart",
+				             "fsl,cpm2-uart",
+				             "fsl,cpm-scc-uart",
+				             "fsl,cpm-uart";
+				reg = <11a20 20 8100 100>;
+				interrupts = <29 8>;
+				interrupt-parent = <&PIC>;
+				fsl,cpm-brg = <2>;
+				fsl,cpm-command = <04a00000>;
+			};
+
+			ethernet@11320 {
+				device_type = "network";
+				compatible = "fsl,mpc8280-fcc-enet",
+				             "fsl,cpm2-fcc-enet",
+				             "fsl,cpm2-enet",
+				             "fsl,cpm-fcc-enet",
+				             "fsl,cpm-enet";
+				reg = <11320 20 8500 100 113b0 1>;
+				interrupts = <21 8>;
+				interrupt-parent = <&PIC>;
+				phy-handle = <&PHY0>;
+				linux,network-index = <0>;
+				fsl,cpm-command = <16200300>;
+			};
+
+			ethernet@11340 {
+				device_type = "network";
+				compatible = "fsl,mpc8280-fcc-enet",
+				             "fsl,cpm2-fcc-enet",
+				             "fsl,cpm2-enet",
+				             "fsl,cpm-fcc-enet",
+				             "fsl,cpm-enet";
+				reg = <11340 20 8600 100 113d0 1>;
+				interrupts = <22 8>;
+				interrupt-parent = <&PIC>;
+				phy-handle = <&PHY1>;
+				linux,network-index = <1>;
+				fsl,cpm-command = <1a400300>;
+				local-mac-address = [00 e0 0c 00 79 01];
+			};
+
+			mdio@10d40 {
+				device_type = "mdio";
+				compatible = "fsl,pq2fads-mdio-bitbang",
+				             "fsl,mpc8280-mdio-bitbang",
+				             "fsl,cpm2-mdio-bitbang";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <10d40 14>;
+				fsl,mdio-pin = <9>;
+				fsl,mdc-pin = <a>;
+
+				PHY0: ethernet-phy@0 {
+					interrupt-parent = <&PIC>;
+					interrupts = <19 2>;
+					reg = <0>;
+					device_type = "ethernet-phy";
+				};
+
+				PHY1: ethernet-phy@1 {
+					interrupt-parent = <&PIC>;
+					interrupts = <19 2>;
+					reg = <3>;
+					device_type = "ethernet-phy";
+				};
+			};
+
+			usb@11b60 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "fsl,mpc8280-usb",
+				             "fsl,cpm2-usb",
+				             "fsl,cpm-usb";
+				reg = <11b60 18 8b00 100>;
+				interrupt-parent = <&PIC>;
+				interrupts = <b 8>;
+				fsl,cpm-command = <2e600000>;
+			};
+		};
+
+		PIC: interrupt-controller@10c00 {
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			reg = <10c00 80>;
+			compatible = "fsl,mpc8280-pic", "fsl,pq2-pic";
+		};
+
+		pci@10800 {
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
+			device_type = "pci";
+			reg = <10800 10c 101ac 8 101c4 8>;
+			clock-frequency = <d#66000000>;
+			interrupt-map-mask = <f800 0 0 7>;
+			interrupt-map = <
+					/* IDSEL 0x16 */
+					b000 0 0 1 &PCI_PIC 0
+					b000 0 0 2 &PCI_PIC 1
+					b000 0 0 3 &PCI_PIC 2
+					b000 0 0 4 &PCI_PIC 3
+
+					/* IDSEL 0x17 */
+					b800 0 0 1 &PCI_PIC 4
+					b800 0 0 2 &PCI_PIC 5
+					b800 0 0 3 &PCI_PIC 6
+					b800 0 0 4 &PCI_PIC 7
+
+					/* IDSEL 0x18 */
+					c000 0 0 1 &PCI_PIC 8
+					c000 0 0 2 &PCI_PIC 9
+					c000 0 0 3 &PCI_PIC a
+					c000 0 0 4 &PCI_PIC b>;
+
+			interrupt-parent = <&PIC>;
+			interrupts = <12 8>;
+			ranges = <42000000 0 80000000 80000000 0 20000000
+			          02000000 0 a0000000 a0000000 0 20000000
+			          01000000 0 00000000 f6000000 0 02000000>;
+		};
+	};
+
+	chosen {
+		linux,stdout-path = "/soc/cpm/serial@11a00";
+	};
+};
diff --git a/arch/powerpc/configs/pq2fads_defconfig b/arch/powerpc/configs/pq2fads_defconfig
new file mode 100644
index 0000000..e8254bd
--- /dev/null
+++ b/arch/powerpc/configs/pq2fads_defconfig
@@ -0,0 +1,900 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.22
+# Tue Jul 17 18:46:47 2007
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_PPC32=y
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+# CONFIG_PPC_UDBG_16550 is not set
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_IPC_NS is not set
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_UTS_NS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# Platform support
+#
+# CONFIG_PPC_MULTIPLATFORM is not set
+# CONFIG_EMBEDDED6xx is not set
+CONFIG_PPC_82xx=y
+# CONFIG_PPC_83xx is not set
+# CONFIG_PPC_86xx is not set
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_MPC8272ADS is not set
+CONFIG_PQ2FADS=y
+CONFIG_PQ2ADS=y
+CONFIG_8260=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+CONFIG_CPM2=y
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="pq2fads_8280.dts"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_FSL_SOC=y
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_BOOT_LOAD=0x00400000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK is not set
+# CONFIG_NF_CONNTRACK_ENABLED is not set
+# CONFIG_NF_CONNTRACK is not set
+# CONFIG_NETFILTER_XTABLES is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+# CONFIG_PNPACPI is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# Misc devices
+#
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_IDE=y
+CONFIG_IDE_MAX_HWIFS=4
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_PROC_FS=y
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_IDE_GENERIC is not set
+# CONFIG_IDEPCI_PCIBUS_ORDER is not set
+# CONFIG_IDE_ARM is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+CONFIG_DAVICOM_PHY=y
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_FS_ENET=y
+# CONFIG_FS_ENET_HAS_SCC is not set
+CONFIG_FS_ENET_HAS_FCC=y
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_CPM=y
+CONFIG_SERIAL_CPM_CONSOLE=y
+CONFIG_SERIAL_CPM_SCC1=y
+# CONFIG_SERIAL_CPM_SCC2 is not set
+# CONFIG_SERIAL_CPM_SCC3 is not set
+CONFIG_SERIAL_CPM_SCC4=y
+# CONFIG_SERIAL_CPM_SMC1 is not set
+# CONFIG_SERIAL_CPM_SMC2 is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_FB is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+
+#
+# USB support
+#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_MMC is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# InfiniBand support
+#
+
+#
+# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+#
+
+#
+# Real Time Clock
+#
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_HFSPLUS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_KGDB_CONSOLE is not set
+CONFIG_BDI_SWITCH=y
+# CONFIG_BOOTX_TEXT is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=y
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+
+#
+# Hardware crypto devices
+#
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 428e1e5..8038544 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -14,6 +14,16 @@ config MPC8272ADS
 	help
 	This option enables support for the MPC8272 ADS board
 
+config PQ2FADS
+	bool "Freescale PQ2FADS"
+	select DEFAULT_UIMAGE
+	select PQ2ADS
+	select 8260
+	select FSL_SOC
+	select PQ2_ADS_PCI_PIC if PCI
+	help
+	This option enables support for the PQ2FADS board
+
 endchoice
 
 config PQ2ADS
diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index 57c9e1d..7a13248 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_PPC_82xx) += mpc82xx.o
 obj-$(CONFIG_MPC8272ADS) += mpc8272ads.o
 obj-$(CONFIG_CPM2) += pq2.o
 obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
+obj-$(CONFIG_PQ2FADS) += pq2fads.o
diff --git a/arch/powerpc/platforms/82xx/pq2fads.c b/arch/powerpc/platforms/82xx/pq2fads.c
new file mode 100644
index 0000000..3615128
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/pq2fads.c
@@ -0,0 +1,201 @@
+/*
+ * PQ2FADS board support
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Loosely based on mp82xx ADS support by Vitaly Bordug <vbordug@ru.mvista.com>
+ * Copyright (c) 2006 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/fsl_devices.h>
+
+#include <asm/io.h>
+#include <asm/cpm2.h>
+#include <asm/udbg.h>
+#include <asm/machdep.h>
+#include <asm/of_platform.h>
+#include <asm/time.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/cpm2_pic.h>
+
+#include "pq2ads.h"
+#include "pq2.h"
+
+static void __init pq2fads_pic_init(void)
+{
+	struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
+	if (!np) {
+		printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
+		return;
+	}
+
+	cpm2_pic_init(np);
+	of_node_put(np);
+
+	/* Initialize stuff for the 82xx CPLD IC and install demux  */
+	pq2ads_pci_init_irq();
+}
+
+struct cpm_pin {
+	int port, pin, flags;
+};
+
+static struct cpm_pin pq2fads_pins[] = {
+	/* SCC1 */
+	{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+	/* SCC2 */
+	{3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+	/* FCC2 */
+	{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+	{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+	/* FCC3 */
+	{1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+	{1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+	{2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+};
+
+static void __init init_ioports(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(pq2fads_pins); i++) {
+		struct cpm_pin *pin = &pq2fads_pins[i];
+		cpm2_set_pin(pin->port, pin->pin, pin->flags);
+	}
+
+	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
+	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
+	cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
+	cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
+	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
+	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
+	cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
+	cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
+}
+
+static void __init pq2fads_setup_arch(void)
+{
+	struct device_node *np;
+	struct resource r;
+	u32 *bcsr;
+
+	if (ppc_md.progress)
+		ppc_md.progress("pq2fads_setup_arch()", 0);
+
+	cpm2_reset();
+
+	np = of_find_compatible_node(NULL, NULL, "fsl,pq2fads-bcsr");
+	if (!np) {
+		printk(KERN_ERR "No fsl,pq2fads-bcsr in device tree\n");
+		return;
+	}
+
+	if (of_address_to_resource(np, 0, &r)) {
+		printk(KERN_ERR "No reg in fsl,pq2fads-bcsr node\n");
+		of_node_put(np);
+		return;
+	}
+
+	of_node_put(np);
+
+	/* Enable the serial and ethernet ports */
+	bcsr = ioremap(r.start, 20);
+
+	clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
+	setbits32(&bcsr[1], BCSR1_FETH_RST);
+
+	clrbits32(&bcsr[3], BCSR3_FETHIEN2);
+	setbits32(&bcsr[3], BCSR3_FETH2_RST);
+
+	iounmap(bcsr);
+
+	init_ioports();
+
+	/* Enable external IRQs */
+	clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_siumcr, 0x0c000000);
+
+	pq2_init_pci();
+
+	if (ppc_md.progress)
+		ppc_md.progress("pq2fads_setup_arch(), finish", 0);
+}
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init pq2fads_probe(void)
+{
+	unsigned long root = of_get_flat_dt_root();
+	return of_flat_dt_is_compatible(root, "fsl,pq2fads");
+}
+
+static struct of_device_id __initdata of_bus_ids[] = {
+	{ .name = "soc", },
+	{ .name = "cpm", },
+	{},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+	if (!machine_is(pq2fads))
+		return 0;
+
+	/* Publish the QE devices */
+	of_platform_bus_probe(NULL, of_bus_ids, NULL);
+	return 0;
+}
+device_initcall(declare_of_platform_devices);
+
+define_machine(pq2fads)
+{
+	.name = "Freescale PQ2FADS",
+	.probe = pq2fads_probe,
+	.setup_arch = pq2fads_setup_arch,
+	.init_IRQ = pq2fads_pic_init,
+	.show_cpuinfo = m82xx_show_cpuinfo,
+	.get_irq = cpm2_get_irq,
+	.calibrate_decr = generic_calibrate_decr,
+	.restart = pq2_restart,
+	.halt = pq2_halt,
+	.progress = udbg_progress,
+};
-- 
1.5.0.3

Re: [PATCH 56/61] 82xx: Add pq2fads board support.

[Arnd Bergmann]

On Wednesday 18 July 2007, Scott Wood wrote:
> +static void __init pq2fads_setup_arch(void)
> +{
> +	struct device_node *np;
> +	struct resource r;
> +	u32 *bcsr;

bcsr should be __iomem, right? Did you run your code through sparse?

	Arnd <><

Re: [PATCH 56/61] 82xx: Add pq2fads board support.

[Scott Wood]

Arnd Bergmann wrote:
> On Wednesday 18 July 2007, Scott Wood wrote:
> 
>>+static void __init pq2fads_setup_arch(void)
>>+{
>>+	struct device_node *np;
>>+	struct resource r;
>>+	u32 *bcsr;
> 
> 
> bcsr should be __iomem, right?

Oops, yes.

> Did you run your code through sparse?

No, installing sparse is still on my to-do list.  I guess I should raise 
its priority. :-)

-Scott

[PATCH 57/61] fs_enet: Whitespace cleanup.

[Scott Wood]

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 drivers/net/fs_enet/fs_enet-main.c |   85 ++++++++++++++++-------------------
 drivers/net/fs_enet/mac-fcc.c      |    1 -
 drivers/net/fs_enet/mii-fec.c      |    1 -
 3 files changed, 39 insertions(+), 48 deletions(-)

diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index a4a2a0e..f261b90 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -353,7 +353,6 @@ static void fs_enet_tx(struct net_device *dev)
 
 	do_wake = do_restart = 0;
 	while (((sc = CBDR_SC(bdp)) & BD_ENET_TX_READY) == 0) {
-
 		dirtyidx = bdp - fep->tx_bd_base;
 
 		if (fep->tx_free == fep->tx_ring)
@@ -454,7 +453,6 @@ fs_enet_interrupt(int irq, void *dev_id)
 
 	nr = 0;
 	while ((int_events = (*fep->ops->get_int_events)(dev)) != 0) {
-
 		nr++;
 
 		int_clr_events = int_events;
@@ -710,45 +708,43 @@ static void fs_timeout(struct net_device *dev)
  *-----------------------------------------------------------------------------*/
 static void generic_adjust_link(struct  net_device *dev)
 {
-       struct fs_enet_private *fep = netdev_priv(dev);
-       struct phy_device *phydev = fep->phydev;
-       int new_state = 0;
-
-       if (phydev->link) {
-
-               /* adjust to duplex mode */
-               if (phydev->duplex != fep->oldduplex){
-                       new_state = 1;
-                       fep->oldduplex = phydev->duplex;
-               }
-
-               if (phydev->speed != fep->oldspeed) {
-                       new_state = 1;
-                       fep->oldspeed = phydev->speed;
-               }
-
-               if (!fep->oldlink) {
-                       new_state = 1;
-                       fep->oldlink = 1;
-                       netif_schedule(dev);
-                       netif_carrier_on(dev);
-                       netif_start_queue(dev);
-               }
-
-               if (new_state)
-                       fep->ops->restart(dev);
-
-       } else if (fep->oldlink) {
-               new_state = 1;
-               fep->oldlink = 0;
-               fep->oldspeed = 0;
-               fep->oldduplex = -1;
-               netif_carrier_off(dev);
-               netif_stop_queue(dev);
-       }
-
-       if (new_state && netif_msg_link(fep))
-               phy_print_status(phydev);
+	struct fs_enet_private *fep = netdev_priv(dev);
+	struct phy_device *phydev = fep->phydev;
+	int new_state = 0;
+
+	if (phydev->link) {
+		/* adjust to duplex mode */
+		if (phydev->duplex != fep->oldduplex) {
+			new_state = 1;
+			fep->oldduplex = phydev->duplex;
+		}
+
+		if (phydev->speed != fep->oldspeed) {
+			new_state = 1;
+			fep->oldspeed = phydev->speed;
+		}
+
+		if (!fep->oldlink) {
+			new_state = 1;
+			fep->oldlink = 1;
+			netif_schedule(dev);
+			netif_carrier_on(dev);
+			netif_start_queue(dev);
+		}
+
+		if (new_state)
+			fep->ops->restart(dev);
+	} else if (fep->oldlink) {
+		new_state = 1;
+		fep->oldlink = 0;
+		fep->oldspeed = 0;
+		fep->oldduplex = -1;
+		netif_carrier_off(dev);
+		netif_stop_queue(dev);
+	}
+
+	if (new_state && netif_msg_link(fep))
+		phy_print_status(phydev);
 }
 
 
@@ -792,7 +788,6 @@ static int fs_init_phy(struct net_device *dev)
 	return 0;
 }
 
-
 static int fs_enet_open(struct net_device *dev)
 {
 	struct fs_enet_private *fep = netdev_priv(dev);
@@ -978,7 +973,7 @@ static struct net_device *fs_init_instance(struct device *dev,
 #endif
 
 #ifdef CONFIG_FS_ENET_HAS_SCC
-	if (fs_get_scc_index(fpi->fs_no) >=0 )
+	if (fs_get_scc_index(fpi->fs_no) >=0)
 		fep->ops = &fs_scc_ops;
 #endif
 
@@ -1069,9 +1064,8 @@ static struct net_device *fs_init_instance(struct device *dev,
 
 	return ndev;
 
-      err:
+err:
 	if (ndev != NULL) {
-
 		if (registered)
 			unregister_netdev(ndev);
 
@@ -1262,7 +1256,6 @@ static int __init fs_init(void)
 err:
 	cleanup_immap();
 	return r;
-	
 }
 
 static void __exit fs_cleanup(void)
diff --git a/drivers/net/fs_enet/mac-fcc.c b/drivers/net/fs_enet/mac-fcc.c
index 5603121..ad3c5fa 100644
--- a/drivers/net/fs_enet/mac-fcc.c
+++ b/drivers/net/fs_enet/mac-fcc.c
@@ -86,7 +86,6 @@
 static inline int fcc_cr_cmd(struct fs_enet_private *fep, u32 mcn, u32 op)
 {
 	const struct fs_platform_info *fpi = fep->fpi;
-
 	cpm2_map_t *immap = fs_enet_immap;
 	cpm_cpm2_t *cpmp = &immap->im_cpm;
 	u32 v;
diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c
index 0a563a8..53db696 100644
--- a/drivers/net/fs_enet/mii-fec.c
+++ b/drivers/net/fs_enet/mii-fec.c
@@ -113,7 +113,6 @@ static int fs_enet_fec_mii_read(struct mii_bus *bus , int phy_id, int location)
 	}
 
 	return ret;
-
 }
 
 static int fs_enet_fec_mii_write(struct mii_bus *bus, int phy_id, int location, u16 val)
-- 
1.5.0.3

[PATCH 58/61] fs_enet: Don't share the interrupt.

[Scott Wood]

This driver can't handle an interrupt immediately after request_irq
(making it fail with CONFIG_DEBUG_SHIRQ), and has unshared interrupts
on all hardware I'm aware of.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 drivers/net/fs_enet/fs_enet-main.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index f261b90..da79a45 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -667,7 +667,7 @@ static int fs_request_irq(struct net_device *dev, int irq, const char *name,
 	struct fs_enet_private *fep = netdev_priv(dev);
 
 	(*fep->ops->pre_request_irq)(dev, irq);
-	return request_irq(irq, irqf, IRQF_SHARED, name, dev);
+	return request_irq(irq, irqf, 0, name, dev);
 }
 
 static void fs_free_irq(struct net_device *dev, int irq)
-- 
1.5.0.3

[PATCH 59/61] fs_enet: mac-fcc: Eliminate __fcc-* macros.

[Scott Wood]

These macros accomplish nothing other than defeating type checking.

This patch also fixes one instance of the wrong register size being
used that was revealed by enabling type checking.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 drivers/net/fs_enet/mac-fcc.c |   25 ++++++++-----------------
 1 files changed, 8 insertions(+), 17 deletions(-)

diff --git a/drivers/net/fs_enet/mac-fcc.c b/drivers/net/fs_enet/mac-fcc.c
index ad3c5fa..8b30361 100644
--- a/drivers/net/fs_enet/mac-fcc.c
+++ b/drivers/net/fs_enet/mac-fcc.c
@@ -48,28 +48,19 @@
 
 /* FCC access macros */
 
-#define __fcc_out32(addr, x)	out_be32((unsigned *)addr, x)
-#define __fcc_out16(addr, x)	out_be16((unsigned short *)addr, x)
-#define __fcc_out8(addr, x)	out_8((unsigned char *)addr, x)
-#define __fcc_in32(addr)	in_be32((unsigned *)addr)
-#define __fcc_in16(addr)	in_be16((unsigned short *)addr)
-#define __fcc_in8(addr)		in_8((unsigned char *)addr)
-
-/* parameter space */
-
 /* write, read, set bits, clear bits */
-#define W32(_p, _m, _v)	__fcc_out32(&(_p)->_m, (_v))
-#define R32(_p, _m)	__fcc_in32(&(_p)->_m)
+#define W32(_p, _m, _v)	out_be32(&(_p)->_m, (_v))
+#define R32(_p, _m)	in_be32(&(_p)->_m)
 #define S32(_p, _m, _v)	W32(_p, _m, R32(_p, _m) | (_v))
 #define C32(_p, _m, _v)	W32(_p, _m, R32(_p, _m) & ~(_v))
 
-#define W16(_p, _m, _v)	__fcc_out16(&(_p)->_m, (_v))
-#define R16(_p, _m)	__fcc_in16(&(_p)->_m)
+#define W16(_p, _m, _v)	out_be16(&(_p)->_m, (_v))
+#define R16(_p, _m)	in_be16(&(_p)->_m)
 #define S16(_p, _m, _v)	W16(_p, _m, R16(_p, _m) | (_v))
 #define C16(_p, _m, _v)	W16(_p, _m, R16(_p, _m) & ~(_v))
 
-#define W8(_p, _m, _v)	__fcc_out8(&(_p)->_m, (_v))
-#define R8(_p, _m)	__fcc_in8(&(_p)->_m)
+#define W8(_p, _m, _v)	out_8(&(_p)->_m, (_v))
+#define R8(_p, _m)	in_8(&(_p)->_m)
 #define S8(_p, _m, _v)	W8(_p, _m, R8(_p, _m) | (_v))
 #define C8(_p, _m, _v)	W8(_p, _m, R8(_p, _m) & ~(_v))
 
@@ -290,7 +281,7 @@ static void restart(struct net_device *dev)
 
 	/* clear everything (slow & steady does it) */
 	for (i = 0; i < sizeof(*ep); i++)
-		__fcc_out8((char *)ep + i, 0);
+		out_8((char *)ep + i, 0);
 
 	/* get physical address */
 	rx_bd_base_phys = fep->ring_mem_addr;
@@ -495,7 +486,7 @@ static void tx_kickstart(struct net_device *dev)
 	struct fs_enet_private *fep = netdev_priv(dev);
 	fcc_t *fccp = fep->fcc.fccp;
 
-	S32(fccp, fcc_ftodr, 0x80);
+	S16(fccp, fcc_ftodr, 0x8000);
 }
 
 static u32 get_int_events(struct net_device *dev)
-- 
1.5.0.3

[PATCH 60/61] fs_enet: Align receive buffers.

[Scott Wood]

At least some hardware driven by this driver needs receive buffers
to be aligned on a 16-byte boundary.  This usually happens by chance,
but it breaks if slab debugging is enabled.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 drivers/net/fs_enet/fs_enet-main.c |   21 +++++++++++++++++++--
 drivers/net/fs_enet/fs_enet.h      |    3 ++-
 2 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index da79a45..a4b76cd 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -69,6 +69,14 @@ static void fs_set_multicast_list(struct net_device *dev)
 	(*fep->ops->set_multicast_list)(dev);
 }
 
+static void skb_align(struct sk_buff *skb, int align)
+{
+	int off = ((unsigned long)skb->data) & (align - 1);
+
+	if (off)
+		skb_reserve(skb, align - off);
+}
+
 /* NAPI receive function */
 static int fs_enet_rx_napi(struct net_device *dev, int *budget)
 {
@@ -166,9 +174,13 @@ static int fs_enet_rx_napi(struct net_device *dev, int *budget)
 					skb = skbn;
 					skbn = skbt;
 				}
-			} else
+			} else {
 				skbn = dev_alloc_skb(ENET_RX_FRSIZE);
 
+				if (skbn)
+					skb_align(skbn, ENET_RX_ALIGN);
+			}
+
 			if (skbn != NULL) {
 				skb_put(skb, pkt_len);	/* Make room */
 				skb->protocol = eth_type_trans(skb, dev);
@@ -300,9 +312,13 @@ static int fs_enet_rx_non_napi(struct net_device *dev)
 					skb = skbn;
 					skbn = skbt;
 				}
-			} else
+			} else {
 				skbn = dev_alloc_skb(ENET_RX_FRSIZE);
 
+				if (skbn)
+					skb_align(skbn, ENET_RX_ALIGN);
+			}
+
 			if (skbn != NULL) {
 				skb_put(skb, pkt_len);	/* Make room */
 				skb->protocol = eth_type_trans(skb, dev);
@@ -512,6 +528,7 @@ void fs_init_bds(struct net_device *dev)
 			       dev->name);
 			break;
 		}
+		skb_align(skb, ENET_RX_ALIGN);
 		fep->rx_skbuff[i] = skb;
 		CBDW_BUFADDR(bdp,
 			dma_map_single(fep->dev, skb->data,
diff --git a/drivers/net/fs_enet/fs_enet.h b/drivers/net/fs_enet/fs_enet.h
index 569be22..6875dd8 100644
--- a/drivers/net/fs_enet/fs_enet.h
+++ b/drivers/net/fs_enet/fs_enet.h
@@ -82,7 +82,8 @@ struct phy_info {
 /* Must be a multiple of 32 (to cover both FEC & FCC) */
 #define PKT_MAXBLR_SIZE		((PKT_MAXBUF_SIZE + 31) & ~31)
 /* This is needed so that invalidate_xxx wont invalidate too much */
-#define ENET_RX_FRSIZE		L1_CACHE_ALIGN(PKT_MAXBUF_SIZE)
+#define ENET_RX_ALIGN  16
+#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE + ENET_RX_ALIGN - 1)
 
 struct fs_enet_mii_bus {
 	struct list_head list;
-- 
1.5.0.3

[PATCH 61/61] fs_enet: Be an of_platform device when using arch/powerpc.

[Scott Wood]

The existing OF glue code was crufty and broken.  Rather than fix it, it
has been removed, and the ethernet driver now talks to the device tree
directly.

The non-CONFIG_PPC_MERGE code can go away once CPM platforms are dropped from
arch/ppc (which will hopefully be soon).

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 drivers/net/fs_enet/fs_enet-main.c |  286 +++++++++++++++++++++++++++++++++--
 drivers/net/fs_enet/fs_enet.h      |   18 +--
 drivers/net/fs_enet/mac-fcc.c      |   89 ++++++++---
 drivers/net/fs_enet/mac-fec.c      |   19 +++-
 drivers/net/fs_enet/mac-scc.c      |   53 +++++--
 drivers/net/fs_enet/mii-bitbang.c  |  249 ++++++++++++++++++++++++--------
 drivers/net/fs_enet/mii-fec.c      |  140 +++++++++++++++++-
 include/linux/fs_enet_pd.h         |    5 +
 8 files changed, 731 insertions(+), 128 deletions(-)

diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index a4b76cd..77849d1 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -44,12 +44,18 @@
 #include <asm/irq.h>
 #include <asm/uaccess.h>
 
+#ifdef CONFIG_PPC_MERGE
+#include <asm/of_platform.h>
+#endif
+
 #include "fs_enet.h"
 
 /*************************************************/
 
+#ifndef CONFIG_PPC_MERGE
 static char version[] __devinitdata =
     DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")" "\n";
+#endif
 
 MODULE_AUTHOR("Pantelis Antoniou <panto@intracom.gr>");
 MODULE_DESCRIPTION("Freescale Ethernet Driver");
@@ -953,6 +959,7 @@ static int fs_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 extern int fs_mii_connect(struct net_device *dev);
 extern void fs_mii_disconnect(struct net_device *dev);
 
+#ifndef CONFIG_PPC_MERGE
 static struct net_device *fs_init_instance(struct device *dev,
 		struct fs_platform_info *fpi)
 {
@@ -1132,6 +1139,7 @@ static int fs_cleanup_instance(struct net_device *ndev)
 
 	return 0;
 }
+#endif
 
 /**************************************************************************************/
 
@@ -1140,35 +1148,279 @@ void *fs_enet_immap = NULL;
 
 static int setup_immap(void)
 {
-	phys_addr_t paddr = 0;
-	unsigned long size = 0;
-
 #ifdef CONFIG_CPM1
-	paddr = IMAP_ADDR;
-	size = 0x10000;	/* map 64K */
+#ifdef CONFIG_PPC_MERGE
+	fs_enet_immap = mpc8xx_immr;
+#else
+	fs_enet_immap = ioremap(IMAP_ADDR, 0x4000);
+	WARN_ON(!fs_enet_immap);
 #endif
-
-#ifdef CONFIG_CPM2
-	paddr = CPM_MAP_ADDR;
-	size = 0x40000;	/* map 256 K */
+#elif defined(CONFIG_CPM2)
+	fs_enet_immap = cpm2_immr;
 #endif
-	fs_enet_immap = ioremap(paddr, size);
-	if (fs_enet_immap == NULL)
-		return -EBADF;	/* XXX ahem; maybe just BUG_ON? */
 
 	return 0;
 }
 
+#ifndef CONFIG_PPC_MERGE
 static void cleanup_immap(void)
 {
-	if (fs_enet_immap != NULL) {
-		iounmap(fs_enet_immap);
-		fs_enet_immap = NULL;
-	}
+#if defined(CONFIG_CPM1)
+	iounmap(fs_enet_immap);
+#endif
 }
+#endif
 
 /**************************************************************************************/
 
+#ifdef CONFIG_PPC_MERGE
+static int __devinit find_phy(struct device_node *np,
+                              struct fs_platform_info *fpi)
+{
+	struct device_node *phynode, *mdionode;
+	struct resource res;
+	int ret = 0, len;
+
+	const u32 *data = of_get_property(np, "phy-handle", &len);
+	if (!data || len != 4)
+		return -EINVAL;
+
+	phynode = of_find_node_by_phandle(*data);
+	if (!phynode)
+		return -EINVAL;
+
+	mdionode = of_get_parent(phynode);
+	if (!phynode)
+		goto out_put_phy;
+
+	ret = of_address_to_resource(mdionode, 0, &res);
+	if (ret)
+		goto out_put_mdio;
+
+	data = of_get_property(phynode, "reg", &len);
+	if (!data || len != 4)
+		goto out_put_mdio;
+
+	snprintf(fpi->bus_id, 16, PHY_ID_FMT, res.start, *data);
+
+out_put_mdio:
+	of_node_put(mdionode);
+out_put_phy:
+	of_node_put(phynode);
+	return ret;
+}
+
+#ifdef CONFIG_FS_ENET_HAS_FEC
+#define IS_FEC(match) ((match)->data == &fs_fec_ops)
+#else
+#define IS_FEC(match) 0
+#endif
+
+static int __devinit fs_enet_probe(struct of_device *ofdev,
+                                   const struct of_device_id *match)
+{
+	struct net_device *ndev;
+	struct fs_enet_private *fep;
+	struct fs_platform_info *fpi;
+	const u32 *data;
+	const u8 *mac_addr;
+	int privsize, len, ret = -ENODEV;
+
+	fpi = kzalloc(sizeof(*fpi), GFP_KERNEL);
+	if (!fpi)
+		return -ENOMEM;
+
+	if (!IS_FEC(match)) {
+		data = of_get_property(ofdev->node, "fsl,cpm-command", &len);
+		if (!data || len != 4)
+			goto out_free_fpi;
+
+		fpi->cp_command = *data;
+	}
+
+	fpi->rx_ring = 32;
+	fpi->tx_ring = 32;
+	fpi->rx_copybreak = 240;
+	fpi->use_napi = 0;
+	fpi->napi_weight = 17;
+
+	ret = find_phy(ofdev->node, fpi);
+	if (ret)
+		goto out_free_fpi;
+
+	privsize = sizeof(*fep) +
+	           sizeof(struct sk_buff **) *
+	           (fpi->rx_ring + fpi->tx_ring);
+
+	ndev = alloc_etherdev(privsize);
+	if (!ndev) {
+		ret = -ENOMEM;
+		goto out_free_fpi;
+	}
+
+	SET_MODULE_OWNER(ndev);
+	dev_set_drvdata(&ofdev->dev, ndev);
+
+	fep = netdev_priv(ndev);
+	fep->dev = &ofdev->dev;
+	fep->fpi = fpi;
+	fep->ops = match->data;
+
+	ret = fep->ops->setup_data(ndev);
+	if (ret)
+		goto out_free_dev;
+
+	fep->rx_skbuff = (struct sk_buff **)&fep[1];
+	fep->tx_skbuff = fep->rx_skbuff + fpi->rx_ring;
+
+	spin_lock_init(&fep->lock);
+	spin_lock_init(&fep->tx_lock);
+
+	mac_addr = of_get_mac_address(ofdev->node);
+	if (mac_addr)
+		memcpy(ndev->dev_addr, mac_addr, 6);
+
+	ret = fep->ops->allocate_bd(ndev);
+	if (ret)
+		goto out_cleanup_data;
+
+	fep->rx_bd_base = fep->ring_base;
+	fep->tx_bd_base = fep->rx_bd_base + fpi->rx_ring;
+
+	fep->tx_ring = fpi->tx_ring;
+	fep->rx_ring = fpi->rx_ring;
+
+	ndev->open = fs_enet_open;
+	ndev->hard_start_xmit = fs_enet_start_xmit;
+	ndev->tx_timeout = fs_timeout;
+	ndev->watchdog_timeo = 2 * HZ;
+	ndev->stop = fs_enet_close;
+	ndev->get_stats = fs_enet_get_stats;
+	ndev->set_multicast_list = fs_set_multicast_list;
+	if (fpi->use_napi) {
+		ndev->poll = fs_enet_rx_napi;
+		ndev->weight = fpi->napi_weight;
+	}
+	ndev->ethtool_ops = &fs_ethtool_ops;
+	ndev->do_ioctl = fs_ioctl;
+
+	init_timer(&fep->phy_timer_list);
+
+	netif_carrier_off(ndev);
+
+	ret = register_netdev(ndev);
+	if (ret)
+		goto out_free_bd;
+
+	printk(KERN_INFO "%s: fs_enet: %02x:%02x:%02x:%02x:%02x:%02x\n",
+	       ndev->name,
+	       ndev->dev_addr[0], ndev->dev_addr[1], ndev->dev_addr[2],
+	       ndev->dev_addr[3], ndev->dev_addr[4], ndev->dev_addr[5]);
+
+	return 0;
+
+out_free_bd:
+	fep->ops->free_bd(ndev);
+out_cleanup_data:
+	fep->ops->cleanup_data(ndev);
+out_free_dev:
+	free_netdev(ndev);
+	dev_set_drvdata(&ofdev->dev, NULL);
+out_free_fpi:
+	kfree(fpi);
+	return ret;
+}
+
+static int fs_enet_remove(struct of_device *ofdev)
+{
+	struct net_device *ndev = dev_get_drvdata(&ofdev->dev);
+	struct fs_enet_private *fep = netdev_priv(ndev);
+
+	unregister_netdev(ndev);
+
+	fep->ops->free_bd(ndev);
+	fep->ops->cleanup_data(ndev);
+	dev_set_drvdata(fep->dev, NULL);
+
+	free_netdev(ndev);
+	return 0;
+}
+
+static struct of_device_id fs_enet_match[] = {
+#ifdef CONFIG_FS_ENET_HAS_SCC
+	{
+		.compatible = "fsl,cpm-scc-enet",
+		.data = (void *)&fs_scc_ops,
+	},
+#endif
+#ifdef CONFIG_FS_ENET_HAS_FCC
+	{
+		.compatible = "fsl,cpm-fcc-enet",
+		.data = (void *)&fs_fcc_ops,
+	},
+#endif
+#ifdef CONFIG_FS_ENET_HAS_FEC
+	{
+		.compatible = "fsl,pq1-fec-enet",
+		.data = (void *)&fs_fec_ops,
+	},
+#endif
+	{}
+};
+
+static struct of_platform_driver fs_enet_driver = {
+	.name	= "fs_enet",
+	.match_table = fs_enet_match,
+	.probe = fs_enet_probe,
+	.remove = fs_enet_remove,
+};
+
+static int __init fs_init(void)
+{
+	int r = setup_immap();
+	if (r != 0)
+		return r;
+
+#ifdef CONFIG_CPM2
+	r = fs_enet_mdio_bb_init();
+	if (r != 0)
+		goto out_mdio_bb;
+#endif
+#ifdef CONFIG_8xx
+	r = fs_enet_mdio_fec_init();
+	if (r != 0)
+		goto out_mdio_fec;
+#endif
+
+	r = of_register_platform_driver(&fs_enet_driver);
+	if (r != 0)
+		goto out_driver;
+
+	return 0;
+
+out_driver:
+#ifdef CONFIG_8xx
+	fs_enet_mdio_fec_exit();
+out_mdio_fec:
+#endif
+#ifdef CONFIG_CPM2
+	fs_enet_mdio_bb_exit();
+out_mdio_bb:
+#endif
+	return r;
+}
+
+static void __exit fs_cleanup(void)
+{
+	of_unregister_platform_driver(&fs_enet_driver);
+#ifdef CONFIG_8xx
+	fs_enet_mdio_fec_exit();
+#endif
+#ifdef CONFIG_CPM2
+	fs_enet_mdio_bb_exit();
+#endif
+}
+#else
 static int __devinit fs_enet_probe(struct device *dev)
 {
 	struct net_device *ndev;
@@ -1282,7 +1534,7 @@ static void __exit fs_cleanup(void)
 	driver_unregister(&fs_enet_scc_driver);
 	cleanup_immap();
 }
-
+#endif
 /**************************************************************************************/
 
 module_init(fs_init);
diff --git a/drivers/net/fs_enet/fs_enet.h b/drivers/net/fs_enet/fs_enet.h
index 6875dd8..70e8756 100644
--- a/drivers/net/fs_enet/fs_enet.h
+++ b/drivers/net/fs_enet/fs_enet.h
@@ -24,16 +24,11 @@ struct fec_info {
 #include <asm/cpm2.h>
 #endif
 
-/* This is used to operate with pins.
-  Note that the actual port size may
-    be different; cpm(s) handle it OK  */
 struct bb_info {
-	u8 mdio_dat_msk;
-	u8 mdio_dir_msk;
-	u8 *mdio_dir;
-	u8 *mdio_dat;
-	u8 mdc_msk;
-	u8 *mdc_dat;
+	u32 __iomem *dir;
+	u32 __iomem *dat;
+	u32 mdio_msk;
+	u32 mdc_msk;
 	int delay;
 };
 
@@ -125,7 +120,7 @@ struct fs_enet_private {
 	struct device *dev;	/* pointer back to the device (must be initialized first) */
 	spinlock_t lock;	/* during all ops except TX pckt processing */
 	spinlock_t tx_lock;	/* during fs_start_xmit and fs_tx         */
-	const struct fs_platform_info *fpi;
+	struct fs_platform_info *fpi;
 	const struct fs_ops *ops;
 	int rx_ring, tx_ring;
 	dma_addr_t ring_mem_addr;
@@ -187,8 +182,9 @@ struct fs_enet_private {
 
 /***************************************************************************/
 int fs_enet_mdio_bb_init(void);
-int fs_mii_fixed_init(struct fs_enet_mii_bus *bus);
+void fs_enet_mdio_bb_exit(void);
 int fs_enet_mdio_fec_init(void);
+void fs_enet_mdio_fec_exit(void);
 
 void fs_init_bds(struct net_device *dev);
 void fs_cleanup_bds(struct net_device *dev);
diff --git a/drivers/net/fs_enet/mac-fcc.c b/drivers/net/fs_enet/mac-fcc.c
index 8b30361..6b6e2ed 100644
--- a/drivers/net/fs_enet/mac-fcc.c
+++ b/drivers/net/fs_enet/mac-fcc.c
@@ -42,6 +42,10 @@
 #include <asm/irq.h>
 #include <asm/uaccess.h>
 
+#ifdef CONFIG_PPC_MERGE
+#include <asm/of_device.h>
+#endif
+
 #include "fs_enet.h"
 
 /*************************************************/
@@ -74,33 +78,64 @@
 
 #define MAX_CR_CMD_LOOPS	10000
 
-static inline int fcc_cr_cmd(struct fs_enet_private *fep, u32 mcn, u32 op)
+static inline int fcc_cr_cmd(struct fs_enet_private *fep, u32 op)
 {
 	const struct fs_platform_info *fpi = fep->fpi;
 	cpm2_map_t *immap = fs_enet_immap;
 	cpm_cpm2_t *cpmp = &immap->im_cpm;
-	u32 v;
 	int i;
 
-	/* Currently I don't know what feature call will look like. But 
-	   I guess there'd be something like do_cpm_cmd() which will require page & sblock */
-	v = mk_cr_cmd(fpi->cp_page, fpi->cp_block, mcn, op);
-	W32(cpmp, cp_cpcr, v | CPM_CR_FLG);
+	W32(cpmp, cp_cpcr, fpi->cp_command | op | CPM_CR_FLG);
 	for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
 		if ((R32(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
-			break;
-
-	if (i >= MAX_CR_CMD_LOOPS) {
-		printk(KERN_ERR "%s(): Not able to issue CPM command\n",
-		       __FUNCTION__);
-		return 1;
-	}
+			return 0;
 
-	return 0;
+	printk(KERN_ERR "%s(): Not able to issue CPM command\n",
+	       __FUNCTION__);
+	return 1;
 }
 
 static int do_pd_setup(struct fs_enet_private *fep)
 {
+#ifdef CONFIG_PPC_MERGE
+	struct of_device *ofdev = to_of_device(fep->dev);
+	struct fs_platform_info *fpi = fep->fpi;
+	int ret = -EINVAL;
+
+	fep->interrupt = of_irq_to_resource(ofdev->node, 0, NULL);
+	if (fep->interrupt == NO_IRQ)
+		goto out;
+
+	fep->fcc.fccp = of_iomap(ofdev->node, 0);
+	if (!fep->fcc.fccp)
+		goto out;
+
+	fep->fcc.ep = of_iomap(ofdev->node, 1);
+	if (!fep->fcc.ep)
+		goto out_fccp;
+
+	fep->fcc.fcccp = of_iomap(ofdev->node, 2);
+	if (!fep->fcc.fcccp)
+		goto out_ep;
+
+	fep->fcc.mem = (void *)cpm_dpalloc(128, 8);
+	fpi->dpram_offset = (u32)cpm2_immr;
+	if (IS_ERR_VALUE(fpi->dpram_offset)) {
+		ret = fpi->dpram_offset;
+		goto out_fcccp;
+	}
+
+	return 0;
+
+out_fcccp:
+	iounmap(fep->fcc.fcccp);
+out_ep:
+	iounmap(fep->fcc.ep);
+out_fccp:
+	iounmap(fep->fcc.fccp);
+out:
+	return ret;
+#else
 	struct platform_device *pdev = to_platform_device(fep->dev);
 	struct resource *r;
 
@@ -138,6 +173,7 @@ static int do_pd_setup(struct fs_enet_private *fep)
 		return -EINVAL;
 
 	return 0;
+#endif
 }
 
 #define FCC_NAPI_RX_EVENT_MSK	(FCC_ENET_RXF | FCC_ENET_RXB)
@@ -148,11 +184,17 @@ static int do_pd_setup(struct fs_enet_private *fep)
 static int setup_data(struct net_device *dev)
 {
 	struct fs_enet_private *fep = netdev_priv(dev);
-	const struct fs_platform_info *fpi = fep->fpi;
+#ifndef CONFIG_PPC_MERGE
+	struct fs_platform_info *fpi = fep->fpi;
+
+	fpi->cp_command = (fpi->cp_page << 26) |
+	                  (fpi->cp_block << 21) |
+	                  (12 << 6);
 
 	fep->fcc.idx = fs_get_fcc_index(fpi->fs_no);
 	if ((unsigned int)fep->fcc.idx >= 3)	/* max 3 FCCs */
 		return -EINVAL;
+#endif
 
 	if (do_pd_setup(fep) != 0)
 		return -EINVAL;
@@ -226,7 +268,7 @@ static void set_multicast_one(struct net_device *dev, const u8 *mac)
 	W16(ep, fen_taddrh, taddrh);
 	W16(ep, fen_taddrm, taddrm);
 	W16(ep, fen_taddrl, taddrl);
-	fcc_cr_cmd(fep, 0x0C, CPM_CR_SET_GADDR);
+	fcc_cr_cmd(fep, CPM_CR_SET_GADDR);
 }
 
 static void set_multicast_finish(struct net_device *dev)
@@ -281,7 +323,7 @@ static void restart(struct net_device *dev)
 
 	/* clear everything (slow & steady does it) */
 	for (i = 0; i < sizeof(*ep); i++)
-		out_8((char *)ep + i, 0);
+		out_8((u8 __iomem *)ep + i, 0);
 
 	/* get physical address */
 	rx_bd_base_phys = fep->ring_mem_addr;
@@ -397,7 +439,7 @@ static void restart(struct net_device *dev)
 			S8(fcccp, fcc_gfemr, 0x20);
 	}
 
-	fcc_cr_cmd(fep, 0x0c, CPM_CR_INIT_TRX);
+	fcc_cr_cmd(fep, CPM_CR_INIT_TRX);
 
 	/* clear events */
 	W16(fccp, fcc_fcce, 0xffff);
@@ -515,23 +557,22 @@ int get_regs(struct net_device *dev, void *p, int *sizep)
 {
 	struct fs_enet_private *fep = netdev_priv(dev);
 
-	if (*sizep < sizeof(fcc_t) + sizeof(fcc_c_t) + sizeof(fcc_enet_t))
+	if (*sizep < sizeof(fcc_t) + sizeof(fcc_enet_t) + 1)
 		return -EINVAL;
 
 	memcpy_fromio(p, fep->fcc.fccp, sizeof(fcc_t));
 	p = (char *)p + sizeof(fcc_t);
 
-	memcpy_fromio(p, fep->fcc.fcccp, sizeof(fcc_c_t));
-	p = (char *)p + sizeof(fcc_c_t);
-
 	memcpy_fromio(p, fep->fcc.ep, sizeof(fcc_enet_t));
+	p = (char *)p + sizeof(fcc_enet_t);
 
+	memcpy_fromio(p, fep->fcc.fcccp, 1);
 	return 0;
 }
 
 int get_regs_len(struct net_device *dev)
 {
-	return sizeof(fcc_t) + sizeof(fcc_c_t) + sizeof(fcc_enet_t);
+	return sizeof(fcc_t) + sizeof(fcc_enet_t) + 1;
 }
 
 /* Some transmit errors cause the transmitter to shut
@@ -551,7 +592,7 @@ void tx_restart(struct net_device *dev)
 	udelay(10);
 	S32(fccp, fcc_gfmr, FCC_GFMR_ENT);
 
-	fcc_cr_cmd(fep, 0x0C, CPM_CR_RESTART_TX);
+	fcc_cr_cmd(fep, CPM_CR_RESTART_TX);
 }
 
 /*************************************************************************/
diff --git a/drivers/net/fs_enet/mac-fec.c b/drivers/net/fs_enet/mac-fec.c
index 04b4f80..4d9ecf3 100644
--- a/drivers/net/fs_enet/mac-fec.c
+++ b/drivers/net/fs_enet/mac-fec.c
@@ -43,6 +43,10 @@
 #include <asm/commproc.h>
 #endif
 
+#ifdef CONFIG_PPC_MERGE
+#include <asm/of_device.h>
+#endif
+
 #include "fs_enet.h"
 #include "fec.h"
 
@@ -95,6 +99,19 @@ static int whack_reset(fec_t * fecp)
 
 static int do_pd_setup(struct fs_enet_private *fep)
 {
+#ifdef CONFIG_PPC_MERGE
+	struct of_device *ofdev = to_of_device(fep->dev);
+
+	fep->interrupt = of_irq_to_resource(ofdev->node, 0, NULL);
+	if (fep->interrupt == NO_IRQ)
+		return -EINVAL;
+
+	fep->fec.fecp = of_iomap(ofdev->node, 0);
+	if (!fep->fcc.fccp)
+		return -EINVAL;
+
+	return 0;
+#else
 	struct platform_device *pdev = to_platform_device(fep->dev); 
 	struct resource	*r;
 	
@@ -110,7 +127,7 @@ static int do_pd_setup(struct fs_enet_private *fep)
 		return -EINVAL;
 
 	return 0;
-	
+#endif
 }
 
 #define FEC_NAPI_RX_EVENT_MSK	(FEC_ENET_RXF | FEC_ENET_RXB)
diff --git a/drivers/net/fs_enet/mac-scc.c b/drivers/net/fs_enet/mac-scc.c
index 7540966..79128a9 100644
--- a/drivers/net/fs_enet/mac-scc.c
+++ b/drivers/net/fs_enet/mac-scc.c
@@ -43,6 +43,10 @@
 #include <asm/commproc.h>
 #endif
 
+#ifdef CONFIG_PPC_MERGE
+#include <asm/of_platform.h>
+#endif
+
 #include "fs_enet.h"
 
 /*************************************************/
@@ -89,27 +93,38 @@
 
 static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
 {
-	cpm8xx_t *cpmp = &((immap_t *)fs_enet_immap)->im_cpm;
-	u32 v, ch;
-	int i = 0;
+	const struct fs_platform_info *fpi = fep->fpi;
+	int i;
 
-	ch = fep->scc.idx << 2;
-	v = mk_cr_cmd(ch, op);
-	W16(cpmp, cp_cpcr, v | CPM_CR_FLG);
+	W16(cpmp, cp_cpcr, fpi->cp_command | CPM_CR_FLG | (op << 8));
 	for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
 		if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
-			break;
+			return 0;
 
-	if (i >= MAX_CR_CMD_LOOPS) {
-		printk(KERN_ERR "%s(): Not able to issue CPM command\n",
-			__FUNCTION__);
-		return 1;
-	}
-	return 0;
+	printk(KERN_ERR "%s(): Not able to issue CPM command\n",
+		__FUNCTION__);
+	return 1;
 }
 
 static int do_pd_setup(struct fs_enet_private *fep)
 {
+#ifdef CONFIG_PPC_MERGE
+	struct of_device *ofdev = to_of_device(fep->dev);
+
+	fep->interrupt = of_irq_to_resource(ofdev->node, 0, NULL);
+	if (fep->interrupt == NO_IRQ)
+		return -EINVAL;
+
+	fep->scc.sccp = of_iomap(ofdev->node, 0);
+	if (!fep->scc.sccp)
+		return -EINVAL;
+
+	fep->scc.ep = of_iomap(ofdev->node, 1);
+	if (!fep->scc.ep) {
+		iounmap(fep->scc.sccp);
+		return -EINVAL;
+	}
+#else
 	struct platform_device *pdev = to_platform_device(fep->dev);
 	struct resource *r;
 
@@ -129,6 +144,7 @@ static int do_pd_setup(struct fs_enet_private *fep)
 
 	if (fep->scc.ep == NULL)
 		return -EINVAL;
+#endif
 
 	return 0;
 }
@@ -141,12 +157,17 @@ static int do_pd_setup(struct fs_enet_private *fep)
 static int setup_data(struct net_device *dev)
 {
 	struct fs_enet_private *fep = netdev_priv(dev);
-	const struct fs_platform_info *fpi = fep->fpi;
+
+#ifdef CONFIG_PPC_MERGE
+	struct fs_platform_info *fpi = fep->fpi;
 
 	fep->scc.idx = fs_get_scc_index(fpi->fs_no);
-	if ((unsigned int)fep->fcc.idx > 4)	/* max 4 SCCs */
+	if ((unsigned int)fep->fcc.idx >= 4) /* max 4 SCCs */
 		return -EINVAL;
 
+	fpi->cp_command = fep->fcc.idx << 6;
+#endif
+
 	do_pd_setup(fep);
 
 	fep->scc.hthi = 0;
@@ -154,7 +175,7 @@ static int setup_data(struct net_device *dev)
 
 	fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK;
 	fep->ev_rx = SCC_RX_EVENT;
-	fep->ev_tx = SCC_TX_EVENT;
+	fep->ev_tx = SCC_TX_EVENT | SCCE_ENET_TXE;
 	fep->ev_err = SCC_ERR_EVENT_MSK;
 
 	return 0;
diff --git a/drivers/net/fs_enet/mii-bitbang.c b/drivers/net/fs_enet/mii-bitbang.c
index d384010..765ff75 100644
--- a/drivers/net/fs_enet/mii-bitbang.c
+++ b/drivers/net/fs_enet/mii-bitbang.c
@@ -37,75 +37,64 @@
 #include <asm/irq.h>
 #include <asm/uaccess.h>
 
-#include "fs_enet.h"
-
-static int bitbang_prep_bit(u8 **datp, u8 *mskp,
-		struct fs_mii_bit *mii_bit)
-{
-	void *dat;
-	int adv;
-	u8 msk;
-
-	dat = (void*) mii_bit->offset;
-
-	adv = mii_bit->bit >> 3;
-	dat = (char *)dat + adv;
-
-	msk = 1 << (7 - (mii_bit->bit & 7));
+#ifdef CONFIG_PPC_MERGE
+#include <asm/of_platform.h>
+#endif
 
-	*datp = dat;
-	*mskp = msk;
-
-	return 0;
-}
+#include "fs_enet.h"
 
-static inline void bb_set(u8 *p, u8 m)
+/* FIXME: If any other users of GPIO crop up, then these will have to
+ * have some sort of global synchronization to avoid races with other
+ * pins on the same port.  The ideal solution would probably be to
+ * bind the ports to a GPIO driver, and have this be a client of it.
+ */
+static inline void bb_set(u32 __iomem *p, u32 m)
 {
-	out_8(p, in_8(p) | m);
+	out_be32(p, in_be32(p) | m);
 }
 
-static inline void bb_clr(u8 *p, u8 m)
+static inline void bb_clr(u32 __iomem *p, u32 m)
 {
-	out_8(p, in_8(p) & ~m);
+	out_be32(p, in_be32(p) & ~m);
 }
 
-static inline int bb_read(u8 *p, u8 m)
+static inline int bb_read(u32 __iomem *p, u32 m)
 {
-	return (in_8(p) & m) != 0;
+	return (in_be32(p) & m) != 0;
 }
 
 static inline void mdio_active(struct bb_info *bitbang)
 {
-	bb_set(bitbang->mdio_dir, bitbang->mdio_dir_msk);
+	bb_set(bitbang->dir, bitbang->mdio_msk);
 }
 
-static inline void mdio_tristate(struct bb_info *bitbang )
+static inline void mdio_tristate(struct bb_info *bitbang)
 {
-	bb_clr(bitbang->mdio_dir, bitbang->mdio_dir_msk);
+	bb_clr(bitbang->dir, bitbang->mdio_msk);
 }
 
-static inline int mdio_read(struct bb_info *bitbang )
+static inline int mdio_read(struct bb_info *bitbang)
 {
-	return bb_read(bitbang->mdio_dat, bitbang->mdio_dat_msk);
+	return bb_read(bitbang->dat, bitbang->mdio_msk);
 }
 
-static inline void mdio(struct bb_info *bitbang , int what)
+static inline void mdio(struct bb_info *bitbang, int what)
 {
 	if (what)
-		bb_set(bitbang->mdio_dat, bitbang->mdio_dat_msk);
+		bb_set(bitbang->dat, bitbang->mdio_msk);
 	else
-		bb_clr(bitbang->mdio_dat, bitbang->mdio_dat_msk);
+		bb_clr(bitbang->dat, bitbang->mdio_msk);
 }
 
-static inline void mdc(struct bb_info *bitbang , int what)
+static inline void mdc(struct bb_info *bitbang, int what)
 {
 	if (what)
-		bb_set(bitbang->mdc_dat, bitbang->mdc_msk);
+		bb_set(bitbang->dat, bitbang->mdc_msk);
 	else
-		bb_clr(bitbang->mdc_dat, bitbang->mdc_msk);
+		bb_clr(bitbang->dat, bitbang->mdc_msk);
 }
 
-static inline void mii_delay(struct bb_info *bitbang )
+static inline void mii_delay(struct bb_info *bitbang)
 {
 	udelay(bitbang->delay);
 }
@@ -281,33 +270,178 @@ static int fs_enet_mii_bb_reset(struct mii_bus *bus)
 	return 0;
 }
 
-static int fs_mii_bitbang_init(struct bb_info *bitbang, struct fs_mii_bb_platform_info* fmpi)
+#ifdef CONFIG_PPC_MERGE
+static int __devinit fs_mii_bitbang_init(struct mii_bus *bus,
+                                         struct device_node *np)
 {
-	int r;
+	struct resource res;
+	const u32 *data;
+	int mdio_pin, mdc_pin, len;
+	struct bb_info *bitbang = bus->priv;
 
-	bitbang->delay = fmpi->delay;
+	int ret = of_address_to_resource(np, 0, &res);
+	if (ret)
+		return ret;
+
+	if (res.end - res.start < 13)
+		return -ENODEV;
+
+	/* This should really encode the pin number as well, but all
+	 * we get is an int, and the odds of multiple bitbang mdio buses
+	 * is low enough that it's not worth going too crazy.
+	 */
+	bus->id = res.start;
+
+	data = of_get_property(np, "fsl,mdio-pin", &len);
+	if (!data || len != 4)
+		return -ENODEV;
+	mdio_pin = *data;
+
+	data = of_get_property(np, "fsl,mdc-pin", &len);
+	if (!data || len != 4)
+		return -ENODEV;
+	mdc_pin = *data;
+
+	bitbang->dir = ioremap(res.start, res.end - res.start + 1);
+	if (!bitbang->dir)
+		return -ENOMEM;
+
+	bitbang->dat = bitbang->dir + 4;
+	bitbang->mdio_msk = 1 << (31 - mdio_pin);
+	bitbang->mdc_msk = 1 << (31 - mdc_pin);
+	bitbang->delay = 1; /* 1 us between operations */
+
+	return 0;
+}
+
+static void __devinit add_phy(struct mii_bus *bus, struct device_node *np)
+{
+	const u32 *data;
+	int len, id, irq;
+
+	data = of_get_property(np, "reg", &len);
+	if (!data || len != 4)
+		return;
+
+	id = *data;
+	bus->phy_mask &= ~(1 << id);
+
+	irq = of_irq_to_resource(np, 0, NULL);
+	if (irq != NO_IRQ)
+		bus->irq[id] = irq;
+}
+
+static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
+                                        const struct of_device_id *match)
+{
+	struct device_node *np = NULL;
+	struct mii_bus *new_bus;
+	struct bb_info *bitbang;
+	int ret = -ENOMEM;
+	int i;
+
+	new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL);
+	if (!new_bus)
+		goto out;
+
+	bitbang = kzalloc(sizeof(struct bb_info), GFP_KERNEL);
+	if (!bitbang)
+		goto out_free_bus;
+
+	new_bus->priv = bitbang;
+	new_bus->name = "CPM2 Bitbanged MII",
+	new_bus->read = &fs_enet_mii_bb_read,
+	new_bus->write = &fs_enet_mii_bb_write,
+	new_bus->reset = &fs_enet_mii_bb_reset,
+
+	ret = fs_mii_bitbang_init(new_bus, ofdev->node);
+	if (ret)
+		goto out_free_bitbang;
+
+	new_bus->phy_mask = ~0;
+	new_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
+	if (!new_bus->irq)
+		goto out_unmap_regs;
 
-	r = bitbang_prep_bit(&bitbang->mdio_dir,
-			 &bitbang->mdio_dir_msk,
-			 &fmpi->mdio_dir);
-	if (r != 0)
-		return r;
+	for (i = 0; i < PHY_MAX_ADDR; i++)
+		new_bus->irq[i] = -1;
 
-	r = bitbang_prep_bit(&bitbang->mdio_dat,
-			 &bitbang->mdio_dat_msk,
-			 &fmpi->mdio_dat);
-	if (r != 0)
-		return r;
+	while ((np = of_get_next_child(ofdev->node, np)))
+		if (!strcmp(np->type, "ethernet-phy"))
+			add_phy(new_bus, np);
 
-	r = bitbang_prep_bit(&bitbang->mdc_dat,
-			 &bitbang->mdc_msk,
-			 &fmpi->mdc_dat);
-	if (r != 0)
-		return r;
+	new_bus->dev = &ofdev->dev;
+	dev_set_drvdata(&ofdev->dev, new_bus);
+
+	ret = mdiobus_register(new_bus);
+	if (ret)
+		goto out_free_irqs;
+
+	return 0;
+
+out_free_irqs:
+	dev_set_drvdata(&ofdev->dev, NULL);
+	kfree(new_bus->irq);
+out_unmap_regs:
+	iounmap(bitbang->dir);
+out_free_bitbang:
+	kfree(bitbang);
+out_free_bus:
+	kfree(new_bus);
+out:
+	return ret;
+}
+
+static int fs_enet_mdio_remove(struct of_device *ofdev)
+{
+	struct mii_bus *bus = dev_get_drvdata(&ofdev->dev);
+	struct bb_info *bitbang = bus->priv;
+
+	mdiobus_unregister(bus);
+	dev_set_drvdata(&ofdev->dev, NULL);
+	kfree(bus->irq);
+	iounmap(bitbang->dir);
+	kfree(bitbang);
+	kfree(bus);
 
 	return 0;
 }
 
+static struct of_device_id fs_enet_mdio_bb_match[] = {
+	{
+		.compatible = "fsl,cpm2-mdio-bitbang",
+	},
+	{},
+};
+
+static struct of_platform_driver fs_enet_bb_mdio_driver = {
+	.name = "fsl-bb-mdio",
+	.match_table = fs_enet_mdio_bb_match,
+	.probe = fs_enet_mdio_probe,
+	.remove = fs_enet_mdio_remove,
+};
+
+int fs_enet_mdio_bb_init(void)
+{
+	return of_register_platform_driver(&fs_enet_bb_mdio_driver);
+}
+
+void fs_enet_mdio_bb_exit(void)
+{
+	of_unregister_platform_driver(&fs_enet_bb_mdio_driver);
+}
+#else
+static int __devinit fs_mii_bitbang_init(struct bb_info *bitbang,
+                                         struct fs_mii_bb_platform_info *fmpi)
+{
+	bitbang->dir = (u32 __iomem *)fmpi->mdio_dir.offset;
+	bitbang->dat = (u32 __iomem *)fmpi->mdio_dat.offset;
+	bitbang->mdio_msk = 1U << (31 - fmpi->mdio_dat.bit);
+	bitbang->mdc_msk = 1U << (31 - fmpi->mdc_dat.bit);
+	bitbang->delay = fmpi->delay;
+
+	return 0;
+}
 
 static int __devinit fs_enet_mdio_probe(struct device *dev)
 {
@@ -371,7 +505,6 @@ bus_register_fail:
 	return err;
 }
 
-
 static int fs_enet_mdio_remove(struct device *dev)
 {
 	struct mii_bus *bus = dev_get_drvdata(dev);
@@ -403,4 +536,4 @@ void fs_enet_mdio_bb_exit(void)
 {
 	driver_unregister(&fs_enet_bb_mdio_driver);
 }
-
+#endif
diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c
index 53db696..a06bad0 100644
--- a/drivers/net/fs_enet/mii-fec.c
+++ b/drivers/net/fs_enet/mii-fec.c
@@ -36,6 +36,10 @@
 #include <asm/irq.h>
 #include <asm/uaccess.h>
 
+#ifdef CONFIG_PPC_MERGE
+#include <asm/of_platform.h>
+#endif
+
 #include "fs_enet.h"
 #include "fec.h"
 
@@ -47,6 +51,7 @@
 
 #define FEC_MII_LOOPS	10000
 
+#ifndef CONFIG_PPC_MERGE
 static int match_has_phy (struct device *dev, void* data)
 {
 	struct platform_device* pdev = container_of(dev, struct platform_device, dev);
@@ -90,6 +95,7 @@ static int fs_mii_fec_init(struct fec_info* fec, struct fs_mii_fec_platform_info
 
 	return 0;
 }
+#endif
 
 static int fs_enet_fec_mii_read(struct mii_bus *bus , int phy_id, int location)
 {
@@ -145,6 +151,138 @@ static int fs_enet_fec_mii_reset(struct mii_bus *bus)
 	return 0;
 }
 
+#ifdef CONFIG_PPC_MERGE
+static void __devinit add_phy(struct mii_bus *bus, struct device_node *np)
+{
+	const u32 *data;
+	int len, id, irq;
+
+	data = of_get_property(np, "reg", &len);
+	if (!data || len != 4)
+		return;
+
+	id = *data;
+	bus->phy_mask &= ~(1 << id);
+
+	irq = of_irq_to_resource(np, 0, NULL);
+	if (irq != NO_IRQ)
+		bus->irq[id] = irq;
+}
+
+static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
+                                        const struct of_device_id *match)
+{
+	struct device_node *np = NULL;
+	struct resource res;
+	struct mii_bus *new_bus;
+	struct fec_info *fec;
+	int ret = -ENOMEM, i;
+
+	new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL);
+	if (!new_bus)
+		goto out;
+
+	fec = kzalloc(sizeof(struct fec_info), GFP_KERNEL);
+	if (!fec)
+		goto out_mii;
+
+	new_bus->priv = fec;
+	new_bus->name = "FEC MII Bus";
+	new_bus->read = &fs_enet_fec_mii_read;
+	new_bus->write = &fs_enet_fec_mii_write;
+	new_bus->reset = &fs_enet_fec_mii_reset;
+
+	ret = of_address_to_resource(ofdev->node, 0, &res);
+	if (ret)
+		return ret;
+
+	new_bus->id = res.start;
+
+	fec->fecp = ioremap(res.start, res.end - res.start + 1);
+	if (!fec->fecp)
+		goto out_fec;
+
+	fec->mii_speed = ((ppc_proc_freq + 4999999) / 5000000) << 1;
+
+	setbits32(&fec->fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
+	setbits32(&fec->fecp->fec_ecntrl, FEC_ECNTRL_PINMUX |
+	                                  FEC_ECNTRL_ETHER_EN);
+	out_be32(&fec->fecp->fec_ievent, FEC_ENET_MII);
+	out_be32(&fec->fecp->fec_mii_speed, fec->mii_speed);
+
+	new_bus->phy_mask = ~0;
+	new_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
+	if (!new_bus->irq)
+		goto out_unmap_regs;
+
+	for (i = 0; i < PHY_MAX_ADDR; i++)
+		new_bus->irq[i] = -1;
+
+	while ((np = of_get_next_child(ofdev->node, np)))
+		if (!strcmp(np->type, "ethernet-phy"))
+			add_phy(new_bus, np);
+
+	new_bus->dev = &ofdev->dev;
+	dev_set_drvdata(&ofdev->dev, new_bus);
+
+	ret = mdiobus_register(new_bus);
+	if (ret)
+		goto out_free_irqs;
+
+	return 0;
+
+out_free_irqs:
+	dev_set_drvdata(&ofdev->dev, NULL);
+	kfree(new_bus->irq);
+out_unmap_regs:
+	iounmap(fec->fecp);
+out_fec:
+	kfree(fec);
+out_mii:
+	kfree(new_bus);
+out:
+	return ret;
+}
+
+static int fs_enet_mdio_remove(struct of_device *ofdev)
+{
+	struct mii_bus *bus = dev_get_drvdata(&ofdev->dev);
+	struct fec_info *fec = bus->priv;
+
+	mdiobus_unregister(bus);
+	dev_set_drvdata(&ofdev->dev, NULL);
+	kfree(bus->irq);
+	iounmap(fec->fecp);
+	kfree(fec);
+	kfree(bus);
+
+	return 0;
+}
+
+static struct of_device_id fs_enet_mdio_fec_match[] = {
+	{
+		.compatible = "fsl,pq1-fec-mdio",
+	},
+	{},
+};
+
+static struct of_platform_driver fs_enet_fec_mdio_driver = {
+	.name = "fsl-fec-mdio",
+	.match_table = fs_enet_mdio_fec_match,
+	.probe = fs_enet_mdio_probe,
+	.remove = fs_enet_mdio_remove,
+};
+
+int fs_enet_mdio_fec_init(void)
+{
+	return of_register_platform_driver(&fs_enet_fec_mdio_driver);
+}
+
+void fs_enet_mdio_fec_exit(void)
+{
+	of_unregister_platform_driver(&fs_enet_fec_mdio_driver);
+}
+#else
 static int __devinit fs_enet_fec_mdio_probe(struct device *dev)
 {
 	struct platform_device *pdev = to_platform_device(dev);
@@ -235,4 +373,4 @@ void fs_enet_mdio_fec_exit(void)
 {
 	driver_unregister(&fs_enet_fec_mdio_driver);
 }
-
+#endif
diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h
index 543cd3c..322732c 100644
--- a/include/linux/fs_enet_pd.h
+++ b/include/linux/fs_enet_pd.h
@@ -119,6 +119,7 @@ struct fs_platform_info {
 
 	u32 cp_page;		/* CPM page */
 	u32 cp_block;		/* CPM sblock */
+	u32 cp_command;		/* CPM page/sblock/mcn */
 
 	u32 clk_trx;		/* some stuff for pins & mux configuration*/
 	u32 clk_rx;
@@ -133,7 +134,11 @@ struct fs_platform_info {
 	u32 device_flags;
 
 	int phy_addr;		/* the phy address (-1 no phy) */
+#ifdef CONFIG_PPC_MERGE
+	char bus_id[16];
+#else
 	const char*	bus_id;
+#endif
 	int phy_irq;		/* the phy irq (if it exists)  */
 
 	const struct fs_mii_bus_info *bus_info;
-- 
1.5.0.3

Re: [PATCH 01/61] Use strcasecmp() rather than strncasecmp() when determining device node compatibility.

[Michael Ellerman]

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On Tue, 2007-07-17 at 20:31 -0500, Scott Wood wrote:
> Re: [PATCH 01/61] ....

That's gotta be close to a record ..

-- 
Michael Ellerman
OzLabs, IBM Australia Development Lab

wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)

We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person

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Re: [PATCH 01/61] Use strcasecmp() rather than strncasecmp() when determining device node compatibility.

[Geert Uytterhoeven]

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On Wed, 18 Jul 2007, Michael Ellerman wrote:
> On Tue, 2007-07-17 at 20:31 -0500, Scott Wood wrote:
> > Re: [PATCH 01/61] ....
> 
> That's gotta be close to a record ..

Na, last 2 series from akpm where I was CCed on a few patches had /268 resp.
/234 ;-)

With kind regards,
 
Geert Uytterhoeven
Software Architect

Sony Network and Software Technology Center Europe
The Corporate Village · Da Vincilaan 7-D1 · B-1935 Zaventem · Belgium
 
Phone:    +32 (0)2 700 8453	
Fax:      +32 (0)2 700 8622	
E-mail:   Geert.Uytterhoeven@sonycom.com	
Internet: http://www.sony-europe.com/
 	
Sony Network and Software Technology Center Europe	
A division of Sony Service Centre (Europe) N.V.	
Registered office: Technologielaan 7 · B-1840 Londerzeel · Belgium	
VAT BE 0413.825.160 · RPR Brussels	
Fortis Bank Zaventem · Swift GEBABEBB08A · IBAN BE39001382358619

Re: [PATCH 01/61] Use strcasecmp() rather than strncasecmp() when determining device node compatibility.

[Kumar Gala]

Can these patches be broken into logical clumps?

It seems like there are:

* bootwrapper
* misc cleanup
* 82xx
* 8xx
* fs_enet

Would be easier to review and obviously the fs_enet patches need to  
go via jeff and netdev.

- k

Re: [PATCH 01/61] Use strcasecmp() rather than strncasecmp() when determining device node compatibility.

[Scott Wood]

Kumar Gala wrote:
> Can these patches be broken into logical clumps?

Probably...  I just wanted to get them out there quickly as there've 
been numerous people lately inquiring about 82xx support and posting 
patches.

> Would be easier to review and obviously the fs_enet patches need to  go 
> via jeff and netdev.

While I don't think there'll be a build break if the ethernet patches go 
in separately, there'll be a functional breakage, so I don't want to 
send them to Jeff until I'm confident that the rest of the patches will 
be going in the same release.

-Scott

Re: [PATCH 01/61] Use strcasecmp() rather than strncasecmp() when determining device node compatibility.

[Stephen Rothwell]

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On Tue, 17 Jul 2007 20:31:37 -0500 Scott Wood <scottwood@freescale.com> wrote:
>
> The current code assumes "foo-bar" must always be compatible with a node
> compatible with "foo", which breaks device trees where this is not so.

This should (at least partly) wait for the OF consolidation patches
(coming shortly), please.

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

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[PATCH 19/61] 8xx: Fix CONFIG_PIN_TLB.

[Scott Wood]

1. Only map 512K of the IMMR, rather than 8M, to avoid conflicting with
the default ioremap region.
2. The wrong register was being loaded into SPRN_MD_RPN.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
Apparently I missed sending this one yesterday...

 arch/powerpc/kernel/head_8xx.S |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 7488f30..c1469f3 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -701,7 +701,7 @@ initial_mmu:
 	mtspr	SPRN_MI_AP, r8
 	mtspr	SPRN_MD_AP, r8
 
-	/* Map another 8 MByte at the IMMR to get the processor
+	/* Map another 512 KByte at the IMMR to get the processor
 	 * internal registers (among other things).
 	 */
 #ifdef CONFIG_PIN_TLB
@@ -714,7 +714,7 @@ initial_mmu:
 	mr	r8, r9			/* Create vaddr for TLB */
 	ori	r8, r8, MD_EVALID	/* Mark it valid */
 	mtspr	SPRN_MD_EPN, r8
-	li	r8, MD_PS8MEG		/* Set 8M byte page */
+	li	r8, MD_PS512K		/* Set 512K byte page */
 	ori	r8, r8, MD_SVALID	/* Make it valid */
 	mtspr	SPRN_MD_TWC, r8
 	mr	r8, r9			/* Create paddr for TLB */
@@ -736,13 +736,13 @@ initial_mmu:
 	mtspr	SPRN_MD_TWC, r9
 	li	r11, MI_BOOTINIT	/* Create RPN for address 0 */
 	addis	r11, r11, 0x0080	/* Add 8M */
-	mtspr	SPRN_MD_RPN, r8
+	mtspr	SPRN_MD_RPN, r11
 
 	addis	r8, r8, 0x0080		/* Add 8M */
 	mtspr	SPRN_MD_EPN, r8
 	mtspr	SPRN_MD_TWC, r9
 	addis	r11, r11, 0x0080	/* Add 8M */
-	mtspr	SPRN_MD_RPN, r8
+	mtspr	SPRN_MD_RPN, r11
 #endif
 
 	/* Since the cache is enabled according to the information we
-- 
1.5.0.3