From: Hari Bathini <hbathini@linux.ibm.com>
To: Christophe Leroy <christophe.leroy@csgroup.eu>,
naveen.n.rao@linux.ibm.com, mpe@ellerman.id.au, ast@kernel.org,
daniel@iogearbox.net
Cc: songliubraving@fb.com, netdev@vger.kernel.org,
john.fastabend@gmail.com, andrii@kernel.org, kpsingh@kernel.org,
paulus@samba.org, yhs@fb.com, bpf@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, kafai@fb.com
Subject: Re: [PATCH v2 3/8] bpf powerpc: refactor JIT compiler code
Date: Mon, 20 Sep 2021 18:58:28 +0530 [thread overview]
Message-ID: <4710b971-12f0-e6cc-545a-9c7ee96d6057@linux.ibm.com> (raw)
In-Reply-To: <b73d67d5-3ec3-c618-7f4c-ffdd71650e7e@csgroup.eu>
Hi Christophe,
Thanks for reviewing the series.
On 17/09/21 9:40 pm, Christophe Leroy wrote:
>
>
> Le 17/09/2021 à 17:30, Hari Bathini a écrit :
>> Refactor powerpc JITing. This simplifies adding BPF_PROBE_MEM support.
>
> Could you describe a bit more what you are refactoring exactly ?
I am trying to do more than BPF_PROBE_MEM needs. Will keep the changes
minimal (BPF_PROBE_MEM specific) and update the changelog..
>
>
>>
>> Signed-off-by: Hari Bathini <hbathini@linux.ibm.com>
>> ---
>>
>> Changes in v2:
>> * New patch to refactor a bit of JITing code.
>>
>>
>> arch/powerpc/net/bpf_jit_comp32.c | 50 +++++++++++---------
>> arch/powerpc/net/bpf_jit_comp64.c | 76 ++++++++++++++++---------------
>> 2 files changed, 68 insertions(+), 58 deletions(-)
>>
>> diff --git a/arch/powerpc/net/bpf_jit_comp32.c
>> b/arch/powerpc/net/bpf_jit_comp32.c
>> index b60b59426a24..c8ae14c316e3 100644
>> --- a/arch/powerpc/net/bpf_jit_comp32.c
>> +++ b/arch/powerpc/net/bpf_jit_comp32.c
>> @@ -276,17 +276,17 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32
>> *image, struct codegen_context *
>> u32 exit_addr = addrs[flen];
>> for (i = 0; i < flen; i++) {
>> - u32 code = insn[i].code;
>> u32 dst_reg = bpf_to_ppc(ctx, insn[i].dst_reg);
>> - u32 dst_reg_h = dst_reg - 1;
>> u32 src_reg = bpf_to_ppc(ctx, insn[i].src_reg);
>> - u32 src_reg_h = src_reg - 1;
>> u32 tmp_reg = bpf_to_ppc(ctx, TMP_REG);
>> + u32 true_cond, code = insn[i].code;
>> + u32 dst_reg_h = dst_reg - 1;
>> + u32 src_reg_h = src_reg - 1;
>
> All changes above seems unneeded and not linked to the current patch.
> Please leave cosmetic changes outside and focus on necessary changes.
>
>> + u32 size = BPF_SIZE(code);
>> s16 off = insn[i].off;
>> s32 imm = insn[i].imm;
>> bool func_addr_fixed;
>> u64 func_addr;
>> - u32 true_cond;
>> /*
>> * addrs[] maps a BPF bytecode address into a real offset from
>> @@ -809,25 +809,33 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32
>> *image, struct codegen_context *
>> /*
>> * BPF_LDX
>> */
>> - case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src +
>> off) */
>> - EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off));
>> - if (!fp->aux->verifier_zext)
>> - EMIT(PPC_RAW_LI(dst_reg_h, 0));
>> - break;
>> - case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src +
>> off) */
>> - EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off));
>> - if (!fp->aux->verifier_zext)
>> - EMIT(PPC_RAW_LI(dst_reg_h, 0));
>> - break;
>> - case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src +
>> off) */
>> - EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off));
>> - if (!fp->aux->verifier_zext)
>> + /* dst = *(u8 *)(ul) (src + off) */
>> + case BPF_LDX | BPF_MEM | BPF_B:
>> + /* dst = *(u16 *)(ul) (src + off) */
>> + case BPF_LDX | BPF_MEM | BPF_H:
>> + /* dst = *(u32 *)(ul) (src + off) */
>> + case BPF_LDX | BPF_MEM | BPF_W:
>> + /* dst = *(u64 *)(ul) (src + off) */
>> + case BPF_LDX | BPF_MEM | BPF_DW:
> Why changing the location of the comments ? I found it more readable
> before.
Sure. I will revert that change.
>> + switch (size) {
>> + case BPF_B:
>> + EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off));
>> + break;
>> + case BPF_H:
>> + EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off));
>> + break;
>> + case BPF_W:
>> + EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off));
>> + break;
>> + case BPF_DW:
>> + EMIT(PPC_RAW_LWZ(dst_reg_h, src_reg, off));
>> + EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off + 4));
>> + break;
>> + }
>
> BPF_B, BPF_H, ... are not part of an enum. Are you sure GCC is happy to
> have no default ?
I used gcc 10.3 for ppc32 & gcc 8.3 for ppc64. No warnings.
Though, no harm adding the below, I guess..
default:
break;
Thanks
Hari
next prev parent reply other threads:[~2021-09-20 13:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-17 15:30 [PATCH v2 0/8] bpf powerpc: Add BPF_PROBE_MEM support in powerpc JIT compiler Hari Bathini
2021-09-17 15:30 ` [PATCH v2 1/8] bpf powerpc: Remove unused SEEN_STACK Hari Bathini
2021-09-17 16:02 ` Christophe Leroy
2021-09-17 15:30 ` [PATCH v2 2/8] bpf powerpc: Remove extra_pass from bpf_jit_build_body() Hari Bathini
2021-09-17 15:30 ` [PATCH v2 3/8] bpf powerpc: refactor JIT compiler code Hari Bathini
2021-09-17 16:10 ` Christophe Leroy
2021-09-20 13:28 ` Hari Bathini [this message]
2021-09-17 16:22 ` Christophe Leroy
2021-09-17 15:30 ` [PATCH v2 4/8] powerpc/ppc-opcode: introduce PPC_RAW_BRANCH() macro Hari Bathini
2021-09-17 16:14 ` LEROY Christophe
2021-09-17 15:30 ` [PATCH v2 5/8] bpf ppc64: Add BPF_PROBE_MEM support for JIT Hari Bathini
2021-09-17 16:20 ` Christophe Leroy
2021-09-17 15:30 ` [PATCH v2 6/8] bpf ppc64: Add addr > TASK_SIZE_MAX explicit check Hari Bathini
2021-09-17 16:50 ` Christophe Leroy
2021-09-17 15:30 ` [PATCH v2 7/8] bpf ppc32: Add BPF_PROBE_MEM support for JIT Hari Bathini
2021-09-17 16:39 ` Christophe Leroy
2021-09-17 15:30 ` [PATCH v2 8/8] bpf ppc32: Add addr > TASK_SIZE_MAX explicit check Hari Bathini
2021-09-17 16:57 ` Christophe Leroy
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