* Using the loop feature of the DMA controller on MPC8544 DS
@ 2008-03-12 12:34 Sebastian Siewior
2008-03-12 15:58 ` Timur Tabi
0 siblings, 1 reply; 8+ messages in thread
From: Sebastian Siewior @ 2008-03-12 12:34 UTC (permalink / raw)
To: Zhang Wei; +Cc: linuxppc-embedded
Hello,
I have here a MPC8544 DS board and I tried to utilise the dma
controller. For the transfers I need set the [S|D]AHE bit in the Mode
Register. This seems to be implemented but is currently unused in the
driver. I haven't found a way how to set this bit except globally for
the whole channel.
Is it possible to solve this nicely except dedicating one channel for
such an operation?
thanks,
Sebastian
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: Using the loop feature of the DMA controller on MPC8544 DS
2008-03-12 12:34 Using the loop feature of the DMA controller on MPC8544 DS Sebastian Siewior
@ 2008-03-12 15:58 ` Timur Tabi
2008-03-12 17:20 ` Sebastian Siewior
0 siblings, 1 reply; 8+ messages in thread
From: Timur Tabi @ 2008-03-12 15:58 UTC (permalink / raw)
To: Sebastian Siewior; +Cc: linuxppc-embedded, Zhang Wei
Sebastian Siewior wrote:
> Hello,
>
> I have here a MPC8544 DS board and I tried to utilise the dma
> controller. For the transfers I need set the [S|D]AHE bit in the Mode
> Register. This seems to be implemented but is currently unused in the
> driver.
Which driver? Zhang's DMA driver?
I haven't looked at Zhang's driver, but I just spotted this code:
case FSL_DMA_IP_85XX:
new_fsl_chan->toggle_ext_start = fsl_chan_toggle_ext_start;
new_fsl_chan->toggle_ext_pause = fsl_chan_toggle_ext_pause;
case FSL_DMA_IP_83XX:
new_fsl_chan->set_src_loop_size = fsl_chan_set_src_loop_size;
new_fsl_chan->set_dest_loop_size = fsl_chan_set_dest_loop_size;
(Don't let the missing "break" from FSL_DMA_IP_85XX fool you)
So it looks like there already is a way to set the SAHE and DAHE bits. I guess
this is what you mean by "seems to be implemented but is currently unused"?
> I haven't found a way how to set this bit except globally for
> the whole channel.
Well, the SAHE bit is part of the MR register, so it can only apply to a whole
channel. This is a hardware limitation.
> Is it possible to solve this nicely except dedicating one channel for
> such an operation?
No.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: Using the loop feature of the DMA controller on MPC8544 DS
2008-03-12 15:58 ` Timur Tabi
@ 2008-03-12 17:20 ` Sebastian Siewior
2008-03-12 18:47 ` Timur Tabi
0 siblings, 1 reply; 8+ messages in thread
From: Sebastian Siewior @ 2008-03-12 17:20 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-embedded, Zhang Wei
* Timur Tabi | 2008-03-12 10:58:21 [-0500]:
>Sebastian Siewior wrote:
>> Hello,
>>
>> I have here a MPC8544 DS board and I tried to utilise the dma
>> controller. For the transfers I need set the [S|D]AHE bit in the Mode
>> Register. This seems to be implemented but is currently unused in the
>> driver.
>
>Which driver? Zhang's DMA driver?
Yes, fsldma.c, that's the only one in tree for the CPU unless there are
some hidden trees :)
>I haven't looked at Zhang's driver, but I just spotted this code:
>
>case FSL_DMA_IP_85XX:
> new_fsl_chan->toggle_ext_start = fsl_chan_toggle_ext_start;
> new_fsl_chan->toggle_ext_pause = fsl_chan_toggle_ext_pause;
>case FSL_DMA_IP_83XX:
> new_fsl_chan->set_src_loop_size = fsl_chan_set_src_loop_size;
> new_fsl_chan->set_dest_loop_size = fsl_chan_set_dest_loop_size;
>
>(Don't let the missing "break" from FSL_DMA_IP_85XX fool you)
>
>So it looks like there already is a way to set the SAHE and DAHE bits. I guess
>this is what you mean by "seems to be implemented but is currently unused"?
Yes it is :)
>> I haven't found a way how to set this bit except globally for
>> the whole channel.
>
>Well, the SAHE bit is part of the MR register, so it can only apply to a whole
>channel. This is a hardware limitation.
Argh, I hoped that could be hidden at the offset 0x1c in the link
descriptor which is marked as reserved.
>> Is it possible to solve this nicely except dedicating one channel for
>> such an operation?
>
>No.
I need to hold src & dst each with one and two bytes makes four
channels. And then I need one for normal transfers. So I guess I have to
talk to my HW ppl that we have to change something :)
Sebastian
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: Using the loop feature of the DMA controller on MPC8544 DS
2008-03-12 17:20 ` Sebastian Siewior
@ 2008-03-12 18:47 ` Timur Tabi
2008-03-12 20:44 ` Sebastian Siewior
0 siblings, 1 reply; 8+ messages in thread
From: Timur Tabi @ 2008-03-12 18:47 UTC (permalink / raw)
To: Sebastian Siewior; +Cc: linuxppc-embedded
Sebastian Siewior wrote:
> I need to hold src & dst each with one and two bytes makes four
> channels. And then I need one for normal transfers. So I guess I have to
> talk to my HW ppl that we have to change something :)
What kind of driver are you writing that needs four simultaneous DMA transfers?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: Using the loop feature of the DMA controller on MPC8544 DS
2008-03-12 18:47 ` Timur Tabi
@ 2008-03-12 20:44 ` Sebastian Siewior
2008-03-12 20:49 ` Timur Tabi
0 siblings, 1 reply; 8+ messages in thread
From: Sebastian Siewior @ 2008-03-12 20:44 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-embedded
* Timur Tabi | 2008-03-12 13:47:30 [-0500]:
>Sebastian Siewior wrote:
>
>> I need to hold src & dst each with one and two bytes makes four
>> channels. And then I need one for normal transfers. So I guess I have to
>> talk to my HW ppl that we have to change something :)
>
>What kind of driver are you writing that needs four simultaneous DMA transfers?
Multiple drivers and those transfers may or may not happen
simultaneously. I have an USB driver that does slave dma only. For that
one I need the normal memcpy. Than there is the FPGA. That one gives me
a few components, for instance a few SPI channels. Every SPI channel has
two FIFOs, one for write and one for read. Those FIFOs have either 8, 16
or 32 bits. For those few I need the (different) [S|D]AHTS bits. I thing
you have the picture.
Now. My understanding of the DMA engine API is that multiple clients may
use the same channel simultaneously and they rebalence oneself. The xHE
bits are one per channel so the USB driver can't share the DMA channel
with the SPI driver.
In order to share them, I have to lock a channel, set the required bits
and after the transfer is done, the channel could be unlocked again.
Locking channels isn't currently possible because everyone can call
dma_async_client_chan_request() and get every channel that is suitable.
Adding DMA_MEMCPY_HOLD_[S|D]_{8|16|32} creates more possibilities than
available channel. A nicer solution would be to add DMA_MEMCPY_HOLD and
set the required bits for every request but this is unfortunately not
possible.
What is left... Ah I could lock the channel via DMA_RESOURCE_REMOVED, do
my transfer and then give it back. The channels are not freed
immediately so transfers from the interrupt handler could be
problematic.
Do you recommend another solution? Or did I miss an important part of
the API that solves this kind of problem.
>Timur Tabi
>Linux kernel developer at Freescale
Sebastian
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: Using the loop feature of the DMA controller on MPC8544 DS
2008-03-12 20:44 ` Sebastian Siewior
@ 2008-03-12 20:49 ` Timur Tabi
2008-03-12 21:15 ` Sebastian Siewior
0 siblings, 1 reply; 8+ messages in thread
From: Timur Tabi @ 2008-03-12 20:49 UTC (permalink / raw)
To: Sebastian Siewior; +Cc: linuxppc-embedded
Sebastian Siewior wrote:
> Do you recommend another solution? Or did I miss an important part of
> the API that solves this kind of problem.
Well, I need to solve this problem myself, but I wasn't planning on doing it for
a while since I have a higher priority assignment at the moment. My 8610 sound
driver does DMA all on its own and completely ignores Zhang's driver, so I need
to fix that.
Unfortunately, I'm not familiar with Zhang's driver at all (it's changed too
much since I last looked at it), so I don't know what the *best* way is. For my
sound driver, I don't even know if I'll be able to leverage Zhang's driver at
all, since I need to use a specific DMA channel, and I need to control each of
the link descriptors. Zhang's driver abstracts DMA too much. So all I was
going to do is come up with a way to reserve channels.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: Using the loop feature of the DMA controller on MPC8544 DS
2008-03-12 20:49 ` Timur Tabi
@ 2008-03-12 21:15 ` Sebastian Siewior
2008-03-12 21:16 ` Timur Tabi
0 siblings, 1 reply; 8+ messages in thread
From: Sebastian Siewior @ 2008-03-12 21:15 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-embedded
* Timur Tabi | 2008-03-12 15:49:50 [-0500]:
>Well, I need to solve this problem myself, but I wasn't planning on doing it for
>a while since I have a higher priority assignment at the moment. My 8610 sound
>driver does DMA all on its own and completely ignores Zhang's driver, so I need
>to fix that.
Ah okey. So you grab one DMA channel for yourself and you hope no one else
is going to use it?
Are you using lists descriptors or single transfers?
>Unfortunately, I'm not familiar with Zhang's driver at all (it's changed too
>much since I last looked at it), so I don't know what the *best* way is.
His driver uses DMA engine so you can't use the cool features / arch
specific settings.
>For my
>sound driver, I don't even know if I'll be able to leverage Zhang's driver at
>all, since I need to use a specific DMA channel, and I need to control each of
>the link descriptors. Zhang's driver abstracts DMA too much. So all I was
>going to do is come up with a way to reserve channels.
Welcome in my world :)
>Timur Tabi
>Linux kernel developer at Freescale
Sebastian
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: Using the loop feature of the DMA controller on MPC8544 DS
2008-03-12 21:15 ` Sebastian Siewior
@ 2008-03-12 21:16 ` Timur Tabi
0 siblings, 0 replies; 8+ messages in thread
From: Timur Tabi @ 2008-03-12 21:16 UTC (permalink / raw)
To: Sebastian Siewior; +Cc: linuxppc-embedded
Sebastian Siewior wrote:
> Ah okey. So you grab one DMA channel for yourself and you hope no one else
> is going to use it?
Yes. My driver was written first, that's how I was able to get away with it. :-)
> Are you using lists descriptors or single transfers?
Link descriptors.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2008-03-12 21:17 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2008-03-12 12:34 Using the loop feature of the DMA controller on MPC8544 DS Sebastian Siewior
2008-03-12 15:58 ` Timur Tabi
2008-03-12 17:20 ` Sebastian Siewior
2008-03-12 18:47 ` Timur Tabi
2008-03-12 20:44 ` Sebastian Siewior
2008-03-12 20:49 ` Timur Tabi
2008-03-12 21:15 ` Sebastian Siewior
2008-03-12 21:16 ` Timur Tabi
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